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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=si-fix-sgpr-copies,si-i1-copies -o - %s | FileCheck %s3 4# Make sure SIFixSGPRCopies does not assert on a phi with vreg_15# inputs.6 7---8name: i1_copy_assert9tracksRegLiveness: true10body: |11 ; CHECK-LABEL: name: i1_copy_assert12 ; CHECK: bb.0:13 ; CHECK-NEXT: successors: %bb.1(0x80000000)14 ; CHECK-NEXT: liveins: $vgpr015 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr017 ; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 killed [[COPY]], 1, implicit $exec18 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 019 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF20 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF21 ; CHECK-NEXT: {{ $}}22 ; CHECK-NEXT: bb.1:23 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)24 ; CHECK-NEXT: {{ $}}25 ; CHECK-NEXT: [[PHI:%[0-9]+]]:sreg_64 = PHI [[DEF1]], %bb.0, %14, %bb.426 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:sreg_64 = PHI [[DEF]], %bb.0, %8, %bb.427 ; CHECK-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 -128 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY [[S_MOV_B64_1]]29 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 030 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF31 ; CHECK-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[PHI]], $exec, implicit-def $scc32 ; CHECK-NEXT: S_CMP_LG_U32 [[DEF2]], killed [[S_MOV_B32_]], implicit-def $scc33 ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit $scc34 ; CHECK-NEXT: S_BRANCH %bb.435 ; CHECK-NEXT: {{ $}}36 ; CHECK-NEXT: bb.2:37 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY %838 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec39 ; CHECK-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, [[V_MOV_B32_e32_]], [[COPY2]], implicit $exec40 ; CHECK-NEXT: S_ENDPGM 0, implicit killed [[V_CNDMASK_B32_e64_]]41 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: bb.3:43 ; CHECK-NEXT: successors: %bb.4(0x80000000)44 ; CHECK-NEXT: {{ $}}45 ; CHECK-NEXT: [[S_MOV_B64_2:%[0-9]+]]:sreg_64 = S_MOV_B64 046 ; CHECK-NEXT: [[S_ANDN2_B64_:%[0-9]+]]:sreg_64 = S_ANDN2_B64 [[S_OR_B64_]], $exec, implicit-def $scc47 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[V_CMP_EQ_U32_e64_]], $exec, implicit-def $scc48 ; CHECK-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 [[S_ANDN2_B64_]], [[S_AND_B64_]], implicit-def $scc49 ; CHECK-NEXT: {{ $}}50 ; CHECK-NEXT: bb.4:51 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)52 ; CHECK-NEXT: {{ $}}53 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:sreg_64 = PHI [[S_OR_B64_]], %bb.1, [[S_OR_B64_1]], %bb.354 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:sreg_64 = PHI [[COPY1]], %bb.1, [[S_MOV_B64_2]], %bb.355 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_64 = COPY [[PHI2]]56 ; CHECK-NEXT: [[DEF3:%[0-9]+]]:sreg_64 = IMPLICIT_DEF57 ; CHECK-NEXT: [[S_ANDN2_B64_1:%[0-9]+]]:sreg_64 = S_ANDN2_B64 [[PHI1]], $exec, implicit-def $scc58 ; CHECK-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[PHI3]], $exec, implicit-def $scc59 ; CHECK-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 [[S_ANDN2_B64_1]], [[S_AND_B64_1]], implicit-def $scc60 ; CHECK-NEXT: SI_LOOP [[DEF3]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec61 ; CHECK-NEXT: S_BRANCH %bb.262 bb.0:63 liveins: $vgpr064 65 %0:vgpr_32 = COPY $vgpr066 %1:sreg_64 = V_CMP_EQ_U32_e64 killed %0, 1, implicit $exec67 %2:sreg_64 = S_MOV_B64 068 %3:vreg_1 = COPY %169 70 bb.1:71 %4:sreg_64 = S_MOV_B64 -172 %5:vreg_1 = COPY %473 %6:sreg_32 = S_MOV_B32 074 %7:sreg_32 = IMPLICIT_DEF75 S_CMP_LG_U32 %7, killed %6, implicit-def $scc76 S_CBRANCH_SCC1 %bb.3, implicit $scc77 S_BRANCH %bb.478 79 bb.2:80 %8:vreg_1 = PHI %9, %bb.481 %10:sreg_64_xexec = COPY %882 %11:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec83 %12:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %11, %10, implicit $exec84 S_ENDPGM 0, implicit killed %1285 86 bb.3:87 %13:sreg_64 = S_MOV_B64 088 89 bb.4:90 %14:vreg_1 = PHI %5, %bb.1, %3, %bb.391 %9:sreg_64 = PHI %5, %bb.1, %13, %bb.392 %15:sreg_64 = COPY %1493 %16:sreg_64 = IMPLICIT_DEF94 SI_LOOP %16, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec95 S_BRANCH %bb.296 97...98