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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=GFX73; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx942 | FileCheck %s -check-prefix=GFX94; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 | FileCheck %s -check-prefixes=GFX11,GFX11-TRUE165; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE166; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 | FileCheck %s -check-prefixes=GFX12,GFX12-TRUE167; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 | FileCheck %s -check-prefixes=GFX12,GFX12-FAKE168 9define bfloat @v_uitofp_i1_to_bf16(i1 %num) {10; GFX7-LABEL: v_uitofp_i1_to_bf16:11; GFX7: ; %bb.0:12; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX7-NEXT: v_and_b32_e32 v0, 1, v014; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v015; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc16; GFX7-NEXT: v_and_b32_e32 v0, 0x7fff0000, v017; GFX7-NEXT: s_setpc_b64 s[30:31]18;19; GFX9-LABEL: v_uitofp_i1_to_bf16:20; GFX9: ; %bb.0:21; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX9-NEXT: v_and_b32_e32 v0, 1, v023; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v024; GFX9-NEXT: s_movk_i32 s0, 0x7fff25; GFX9-NEXT: s_nop 026; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc27; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 128; GFX9-NEXT: v_add3_u32 v1, v1, v0, s029; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v030; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v031; GFX9-NEXT: s_nop 132; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc33; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v034; GFX9-NEXT: s_setpc_b64 s[30:31]35;36; GFX11-TRUE16-LABEL: v_uitofp_i1_to_bf16:37; GFX11-TRUE16: ; %bb.0:38; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v040; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)41; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v042; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo43; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 144; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v045; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v046; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)47; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff48; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo49; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)50; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h51; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]52;53; GFX11-FAKE16-LABEL: v_uitofp_i1_to_bf16:54; GFX11-FAKE16: ; %bb.0:55; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v057; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)58; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v059; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo60; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 161; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v062; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v063; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)64; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff65; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo66; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)67; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v068; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]69;70; GFX12-TRUE16-LABEL: v_uitofp_i1_to_bf16:71; GFX12-TRUE16: ; %bb.0:72; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x073; GFX12-TRUE16-NEXT: s_wait_expcnt 0x074; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x075; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x076; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x077; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v078; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)79; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v080; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)81; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo82; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 183; GFX12-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v084; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v085; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)86; GFX12-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff87; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)88; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo89; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)90; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h91; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]92;93; GFX12-FAKE16-LABEL: v_uitofp_i1_to_bf16:94; GFX12-FAKE16: ; %bb.0:95; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x096; GFX12-FAKE16-NEXT: s_wait_expcnt 0x097; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x098; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x099; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0100; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0101; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)102; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0103; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)104; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo105; GFX12-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1106; GFX12-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0107; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0108; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)109; GFX12-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff110; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)111; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo112; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)113; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0114; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]115 %op = uitofp i1 %num to bfloat116 ret bfloat %op117}118 119define amdgpu_ps i32 @s_uitofp_i1_to_bf16(i1 inreg %num) {120; GFX7-LABEL: s_uitofp_i1_to_bf16:121; GFX7: ; %bb.0:122; GFX7-NEXT: s_bitcmp1_b32 s0, 0123; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 0124; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[0:1]125; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0126; GFX7-NEXT: v_readfirstlane_b32 s0, v0127; GFX7-NEXT: ; return to shader part epilog128;129; GFX9-LABEL: s_uitofp_i1_to_bf16:130; GFX9: ; %bb.0:131; GFX9-NEXT: s_bitcmp1_b32 s0, 0132; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0133; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[0:1]134; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1135; GFX9-NEXT: v_add_u32_e32 v2, v2, v0136; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v0137; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2138; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0139; GFX9-NEXT: s_nop 1140; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc141; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0142; GFX9-NEXT: s_nop 0143; GFX9-NEXT: v_readfirstlane_b32 s0, v0144; GFX9-NEXT: ; return to shader part epilog145;146; GFX11-LABEL: s_uitofp_i1_to_bf16:147; GFX11: ; %bb.0:148; GFX11-NEXT: s_bitcmp1_b32 s0, 0149; GFX11-NEXT: s_cselect_b32 s0, -1, 0150; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)151; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s0152; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1153; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0154; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0155; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)156; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v0157; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1158; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)159; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo160; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0161; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)162; GFX11-NEXT: v_readfirstlane_b32 s0, v0163; GFX11-NEXT: ; return to shader part epilog164;165; GFX12-LABEL: s_uitofp_i1_to_bf16:166; GFX12: ; %bb.0:167; GFX12-NEXT: s_bitcmp1_b32 s0, 0168; GFX12-NEXT: s_cselect_b32 s0, -1, 0169; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)170; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s0171; GFX12-NEXT: v_bfe_u32 v1, v0, 16, 1172; GFX12-NEXT: v_or_b32_e32 v2, 0x400000, v0173; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0174; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)175; GFX12-NEXT: v_add_nc_u32_e32 v1, v1, v0176; GFX12-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1177; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)178; GFX12-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo179; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v0180; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)181; GFX12-NEXT: v_readfirstlane_b32 s0, v0182; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)183; GFX12-NEXT: ; return to shader part epilog184 %op = uitofp i1 %num to bfloat185 %b16 = bitcast bfloat %op to i16186 %b32 = zext i16 %b16 to i32187 ret i32 %b32188}189 190define <2 x bfloat> @v_uitofp_v2i1_to_v2bf16(<2 x i1> %num) {191; GFX7-LABEL: v_uitofp_v2i1_to_v2bf16:192; GFX7: ; %bb.0:193; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)194; GFX7-NEXT: v_and_b32_e32 v1, 1, v1195; GFX7-NEXT: v_and_b32_e32 v0, 1, v0196; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1197; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc198; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0199; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc200; GFX7-NEXT: v_and_b32_e32 v0, 0x7fff0000, v0201; GFX7-NEXT: v_and_b32_e32 v1, 0x7fff0000, v1202; GFX7-NEXT: s_setpc_b64 s[30:31]203;204; GFX9-LABEL: v_uitofp_v2i1_to_v2bf16:205; GFX9: ; %bb.0:206; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)207; GFX9-NEXT: v_and_b32_e32 v0, 1, v0208; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0209; GFX9-NEXT: s_movk_i32 s0, 0x7fff210; GFX9-NEXT: v_and_b32_e32 v1, 1, v1211; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc212; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1213; GFX9-NEXT: v_add3_u32 v2, v2, v0, s0214; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0215; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0216; GFX9-NEXT: s_nop 1217; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc218; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1219; GFX9-NEXT: s_nop 1220; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc221; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1222; GFX9-NEXT: v_add3_u32 v2, v2, v1, s0223; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1224; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1225; GFX9-NEXT: s_mov_b32 s0, 0x7060302226; GFX9-NEXT: s_nop 0227; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc228; GFX9-NEXT: v_perm_b32 v0, v1, v0, s0229; GFX9-NEXT: s_setpc_b64 s[30:31]230;231; GFX11-TRUE16-LABEL: v_uitofp_v2i1_to_v2bf16:232; GFX11-TRUE16: ; %bb.0:233; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)234; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l235; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l236; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)237; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l238; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo239; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h240; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)241; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1242; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo243; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1244; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1245; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff246; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)247; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1248; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0249; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff250; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)251; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo252; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0253; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo254; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)255; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h256; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]257;258; GFX11-FAKE16-LABEL: v_uitofp_v2i1_to_v2bf16:259; GFX11-FAKE16: ; %bb.0:260; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)261; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0262; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)263; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0264; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo265; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1266; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v0267; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)268; GFX11-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff269; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v1270; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1271; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo272; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0273; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)274; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1275; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1276; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo277; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1278; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff279; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)280; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo281; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302282; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]283;284; GFX12-TRUE16-LABEL: v_uitofp_v2i1_to_v2bf16:285; GFX12-TRUE16: ; %bb.0:286; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0287; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0288; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0289; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0290; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0291; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l292; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l293; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)294; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l295; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)296; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo297; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h298; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)299; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1300; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)301; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo302; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1303; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1304; GFX12-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff305; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)306; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1307; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0308; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff309; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)310; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo311; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0312; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)313; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo314; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)315; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h316; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]317;318; GFX12-FAKE16-LABEL: v_uitofp_v2i1_to_v2bf16:319; GFX12-FAKE16: ; %bb.0:320; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0321; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0322; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0323; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0324; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0325; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0326; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)327; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0328; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)329; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo330; GFX12-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1331; GFX12-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v0332; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)333; GFX12-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff334; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v1335; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1336; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)337; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo338; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0339; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)340; GFX12-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1341; GFX12-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1342; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)343; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo344; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1345; GFX12-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff346; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)347; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)348; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo349; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302350; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]351 %op = uitofp <2 x i1> %num to <2 x bfloat>352 ret <2 x bfloat> %op353}354 355define amdgpu_ps <2 x i32> @s_uitofp_v2i1_to_v2bf16(<2 x i1> inreg %num) {356; GFX7-LABEL: s_uitofp_v2i1_to_v2bf16:357; GFX7: ; %bb.0:358; GFX7-NEXT: s_and_b32 s2, 1, s1359; GFX7-NEXT: s_bitcmp1_b32 s0, 0360; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 0361; GFX7-NEXT: s_cmp_eq_u32 s2, 1362; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[0:1]363; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 0364; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[0:1]365; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v1366; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0367; GFX7-NEXT: v_readfirstlane_b32 s0, v0368; GFX7-NEXT: v_readfirstlane_b32 s1, v1369; GFX7-NEXT: ; return to shader part epilog370;371; GFX9-LABEL: s_uitofp_v2i1_to_v2bf16:372; GFX9: ; %bb.0:373; GFX9-NEXT: s_and_b32 s2, 1, s1374; GFX9-NEXT: s_bitcmp1_b32 s0, 0375; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0376; GFX9-NEXT: s_cmp_eq_u32 s2, 1377; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[0:1]378; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0379; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[0:1]380; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1381; GFX9-NEXT: v_add_u32_e32 v3, v3, v1382; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v1383; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3384; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1385; GFX9-NEXT: s_nop 1386; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc387; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1388; GFX9-NEXT: v_add_u32_e32 v3, v3, v0389; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0390; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3391; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0392; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1393; GFX9-NEXT: s_nop 0394; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc395; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0396; GFX9-NEXT: v_readfirstlane_b32 s1, v1397; GFX9-NEXT: v_readfirstlane_b32 s0, v0398; GFX9-NEXT: ; return to shader part epilog399;400; GFX11-LABEL: s_uitofp_v2i1_to_v2bf16:401; GFX11: ; %bb.0:402; GFX11-NEXT: s_and_b32 s1, 1, s1403; GFX11-NEXT: s_bitcmp1_b32 s0, 0404; GFX11-NEXT: s_cselect_b32 s0, -1, 0405; GFX11-NEXT: s_cmp_eq_u32 s1, 1406; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s0407; GFX11-NEXT: s_cselect_b32 s0, -1, 0408; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)409; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s0410; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 1411; GFX11-NEXT: v_or_b32_e32 v4, 0x400000, v0412; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0413; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)414; GFX11-NEXT: v_bfe_u32 v3, v1, 16, 1415; GFX11-NEXT: v_or_b32_e32 v5, 0x400000, v1416; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v1417; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)418; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3419; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v0420; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2421; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)422; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo423; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1424; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0425; GFX11-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo426; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)427; GFX11-NEXT: v_readfirstlane_b32 s0, v0428; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v1429; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)430; GFX11-NEXT: v_readfirstlane_b32 s1, v1431; GFX11-NEXT: ; return to shader part epilog432;433; GFX12-LABEL: s_uitofp_v2i1_to_v2bf16:434; GFX12: ; %bb.0:435; GFX12-NEXT: s_and_b32 s1, 1, s1436; GFX12-NEXT: s_bitcmp1_b32 s0, 0437; GFX12-NEXT: s_cselect_b32 s0, -1, 0438; GFX12-NEXT: s_cmp_eq_u32 s1, 1439; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s0440; GFX12-NEXT: s_cselect_b32 s0, -1, 0441; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)442; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s0443; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)444; GFX12-NEXT: v_bfe_u32 v2, v0, 16, 1445; GFX12-NEXT: v_or_b32_e32 v4, 0x400000, v0446; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0447; GFX12-NEXT: v_bfe_u32 v3, v1, 16, 1448; GFX12-NEXT: v_or_b32_e32 v5, 0x400000, v1449; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)450; GFX12-NEXT: v_add_nc_u32_e32 v3, v3, v1451; GFX12-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3452; GFX12-NEXT: v_add_nc_u32_e32 v2, v2, v0453; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)454; GFX12-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2455; GFX12-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo456; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1457; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)458; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v0459; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)460; GFX12-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo461; GFX12-NEXT: v_readfirstlane_b32 s0, v0462; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)463; GFX12-NEXT: v_lshrrev_b32_e32 v1, 16, v1464; GFX12-NEXT: v_readfirstlane_b32 s1, v1465; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)466; GFX12-NEXT: ; return to shader part epilog467 %op = uitofp <2 x i1> %num to <2 x bfloat>468 %b16 = bitcast <2 x bfloat> %op to <2 x i16>469 %b32 = zext <2 x i16> %b16 to <2 x i32>470 ret <2 x i32> %b32471}472 473define <3 x bfloat> @v_uitofp_v3i1_to_v3bf16(<3 x i1> %num) {474; GFX7-LABEL: v_uitofp_v3i1_to_v3bf16:475; GFX7: ; %bb.0:476; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)477; GFX7-NEXT: v_and_b32_e32 v2, 1, v2478; GFX7-NEXT: v_and_b32_e32 v1, 1, v1479; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2480; GFX7-NEXT: v_and_b32_e32 v0, 1, v0481; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc482; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1483; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc484; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0485; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc486; GFX7-NEXT: v_and_b32_e32 v0, 0x7fff0000, v0487; GFX7-NEXT: v_and_b32_e32 v1, 0x7fff0000, v1488; GFX7-NEXT: v_and_b32_e32 v2, 0x7fff0000, v2489; GFX7-NEXT: s_setpc_b64 s[30:31]490;491; GFX9-LABEL: v_uitofp_v3i1_to_v3bf16:492; GFX9: ; %bb.0:493; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)494; GFX9-NEXT: v_and_b32_e32 v2, 1, v2495; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2496; GFX9-NEXT: s_movk_i32 s0, 0x7fff497; GFX9-NEXT: v_and_b32_e32 v0, 1, v0498; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc499; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1500; GFX9-NEXT: v_add3_u32 v3, v3, v2, s0501; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2502; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2503; GFX9-NEXT: v_and_b32_e32 v1, 1, v1504; GFX9-NEXT: s_nop 0505; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc506; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0507; GFX9-NEXT: s_nop 1508; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc509; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1510; GFX9-NEXT: v_add3_u32 v3, v3, v0, s0511; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0512; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0513; GFX9-NEXT: s_nop 1514; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc515; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1516; GFX9-NEXT: s_nop 1517; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc518; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1519; GFX9-NEXT: v_add3_u32 v3, v3, v1, s0520; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1521; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1522; GFX9-NEXT: s_mov_b32 s0, 0x7060302523; GFX9-NEXT: s_nop 0524; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc525; GFX9-NEXT: v_perm_b32 v0, v1, v0, s0526; GFX9-NEXT: v_alignbit_b32 v1, s0, v2, 16527; GFX9-NEXT: s_setpc_b64 s[30:31]528;529; GFX11-TRUE16-LABEL: v_uitofp_v3i1_to_v3bf16:530; GFX11-TRUE16: ; %bb.0:531; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)532; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l533; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v2.l534; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 1, v1.l535; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)536; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l537; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo538; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h539; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)540; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1541; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo542; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v1.l543; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2544; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff545; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)546; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 1547; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo548; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2549; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0550; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff551; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)552; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1553; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo554; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0555; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1556; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff557; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo558; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1559; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)560; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h561; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo562; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h563; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]564;565; GFX11-FAKE16-LABEL: v_uitofp_v3i1_to_v3bf16:566; GFX11-FAKE16: ; %bb.0:567; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)568; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 1, v2569; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0570; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)571; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2572; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo573; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0574; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)575; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 1576; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo577; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v2578; GFX11-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff579; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)580; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 1581; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v0582; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff583; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v1584; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)585; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1586; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo587; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0588; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v1, 16, 1589; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v1590; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo591; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1592; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)593; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff594; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo595; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2596; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)597; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302598; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v6, vcc_lo599; GFX11-FAKE16-NEXT: v_alignbit_b32 v1, s0, v2, 16600; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]601;602; GFX12-TRUE16-LABEL: v_uitofp_v3i1_to_v3bf16:603; GFX12-TRUE16: ; %bb.0:604; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0605; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0606; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0607; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0608; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0609; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l610; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v2.l611; GFX12-TRUE16-NEXT: v_and_b16 v1.l, 1, v1.l612; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)613; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l614; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)615; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo616; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h617; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1618; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)619; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo620; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v1.l621; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2622; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff623; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)624; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 1625; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)626; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo627; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2628; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0629; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff630; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)631; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1632; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)633; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo634; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0635; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1636; GFX12-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff637; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)638; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo639; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1640; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)641; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h642; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)643; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo644; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h645; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]646;647; GFX12-FAKE16-LABEL: v_uitofp_v3i1_to_v3bf16:648; GFX12-FAKE16: ; %bb.0:649; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0650; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0651; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0652; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0653; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0654; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 1, v2655; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0656; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)657; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2658; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)659; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo660; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0661; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)662; GFX12-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 1663; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)664; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo665; GFX12-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v2666; GFX12-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff667; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)668; GFX12-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 1669; GFX12-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v0670; GFX12-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff671; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v1672; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)673; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1674; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)675; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo676; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0677; GFX12-FAKE16-NEXT: v_bfe_u32 v5, v1, 16, 1678; GFX12-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v1679; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)680; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo681; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1682; GFX12-FAKE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff683; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)684; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)685; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo686; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2687; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302688; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)689; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v6, vcc_lo690; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)691; GFX12-FAKE16-NEXT: v_alignbit_b32 v1, s0, v2, 16692; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]693 %op = uitofp <3 x i1> %num to <3 x bfloat>694 ret <3 x bfloat> %op695}696 697define amdgpu_ps <3 x i32> @s_uitofp_v3i1_to_v3bf16(<3 x i1> inreg %num) {698; GFX7-LABEL: s_uitofp_v3i1_to_v3bf16:699; GFX7: ; %bb.0:700; GFX7-NEXT: s_and_b32 s4, 1, s2701; GFX7-NEXT: s_and_b32 s2, 1, s1702; GFX7-NEXT: s_bitcmp1_b32 s0, 0703; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 0704; GFX7-NEXT: s_cmp_eq_u32 s2, 1705; GFX7-NEXT: s_cselect_b64 s[2:3], -1, 0706; GFX7-NEXT: s_cmp_eq_u32 s4, 1707; GFX7-NEXT: s_cselect_b64 s[4:5], -1, 0708; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[4:5]709; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[2:3]710; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s[0:1]711; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0712; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v1713; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v2714; GFX7-NEXT: v_readfirstlane_b32 s0, v2715; GFX7-NEXT: v_readfirstlane_b32 s1, v1716; GFX7-NEXT: v_readfirstlane_b32 s2, v0717; GFX7-NEXT: ; return to shader part epilog718;719; GFX9-LABEL: s_uitofp_v3i1_to_v3bf16:720; GFX9: ; %bb.0:721; GFX9-NEXT: s_and_b32 s4, 1, s2722; GFX9-NEXT: s_and_b32 s2, 1, s1723; GFX9-NEXT: s_bitcmp1_b32 s0, 0724; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0725; GFX9-NEXT: s_cmp_eq_u32 s2, 1726; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0727; GFX9-NEXT: s_cmp_eq_u32 s4, 1728; GFX9-NEXT: s_cselect_b64 s[4:5], -1, 0729; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[4:5]730; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1731; GFX9-NEXT: v_add_u32_e32 v2, v2, v0732; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v0733; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2734; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0735; GFX9-NEXT: s_nop 1736; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc737; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[2:3]738; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1739; GFX9-NEXT: v_add_u32_e32 v3, v3, v1740; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v1741; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3742; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1743; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0744; GFX9-NEXT: s_nop 0745; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc746; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s[0:1]747; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 1748; GFX9-NEXT: v_add_u32_e32 v4, v4, v2749; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v2750; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4751; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2752; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1753; GFX9-NEXT: v_readfirstlane_b32 s2, v0754; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v3, vcc755; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2756; GFX9-NEXT: v_readfirstlane_b32 s1, v1757; GFX9-NEXT: v_readfirstlane_b32 s0, v2758; GFX9-NEXT: ; return to shader part epilog759;760; GFX11-LABEL: s_uitofp_v3i1_to_v3bf16:761; GFX11: ; %bb.0:762; GFX11-NEXT: s_and_b32 s2, 1, s2763; GFX11-NEXT: s_and_b32 s1, 1, s1764; GFX11-NEXT: s_bitcmp1_b32 s0, 0765; GFX11-NEXT: s_cselect_b32 s0, -1, 0766; GFX11-NEXT: s_cmp_eq_u32 s1, 1767; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s0768; GFX11-NEXT: s_cselect_b32 s1, -1, 0769; GFX11-NEXT: s_cmp_eq_u32 s2, 1770; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s1771; GFX11-NEXT: s_cselect_b32 s0, -1, 0772; GFX11-NEXT: v_bfe_u32 v4, v1, 16, 1773; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s0774; GFX11-NEXT: v_or_b32_e32 v6, 0x400000, v1775; GFX11-NEXT: v_bfe_u32 v3, v0, 16, 1776; GFX11-NEXT: v_or_b32_e32 v7, 0x400000, v0777; GFX11-NEXT: v_add_nc_u32_e32 v4, v4, v1778; GFX11-NEXT: v_bfe_u32 v5, v2, 16, 1779; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v2780; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v0781; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0782; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4783; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)784; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3785; GFX11-NEXT: v_dual_cndmask_b32 v0, v3, v7 :: v_dual_add_nc_u32 v5, v5, v2786; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1787; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)788; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5789; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0790; GFX11-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo791; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2792; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)793; GFX11-NEXT: v_readfirstlane_b32 s1, v0794; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v1795; GFX11-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo796; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)797; GFX11-NEXT: v_readfirstlane_b32 s0, v1798; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v2799; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)800; GFX11-NEXT: v_readfirstlane_b32 s2, v2801; GFX11-NEXT: ; return to shader part epilog802;803; GFX12-LABEL: s_uitofp_v3i1_to_v3bf16:804; GFX12: ; %bb.0:805; GFX12-NEXT: s_and_b32 s2, 1, s2806; GFX12-NEXT: s_and_b32 s1, 1, s1807; GFX12-NEXT: s_bitcmp1_b32 s0, 0808; GFX12-NEXT: s_cselect_b32 s0, -1, 0809; GFX12-NEXT: s_cmp_eq_u32 s1, 1810; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s0811; GFX12-NEXT: s_cselect_b32 s1, -1, 0812; GFX12-NEXT: s_cmp_eq_u32 s2, 1813; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)814; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s1815; GFX12-NEXT: s_cselect_b32 s0, -1, 0816; GFX12-NEXT: v_bfe_u32 v4, v1, 16, 1817; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)818; GFX12-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s0819; GFX12-NEXT: v_or_b32_e32 v6, 0x400000, v1820; GFX12-NEXT: v_bfe_u32 v3, v0, 16, 1821; GFX12-NEXT: v_or_b32_e32 v7, 0x400000, v0822; GFX12-NEXT: v_add_nc_u32_e32 v4, v4, v1823; GFX12-NEXT: v_bfe_u32 v5, v2, 16, 1824; GFX12-NEXT: v_or_b32_e32 v8, 0x400000, v2825; GFX12-NEXT: v_add_nc_u32_e32 v3, v3, v0826; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0827; GFX12-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4828; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)829; GFX12-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3830; GFX12-NEXT: v_dual_cndmask_b32 v0, v3, v7 :: v_dual_add_nc_u32 v5, v5, v2831; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1832; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)833; GFX12-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5834; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v0835; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)836; GFX12-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo837; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2838; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)839; GFX12-NEXT: v_readfirstlane_b32 s1, v0840; GFX12-NEXT: v_lshrrev_b32_e32 v1, 16, v1841; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)842; GFX12-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo843; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)844; GFX12-NEXT: v_readfirstlane_b32 s0, v1845; GFX12-NEXT: v_lshrrev_b32_e32 v2, 16, v2846; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)847; GFX12-NEXT: v_readfirstlane_b32 s2, v2848; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)849; GFX12-NEXT: ; return to shader part epilog850 %op = uitofp <3 x i1> %num to <3 x bfloat>851 %b16 = bitcast <3 x bfloat> %op to <3 x i16>852 %b32 = zext <3 x i16> %b16 to <3 x i32>853 ret <3 x i32> %b32854}855 856define <4 x bfloat> @v_uitofp_v4i1_to_v4bf16(<4 x i1> %num) {857; GFX7-LABEL: v_uitofp_v4i1_to_v4bf16:858; GFX7: ; %bb.0:859; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)860; GFX7-NEXT: v_and_b32_e32 v3, 1, v3861; GFX7-NEXT: v_and_b32_e32 v2, 1, v2862; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v3863; GFX7-NEXT: v_and_b32_e32 v1, 1, v1864; GFX7-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc865; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2866; GFX7-NEXT: v_and_b32_e32 v0, 1, v0867; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc868; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1869; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc870; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0871; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc872; GFX7-NEXT: v_and_b32_e32 v0, 0x7fff0000, v0873; GFX7-NEXT: v_and_b32_e32 v1, 0x7fff0000, v1874; GFX7-NEXT: v_and_b32_e32 v2, 0x7fff0000, v2875; GFX7-NEXT: v_and_b32_e32 v3, 0x7fff0000, v3876; GFX7-NEXT: s_setpc_b64 s[30:31]877;878; GFX9-LABEL: v_uitofp_v4i1_to_v4bf16:879; GFX9: ; %bb.0:880; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)881; GFX9-NEXT: v_and_b32_e32 v2, 1, v2882; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2883; GFX9-NEXT: s_movk_i32 s0, 0x7fff884; GFX9-NEXT: v_and_b32_e32 v3, 1, v3885; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc886; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 1887; GFX9-NEXT: v_add3_u32 v4, v4, v2, s0888; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2889; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2890; GFX9-NEXT: v_and_b32_e32 v0, 1, v0891; GFX9-NEXT: v_and_b32_e32 v1, 1, v1892; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc893; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v3894; GFX9-NEXT: s_nop 1895; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc896; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1897; GFX9-NEXT: v_add3_u32 v4, v4, v3, s0898; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3899; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3900; GFX9-NEXT: s_nop 1901; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc902; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0903; GFX9-NEXT: s_nop 1904; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc905; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 1906; GFX9-NEXT: v_add3_u32 v4, v4, v0, s0907; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0908; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0909; GFX9-NEXT: s_nop 1910; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc911; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1912; GFX9-NEXT: s_nop 1913; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc914; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1915; GFX9-NEXT: v_add3_u32 v4, v4, v1, s0916; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1917; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1918; GFX9-NEXT: s_mov_b32 s0, 0x7060302919; GFX9-NEXT: s_nop 0920; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc921; GFX9-NEXT: v_perm_b32 v0, v1, v0, s0922; GFX9-NEXT: v_perm_b32 v1, v3, v2, s0923; GFX9-NEXT: s_setpc_b64 s[30:31]924;925; GFX11-TRUE16-LABEL: v_uitofp_v4i1_to_v4bf16:926; GFX11-TRUE16: ; %bb.0:927; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)928; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v3.l929; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 1, v2.l930; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l931; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)932; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h933; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l934; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo935; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v2.l936; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1937; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo938; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l939; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3940; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)941; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff942; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1943; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo944; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h945; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2946; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)947; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff948; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1949; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo950; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2951; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1952; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)953; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff954; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1955; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo956; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1957; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0958; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)959; GFX11-TRUE16-NEXT: v_add3_u32 v5, v9, v0, 0x7fff960; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo961; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3962; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo963; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0964; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h965; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo966; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h967; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]968;969; GFX11-FAKE16-LABEL: v_uitofp_v4i1_to_v4bf16:970; GFX11-FAKE16: ; %bb.0:971; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)972; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 1, v2973; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 1, v3974; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)975; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2976; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo977; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v3978; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)979; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 1980; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo981; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v2982; GFX11-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff983; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)984; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 1985; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v3986; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v1987; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff988; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0989; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)990; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0991; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo992; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1993; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 1994; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo995; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2996; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)997; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff998; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 1999; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo1000; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v01001; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01002; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1003; GFX11-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff1004; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11005; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v4, vcc_lo1006; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11007; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1008; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo1009; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31010; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603021011; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v9, vcc_lo1012; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1013; GFX11-FAKE16-NEXT: v_perm_b32 v1, v3, v2, 0x70603021014; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1015;1016; GFX12-TRUE16-LABEL: v_uitofp_v4i1_to_v4bf16:1017; GFX12-TRUE16: ; %bb.0:1018; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01019; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01020; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01021; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01022; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01023; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v3.l1024; GFX12-TRUE16-NEXT: v_and_b16 v2.l, 1, v2.l1025; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l1026; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)1027; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1028; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l1029; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1030; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo1031; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v2.l1032; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 11033; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1034; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo1035; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l1036; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v31037; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff1038; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1039; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 11040; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1041; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo1042; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1043; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v21044; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff1045; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1046; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 11047; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1048; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo1049; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v21050; GFX12-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v11051; GFX12-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff1052; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1053; GFX12-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 11054; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1055; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo1056; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11057; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v01058; GFX12-TRUE16-NEXT: v_add3_u32 v5, v9, v0, 0x7fff1059; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1060; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo1061; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31062; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1063; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo1064; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01065; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h1066; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1067; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo1068; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h1069; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1070;1071; GFX12-FAKE16-LABEL: v_uitofp_v4i1_to_v4bf16:1072; GFX12-FAKE16: ; %bb.0:1073; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01074; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01075; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01076; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01077; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01078; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 1, v21079; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 1, v31080; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)1081; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v21082; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1083; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo1084; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v31085; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)1086; GFX12-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 11087; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1088; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo1089; GFX12-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v21090; GFX12-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff1091; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)1092; GFX12-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 11093; GFX12-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v31094; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v11095; GFX12-FAKE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff1096; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01097; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)1098; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01099; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1100; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo1101; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v11102; GFX12-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 11103; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1104; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo1105; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v21106; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1107; GFX12-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff1108; GFX12-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 11109; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1110; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo1111; GFX12-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v01112; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01113; GFX12-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff1114; GFX12-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11115; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1116; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v4, vcc_lo1117; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11118; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1119; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo1120; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31121; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1122; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603021123; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1124; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v9, vcc_lo1125; GFX12-FAKE16-NEXT: v_perm_b32 v1, v3, v2, 0x70603021126; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1127 %op = uitofp <4 x i1> %num to <4 x bfloat>1128 ret <4 x bfloat> %op1129}1130 1131define amdgpu_ps <4 x i32> @s_uitofp_v4i1_to_v4bf16(<4 x i1> inreg %num) {1132; GFX7-LABEL: s_uitofp_v4i1_to_v4bf16:1133; GFX7: ; %bb.0:1134; GFX7-NEXT: s_and_b32 s6, 1, s31135; GFX7-NEXT: s_and_b32 s4, 1, s21136; GFX7-NEXT: s_and_b32 s2, 1, s11137; GFX7-NEXT: s_bitcmp1_b32 s0, 01138; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 01139; GFX7-NEXT: s_cmp_eq_u32 s2, 11140; GFX7-NEXT: s_cselect_b64 s[2:3], -1, 01141; GFX7-NEXT: s_cmp_eq_u32 s4, 11142; GFX7-NEXT: s_cselect_b64 s[4:5], -1, 01143; GFX7-NEXT: s_cmp_eq_u32 s6, 11144; GFX7-NEXT: s_cselect_b64 s[6:7], -1, 01145; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[6:7]1146; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[4:5]1147; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s[2:3]1148; GFX7-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, s[0:1]1149; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v01150; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v11151; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v21152; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v31153; GFX7-NEXT: v_readfirstlane_b32 s0, v31154; GFX7-NEXT: v_readfirstlane_b32 s1, v21155; GFX7-NEXT: v_readfirstlane_b32 s2, v11156; GFX7-NEXT: v_readfirstlane_b32 s3, v01157; GFX7-NEXT: ; return to shader part epilog1158;1159; GFX9-LABEL: s_uitofp_v4i1_to_v4bf16:1160; GFX9: ; %bb.0:1161; GFX9-NEXT: s_and_b32 s6, 1, s31162; GFX9-NEXT: s_and_b32 s4, 1, s21163; GFX9-NEXT: s_and_b32 s2, 1, s11164; GFX9-NEXT: s_bitcmp1_b32 s0, 01165; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 01166; GFX9-NEXT: s_cmp_eq_u32 s2, 11167; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 01168; GFX9-NEXT: s_cmp_eq_u32 s4, 11169; GFX9-NEXT: s_cselect_b64 s[4:5], -1, 01170; GFX9-NEXT: s_cmp_eq_u32 s6, 11171; GFX9-NEXT: s_cselect_b64 s[6:7], -1, 01172; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[6:7]1173; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 11174; GFX9-NEXT: v_add_u32_e32 v2, v2, v01175; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v01176; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v21177; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01178; GFX9-NEXT: s_nop 11179; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc1180; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s[4:5]1181; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 11182; GFX9-NEXT: v_add_u32_e32 v3, v3, v11183; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v11184; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v31185; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v11186; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v01187; GFX9-NEXT: s_nop 01188; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc1189; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, s[2:3]1190; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 11191; GFX9-NEXT: v_add_u32_e32 v4, v4, v21192; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v21193; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v41194; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v21195; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v11196; GFX9-NEXT: v_readfirstlane_b32 s3, v01197; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v3, vcc1198; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, s[0:1]1199; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 11200; GFX9-NEXT: v_add_u32_e32 v5, v5, v31201; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v31202; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v51203; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v31204; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v21205; GFX9-NEXT: v_readfirstlane_b32 s2, v11206; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc1207; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v31208; GFX9-NEXT: v_readfirstlane_b32 s1, v21209; GFX9-NEXT: v_readfirstlane_b32 s0, v31210; GFX9-NEXT: ; return to shader part epilog1211;1212; GFX11-LABEL: s_uitofp_v4i1_to_v4bf16:1213; GFX11: ; %bb.0:1214; GFX11-NEXT: s_and_b32 s3, 1, s31215; GFX11-NEXT: s_and_b32 s2, 1, s21216; GFX11-NEXT: s_and_b32 s1, 1, s11217; GFX11-NEXT: s_bitcmp1_b32 s0, 01218; GFX11-NEXT: s_cselect_b32 s0, -1, 01219; GFX11-NEXT: s_cmp_eq_u32 s1, 11220; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, s01221; GFX11-NEXT: s_cselect_b32 s1, -1, 01222; GFX11-NEXT: s_cmp_eq_u32 s2, 11223; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1.0, s11224; GFX11-NEXT: s_cselect_b32 s2, -1, 01225; GFX11-NEXT: s_cmp_eq_u32 s3, 11226; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s21227; GFX11-NEXT: s_cselect_b32 s3, -1, 01228; GFX11-NEXT: v_bfe_u32 v7, v4, 16, 11229; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s31230; GFX11-NEXT: v_bfe_u32 v6, v3, 16, 11231; GFX11-NEXT: v_bfe_u32 v5, v1, 16, 11232; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v41233; GFX11-NEXT: v_add_nc_u32_e32 v7, v7, v41234; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 11235; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v01236; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v11237; GFX11-NEXT: v_add_nc_u32_e32 v6, v6, v31238; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v71239; GFX11-NEXT: v_add_nc_u32_e32 v5, v5, v11240; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11241; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v31242; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v61243; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)1244; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v51245; GFX11-NEXT: v_dual_cndmask_b32 v1, v5, v9 :: v_dual_add_nc_u32 v2, v2, v01246; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31247; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1248; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v21249; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v11250; GFX11-NEXT: v_cndmask_b32_e32 v3, v6, v11, vcc_lo1251; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41252; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)1253; GFX11-NEXT: v_readfirstlane_b32 s2, v11254; GFX11-NEXT: v_cndmask_b32_e32 v4, v7, v10, vcc_lo1255; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01256; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo1257; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v31258; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v41259; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1260; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v01261; GFX11-NEXT: v_readfirstlane_b32 s0, v21262; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1263; GFX11-NEXT: v_readfirstlane_b32 s1, v31264; GFX11-NEXT: v_readfirstlane_b32 s3, v01265; GFX11-NEXT: ; return to shader part epilog1266;1267; GFX12-LABEL: s_uitofp_v4i1_to_v4bf16:1268; GFX12: ; %bb.0:1269; GFX12-NEXT: s_and_b32 s3, 1, s31270; GFX12-NEXT: s_and_b32 s2, 1, s21271; GFX12-NEXT: s_and_b32 s1, 1, s11272; GFX12-NEXT: s_bitcmp1_b32 s0, 01273; GFX12-NEXT: s_cselect_b32 s0, -1, 01274; GFX12-NEXT: s_cmp_eq_u32 s1, 11275; GFX12-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, s01276; GFX12-NEXT: s_cselect_b32 s1, -1, 01277; GFX12-NEXT: s_cmp_eq_u32 s2, 11278; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1279; GFX12-NEXT: v_cndmask_b32_e64 v4, 0, 1.0, s11280; GFX12-NEXT: s_cselect_b32 s2, -1, 01281; GFX12-NEXT: s_cmp_eq_u32 s3, 11282; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, s21283; GFX12-NEXT: s_cselect_b32 s3, -1, 01284; GFX12-NEXT: v_bfe_u32 v7, v4, 16, 11285; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1286; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s31287; GFX12-NEXT: v_bfe_u32 v6, v3, 16, 11288; GFX12-NEXT: v_bfe_u32 v5, v1, 16, 11289; GFX12-NEXT: v_or_b32_e32 v10, 0x400000, v41290; GFX12-NEXT: v_add_nc_u32_e32 v7, v7, v41291; GFX12-NEXT: v_bfe_u32 v2, v0, 16, 11292; GFX12-NEXT: v_or_b32_e32 v8, 0x400000, v01293; GFX12-NEXT: v_or_b32_e32 v9, 0x400000, v11294; GFX12-NEXT: v_add_nc_u32_e32 v6, v6, v31295; GFX12-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v71296; GFX12-NEXT: v_add_nc_u32_e32 v5, v5, v11297; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11298; GFX12-NEXT: v_or_b32_e32 v11, 0x400000, v31299; GFX12-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v61300; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)1301; GFX12-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v51302; GFX12-NEXT: v_dual_cndmask_b32 v1, v5, v9 :: v_dual_add_nc_u32 v2, v2, v01303; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31304; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1305; GFX12-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v21306; GFX12-NEXT: v_lshrrev_b32_e32 v1, 16, v11307; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)1308; GFX12-NEXT: v_cndmask_b32_e32 v3, v6, v11, vcc_lo1309; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41310; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3)1311; GFX12-NEXT: v_readfirstlane_b32 s2, v11312; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)1313; GFX12-NEXT: v_cndmask_b32_e32 v4, v7, v10, vcc_lo1314; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01315; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)1316; GFX12-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo1317; GFX12-NEXT: v_lshrrev_b32_e32 v2, 16, v31318; GFX12-NEXT: v_lshrrev_b32_e32 v3, 16, v41319; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1320; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v01321; GFX12-NEXT: v_readfirstlane_b32 s0, v21322; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1323; GFX12-NEXT: v_readfirstlane_b32 s1, v31324; GFX12-NEXT: v_readfirstlane_b32 s3, v01325; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)1326; GFX12-NEXT: ; return to shader part epilog1327 %op = uitofp <4 x i1> %num to <4 x bfloat>1328 %b16 = bitcast <4 x bfloat> %op to <4 x i16>1329 %b32 = zext <4 x i16> %b16 to <4 x i32>1330 ret <4 x i32> %b321331}1332 1333define bfloat @v_sitofp_i1_to_bf16(i1 %num) {1334; GFX7-LABEL: v_sitofp_i1_to_bf16:1335; GFX7: ; %bb.0:1336; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1337; GFX7-NEXT: v_and_b32_e32 v0, 1, v01338; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01339; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1340; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01341; GFX7-NEXT: s_setpc_b64 s[30:31]1342;1343; GFX9-LABEL: v_sitofp_i1_to_bf16:1344; GFX9: ; %bb.0:1345; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1346; GFX9-NEXT: v_and_b32_e32 v0, 1, v01347; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01348; GFX9-NEXT: s_movk_i32 s0, 0x7fff1349; GFX9-NEXT: s_nop 01350; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1351; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 11352; GFX9-NEXT: v_add3_u32 v1, v1, v0, s01353; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v01354; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01355; GFX9-NEXT: s_nop 11356; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc1357; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v01358; GFX9-NEXT: s_setpc_b64 s[30:31]1359;1360; GFX11-TRUE16-LABEL: v_sitofp_i1_to_bf16:1361; GFX11-TRUE16: ; %bb.0:1362; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1363; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v01364; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1365; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01366; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1367; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 11368; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v01369; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01370; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1371; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff1372; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1373; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1374; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h1375; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1376;1377; GFX11-FAKE16-LABEL: v_sitofp_i1_to_bf16:1378; GFX11-FAKE16: ; %bb.0:1379; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1380; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01381; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1382; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01383; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1384; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 11385; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v01386; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01387; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1388; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff1389; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1390; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1391; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v01392; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1393;1394; GFX12-TRUE16-LABEL: v_sitofp_i1_to_bf16:1395; GFX12-TRUE16: ; %bb.0:1396; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01397; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01398; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01399; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01400; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01401; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v01402; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1403; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01404; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1405; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1406; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 11407; GFX12-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v01408; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01409; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)1410; GFX12-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff1411; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1412; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1413; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1414; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h1415; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1416;1417; GFX12-FAKE16-LABEL: v_sitofp_i1_to_bf16:1418; GFX12-FAKE16: ; %bb.0:1419; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01420; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01421; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01422; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01423; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01424; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01425; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1426; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01427; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1428; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1429; GFX12-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 11430; GFX12-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v01431; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01432; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)1433; GFX12-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff1434; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1435; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1436; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1437; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v01438; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1439 %op = sitofp i1 %num to bfloat1440 ret bfloat %op1441}1442 1443define amdgpu_ps i32 @s_sitofp_i1_to_bf16(i1 inreg %num) {1444; GFX7-LABEL: s_sitofp_i1_to_bf16:1445; GFX7: ; %bb.0:1446; GFX7-NEXT: s_bitcmp1_b32 s0, 01447; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 01448; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]1449; GFX7-NEXT: v_ashrrev_i32_e32 v0, 16, v01450; GFX7-NEXT: v_readfirstlane_b32 s0, v01451; GFX7-NEXT: ; return to shader part epilog1452;1453; GFX9-LABEL: s_sitofp_i1_to_bf16:1454; GFX9: ; %bb.0:1455; GFX9-NEXT: s_bitcmp1_b32 s0, 01456; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 01457; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]1458; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 11459; GFX9-NEXT: v_add_u32_e32 v2, v2, v01460; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v01461; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v21462; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01463; GFX9-NEXT: s_nop 11464; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc1465; GFX9-NEXT: v_ashrrev_i32_e32 v0, 16, v01466; GFX9-NEXT: s_nop 01467; GFX9-NEXT: v_readfirstlane_b32 s0, v01468; GFX9-NEXT: ; return to shader part epilog1469;1470; GFX11-LABEL: s_sitofp_i1_to_bf16:1471; GFX11: ; %bb.0:1472; GFX11-NEXT: s_bitcmp1_b32 s0, 01473; GFX11-NEXT: s_cselect_b32 s0, -1, 01474; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)1475; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s01476; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 11477; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v01478; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01479; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1480; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v01481; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v11482; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1483; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1484; GFX11-NEXT: v_ashrrev_i32_e32 v0, 16, v01485; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1486; GFX11-NEXT: v_readfirstlane_b32 s0, v01487; GFX11-NEXT: ; return to shader part epilog1488;1489; GFX12-LABEL: s_sitofp_i1_to_bf16:1490; GFX12: ; %bb.0:1491; GFX12-NEXT: s_bitcmp1_b32 s0, 01492; GFX12-NEXT: s_cselect_b32 s0, -1, 01493; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)1494; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s01495; GFX12-NEXT: v_bfe_u32 v1, v0, 16, 11496; GFX12-NEXT: v_or_b32_e32 v2, 0x400000, v01497; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01498; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1499; GFX12-NEXT: v_add_nc_u32_e32 v1, v1, v01500; GFX12-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v11501; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1502; GFX12-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo1503; GFX12-NEXT: v_ashrrev_i32_e32 v0, 16, v01504; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1505; GFX12-NEXT: v_readfirstlane_b32 s0, v01506; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)1507; GFX12-NEXT: ; return to shader part epilog1508 %op = sitofp i1 %num to bfloat1509 %b16 = bitcast bfloat %op to i161510 %b32 = sext i16 %b16 to i321511 ret i32 %b321512}1513 1514define <2 x bfloat> @v_sitofp_v2i1_to_v2bf16(<2 x i1> %num) {1515; GFX7-LABEL: v_sitofp_v2i1_to_v2bf16:1516; GFX7: ; %bb.0:1517; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1518; GFX7-NEXT: v_and_b32_e32 v1, 1, v11519; GFX7-NEXT: v_and_b32_e32 v0, 1, v01520; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v11521; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc1522; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01523; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1524; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01525; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v11526; GFX7-NEXT: s_setpc_b64 s[30:31]1527;1528; GFX9-LABEL: v_sitofp_v2i1_to_v2bf16:1529; GFX9: ; %bb.0:1530; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1531; GFX9-NEXT: v_and_b32_e32 v0, 1, v01532; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01533; GFX9-NEXT: s_movk_i32 s0, 0x7fff1534; GFX9-NEXT: v_and_b32_e32 v1, 1, v11535; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1536; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 11537; GFX9-NEXT: v_add3_u32 v2, v2, v0, s01538; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v01539; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01540; GFX9-NEXT: s_nop 11541; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc1542; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v11543; GFX9-NEXT: s_nop 11544; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc1545; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 11546; GFX9-NEXT: v_add3_u32 v2, v2, v1, s01547; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v11548; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v11549; GFX9-NEXT: s_mov_b32 s0, 0x70603021550; GFX9-NEXT: s_nop 01551; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc1552; GFX9-NEXT: v_perm_b32 v0, v1, v0, s01553; GFX9-NEXT: s_setpc_b64 s[30:31]1554;1555; GFX11-TRUE16-LABEL: v_sitofp_v2i1_to_v2bf16:1556; GFX11-TRUE16: ; %bb.0:1557; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1558; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l1559; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l1560; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1561; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l1562; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1563; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1564; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)1565; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 11566; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1567; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v11568; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11569; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff1570; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1571; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 11572; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v01573; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff1574; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)1575; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo1576; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01577; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo1578; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)1579; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h1580; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1581;1582; GFX11-FAKE16-LABEL: v_sitofp_v2i1_to_v2bf16:1583; GFX11-FAKE16: ; %bb.0:1584; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1585; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01586; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1587; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01588; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1589; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 11590; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v01591; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)1592; GFX11-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff1593; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v11594; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v11595; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1596; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01597; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)1598; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 11599; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v11600; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo1601; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11602; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff1603; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1604; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo1605; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603021606; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1607;1608; GFX12-TRUE16-LABEL: v_sitofp_v2i1_to_v2bf16:1609; GFX12-TRUE16: ; %bb.0:1610; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01611; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01612; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01613; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01614; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01615; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l1616; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l1617; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)1618; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l1619; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1620; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1621; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1622; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1623; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 11624; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1625; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1626; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v11627; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11628; GFX12-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff1629; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1630; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 11631; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v01632; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff1633; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1634; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo1635; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01636; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1637; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo1638; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)1639; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h1640; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1641;1642; GFX12-FAKE16-LABEL: v_sitofp_v2i1_to_v2bf16:1643; GFX12-FAKE16: ; %bb.0:1644; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01645; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01646; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01647; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01648; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01649; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01650; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1651; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01652; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1653; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1654; GFX12-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 11655; GFX12-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v01656; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)1657; GFX12-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff1658; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v11659; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v11660; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1661; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1662; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01663; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1664; GFX12-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 11665; GFX12-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v11666; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1667; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo1668; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11669; GFX12-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff1670; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1671; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1672; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo1673; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603021674; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1675 %op = sitofp <2 x i1> %num to <2 x bfloat>1676 ret <2 x bfloat> %op1677}1678 1679define amdgpu_ps <2 x i32> @s_sitofp_v2i1_to_v2bf16(<2 x i1> inreg %num) {1680; GFX7-LABEL: s_sitofp_v2i1_to_v2bf16:1681; GFX7: ; %bb.0:1682; GFX7-NEXT: s_and_b32 s2, 1, s01683; GFX7-NEXT: s_bitcmp1_b32 s1, 01684; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 01685; GFX7-NEXT: s_cmp_eq_u32 s2, 11686; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]1687; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 01688; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[0:1]1689; GFX7-NEXT: v_ashrrev_i32_e32 v0, 16, v01690; GFX7-NEXT: v_ashrrev_i32_e32 v1, 16, v11691; GFX7-NEXT: v_readfirstlane_b32 s0, v11692; GFX7-NEXT: v_readfirstlane_b32 s1, v01693; GFX7-NEXT: ; return to shader part epilog1694;1695; GFX9-LABEL: s_sitofp_v2i1_to_v2bf16:1696; GFX9: ; %bb.0:1697; GFX9-NEXT: s_and_b32 s2, 1, s01698; GFX9-NEXT: s_bitcmp1_b32 s1, 01699; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 01700; GFX9-NEXT: s_cmp_eq_u32 s2, 11701; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]1702; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 01703; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[0:1]1704; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 11705; GFX9-NEXT: v_add_u32_e32 v3, v3, v11706; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v11707; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v31708; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v11709; GFX9-NEXT: s_nop 11710; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc1711; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 11712; GFX9-NEXT: v_add_u32_e32 v3, v3, v01713; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v01714; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v31715; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01716; GFX9-NEXT: v_ashrrev_i32_e32 v1, 16, v11717; GFX9-NEXT: s_nop 01718; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1719; GFX9-NEXT: v_ashrrev_i32_e32 v0, 16, v01720; GFX9-NEXT: v_readfirstlane_b32 s0, v11721; GFX9-NEXT: v_readfirstlane_b32 s1, v01722; GFX9-NEXT: ; return to shader part epilog1723;1724; GFX11-LABEL: s_sitofp_v2i1_to_v2bf16:1725; GFX11: ; %bb.0:1726; GFX11-NEXT: s_and_b32 s0, 1, s01727; GFX11-NEXT: s_bitcmp1_b32 s1, 01728; GFX11-NEXT: s_cselect_b32 s1, -1, 01729; GFX11-NEXT: s_cmp_eq_u32 s0, 11730; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s11731; GFX11-NEXT: s_cselect_b32 s0, -1, 01732; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)1733; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s01734; GFX11-NEXT: v_bfe_u32 v3, v0, 16, 11735; GFX11-NEXT: v_or_b32_e32 v5, 0x400000, v01736; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)1737; GFX11-NEXT: v_bfe_u32 v2, v1, 16, 11738; GFX11-NEXT: v_or_b32_e32 v4, 0x400000, v11739; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v01740; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11741; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1742; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v11743; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v31744; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1745; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v21746; GFX11-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo1747; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01748; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1749; GFX11-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo1750; GFX11-NEXT: v_ashrrev_i32_e32 v1, 16, v11751; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1752; GFX11-NEXT: v_ashrrev_i32_e32 v0, 16, v01753; GFX11-NEXT: v_readfirstlane_b32 s0, v11754; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1755; GFX11-NEXT: v_readfirstlane_b32 s1, v01756; GFX11-NEXT: ; return to shader part epilog1757;1758; GFX12-LABEL: s_sitofp_v2i1_to_v2bf16:1759; GFX12: ; %bb.0:1760; GFX12-NEXT: s_and_b32 s0, 1, s01761; GFX12-NEXT: s_bitcmp1_b32 s1, 01762; GFX12-NEXT: s_cselect_b32 s1, -1, 01763; GFX12-NEXT: s_cmp_eq_u32 s0, 11764; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s11765; GFX12-NEXT: s_cselect_b32 s0, -1, 01766; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1767; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s01768; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1769; GFX12-NEXT: v_bfe_u32 v3, v0, 16, 11770; GFX12-NEXT: v_or_b32_e32 v5, 0x400000, v01771; GFX12-NEXT: v_bfe_u32 v2, v1, 16, 11772; GFX12-NEXT: v_or_b32_e32 v4, 0x400000, v11773; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1774; GFX12-NEXT: v_add_nc_u32_e32 v3, v3, v01775; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11776; GFX12-NEXT: v_add_nc_u32_e32 v2, v2, v11777; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1778; GFX12-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v31779; GFX12-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v21780; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)1781; GFX12-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo1782; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01783; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)1784; GFX12-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo1785; GFX12-NEXT: v_ashrrev_i32_e32 v1, 16, v11786; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1787; GFX12-NEXT: v_ashrrev_i32_e32 v0, 16, v01788; GFX12-NEXT: v_readfirstlane_b32 s0, v11789; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)1790; GFX12-NEXT: v_readfirstlane_b32 s1, v01791; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)1792; GFX12-NEXT: ; return to shader part epilog1793 %op = sitofp <2 x i1> %num to <2 x bfloat>1794 %b16 = bitcast <2 x bfloat> %op to <2 x i16>1795 %b32 = sext <2 x i16> %b16 to <2 x i32>1796 ret <2 x i32> %b321797}1798 1799define <3 x bfloat> @v_sitofp_v3i1_to_v3bf16(<3 x i1> %num) {1800; GFX7-LABEL: v_sitofp_v3i1_to_v3bf16:1801; GFX7: ; %bb.0:1802; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1803; GFX7-NEXT: v_and_b32_e32 v2, 1, v21804; GFX7-NEXT: v_and_b32_e32 v1, 1, v11805; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v21806; GFX7-NEXT: v_and_b32_e32 v0, 1, v01807; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc1808; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v11809; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc1810; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01811; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1812; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01813; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v11814; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v21815; GFX7-NEXT: s_setpc_b64 s[30:31]1816;1817; GFX9-LABEL: v_sitofp_v3i1_to_v3bf16:1818; GFX9: ; %bb.0:1819; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1820; GFX9-NEXT: v_and_b32_e32 v2, 1, v21821; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v21822; GFX9-NEXT: s_movk_i32 s0, 0x7fff1823; GFX9-NEXT: v_and_b32_e32 v0, 1, v01824; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc1825; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 11826; GFX9-NEXT: v_add3_u32 v3, v3, v2, s01827; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v21828; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v21829; GFX9-NEXT: v_and_b32_e32 v1, 1, v11830; GFX9-NEXT: s_nop 01831; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc1832; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01833; GFX9-NEXT: s_nop 11834; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc1835; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 11836; GFX9-NEXT: v_add3_u32 v3, v3, v0, s01837; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v01838; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v01839; GFX9-NEXT: s_nop 11840; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc1841; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v11842; GFX9-NEXT: s_nop 11843; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc1844; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 11845; GFX9-NEXT: v_add3_u32 v3, v3, v1, s01846; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v11847; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v11848; GFX9-NEXT: s_mov_b32 s0, 0x70603021849; GFX9-NEXT: s_nop 01850; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc1851; GFX9-NEXT: v_perm_b32 v0, v1, v0, s01852; GFX9-NEXT: v_alignbit_b32 v1, s0, v2, 161853; GFX9-NEXT: s_setpc_b64 s[30:31]1854;1855; GFX11-TRUE16-LABEL: v_sitofp_v3i1_to_v3bf16:1856; GFX11-TRUE16: ; %bb.0:1857; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1858; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l1859; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v2.l1860; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 1, v1.l1861; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)1862; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l1863; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo1864; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1865; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)1866; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 11867; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1868; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v1.l1869; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v21870; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff1871; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)1872; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 11873; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1874; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v21875; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v01876; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff1877; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)1878; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 11879; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo1880; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01881; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11882; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff1883; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo1884; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11885; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1886; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h1887; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo1888; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h1889; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1890;1891; GFX11-FAKE16-LABEL: v_sitofp_v3i1_to_v3bf16:1892; GFX11-FAKE16: ; %bb.0:1893; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1894; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 1, v21895; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01896; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1897; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v21898; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo1899; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01900; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)1901; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 11902; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1903; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v21904; GFX11-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff1905; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1906; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 11907; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v01908; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff1909; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v11910; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1911; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v11912; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1913; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01914; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v1, 16, 11915; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11916; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo1917; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11918; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)1919; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff1920; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo1921; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v21922; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)1923; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603021924; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v6, vcc_lo1925; GFX11-FAKE16-NEXT: v_alignbit_b32 v1, s0, v2, 161926; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1927;1928; GFX12-TRUE16-LABEL: v_sitofp_v3i1_to_v3bf16:1929; GFX12-TRUE16: ; %bb.0:1930; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01931; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01932; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01933; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01934; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01935; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l1936; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v2.l1937; GFX12-TRUE16-NEXT: v_and_b16 v1.l, 1, v1.l1938; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)1939; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l1940; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1941; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo1942; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h1943; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 11944; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1945; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1946; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v1.l1947; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v21948; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff1949; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1950; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 11951; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1952; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo1953; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v21954; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v01955; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff1956; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1957; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 11958; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1959; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo1960; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v01961; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11962; GFX12-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff1963; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1964; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo1965; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11966; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1967; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h1968; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1969; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo1970; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h1971; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1972;1973; GFX12-FAKE16-LABEL: v_sitofp_v3i1_to_v3bf16:1974; GFX12-FAKE16: ; %bb.0:1975; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01976; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01977; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01978; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01979; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01980; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 1, v21981; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v01982; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)1983; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v21984; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1985; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo1986; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01987; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)1988; GFX12-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 11989; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)1990; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo1991; GFX12-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v21992; GFX12-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff1993; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1994; GFX12-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 11995; GFX12-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v01996; GFX12-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff1997; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v11998; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)1999; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v12000; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2001; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo2002; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02003; GFX12-FAKE16-NEXT: v_bfe_u32 v5, v1, 16, 12004; GFX12-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12005; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2006; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo2007; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12008; GFX12-FAKE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff2009; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2010; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2011; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo2012; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22013; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603022014; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2015; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v6, vcc_lo2016; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2017; GFX12-FAKE16-NEXT: v_alignbit_b32 v1, s0, v2, 162018; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]2019 %op = sitofp <3 x i1> %num to <3 x bfloat>2020 ret <3 x bfloat> %op2021}2022 2023define amdgpu_ps <3 x i32> @s_sitofp_v3i1_to_v3bf16(<3 x i1> inreg %num) {2024; GFX7-LABEL: s_sitofp_v3i1_to_v3bf16:2025; GFX7: ; %bb.0:2026; GFX7-NEXT: s_and_b32 s4, 1, s02027; GFX7-NEXT: s_and_b32 s3, 1, s12028; GFX7-NEXT: s_bitcmp1_b32 s2, 02029; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 02030; GFX7-NEXT: s_cmp_eq_u32 s3, 12031; GFX7-NEXT: s_cselect_b64 s[2:3], -1, 02032; GFX7-NEXT: s_cmp_eq_u32 s4, 12033; GFX7-NEXT: s_cselect_b64 s[4:5], -1, 02034; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[4:5]2035; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[2:3]2036; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s[0:1]2037; GFX7-NEXT: v_ashrrev_i32_e32 v2, 16, v22038; GFX7-NEXT: v_ashrrev_i32_e32 v1, 16, v12039; GFX7-NEXT: v_ashrrev_i32_e32 v0, 16, v02040; GFX7-NEXT: v_readfirstlane_b32 s0, v02041; GFX7-NEXT: v_readfirstlane_b32 s1, v12042; GFX7-NEXT: v_readfirstlane_b32 s2, v22043; GFX7-NEXT: ; return to shader part epilog2044;2045; GFX9-LABEL: s_sitofp_v3i1_to_v3bf16:2046; GFX9: ; %bb.0:2047; GFX9-NEXT: s_and_b32 s4, 1, s02048; GFX9-NEXT: s_and_b32 s3, 1, s12049; GFX9-NEXT: s_bitcmp1_b32 s2, 02050; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 02051; GFX9-NEXT: s_cmp_eq_u32 s3, 12052; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 02053; GFX9-NEXT: s_cmp_eq_u32 s4, 12054; GFX9-NEXT: s_cselect_b64 s[4:5], -1, 02055; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[4:5]2056; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 12057; GFX9-NEXT: v_add_u32_e32 v2, v2, v02058; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v02059; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v22060; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02061; GFX9-NEXT: s_nop 12062; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc2063; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[2:3]2064; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 12065; GFX9-NEXT: v_add_u32_e32 v3, v3, v12066; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v12067; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v32068; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12069; GFX9-NEXT: v_ashrrev_i32_e32 v0, 16, v02070; GFX9-NEXT: s_nop 02071; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc2072; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s[0:1]2073; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 12074; GFX9-NEXT: v_add_u32_e32 v4, v4, v22075; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v22076; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v42077; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v22078; GFX9-NEXT: v_ashrrev_i32_e32 v1, 16, v12079; GFX9-NEXT: v_readfirstlane_b32 s0, v02080; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v3, vcc2081; GFX9-NEXT: v_ashrrev_i32_e32 v2, 16, v22082; GFX9-NEXT: v_readfirstlane_b32 s1, v12083; GFX9-NEXT: v_readfirstlane_b32 s2, v22084; GFX9-NEXT: ; return to shader part epilog2085;2086; GFX11-LABEL: s_sitofp_v3i1_to_v3bf16:2087; GFX11: ; %bb.0:2088; GFX11-NEXT: s_and_b32 s0, 1, s02089; GFX11-NEXT: s_and_b32 s1, 1, s12090; GFX11-NEXT: s_bitcmp1_b32 s2, 02091; GFX11-NEXT: s_cselect_b32 s2, -1, 02092; GFX11-NEXT: s_cmp_eq_u32 s1, 12093; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s22094; GFX11-NEXT: s_cselect_b32 s1, -1, 02095; GFX11-NEXT: s_cmp_eq_u32 s0, 12096; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s12097; GFX11-NEXT: s_cselect_b32 s0, -1, 02098; GFX11-NEXT: v_bfe_u32 v5, v2, 16, 12099; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s02100; GFX11-NEXT: v_or_b32_e32 v6, 0x400000, v22101; GFX11-NEXT: v_bfe_u32 v3, v0, 16, 12102; GFX11-NEXT: v_or_b32_e32 v7, 0x400000, v02103; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02104; GFX11-NEXT: v_add_nc_u32_e32 v5, v5, v22105; GFX11-NEXT: v_bfe_u32 v4, v1, 16, 12106; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v12107; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2108; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v52109; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v02110; GFX11-NEXT: v_add_nc_u32_e32 v4, v4, v12111; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2112; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v32113; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v42114; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2115; GFX11-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo2116; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12117; GFX11-NEXT: v_ashrrev_i32_e32 v0, 16, v02118; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)2119; GFX11-NEXT: v_cndmask_b32_e32 v1, v4, v8, vcc_lo2120; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22121; GFX11-NEXT: v_readfirstlane_b32 s1, v02122; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2123; GFX11-NEXT: v_ashrrev_i32_e32 v1, 16, v12124; GFX11-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc_lo2125; GFX11-NEXT: v_readfirstlane_b32 s0, v12126; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2127; GFX11-NEXT: v_ashrrev_i32_e32 v2, 16, v22128; GFX11-NEXT: v_readfirstlane_b32 s2, v22129; GFX11-NEXT: ; return to shader part epilog2130;2131; GFX12-LABEL: s_sitofp_v3i1_to_v3bf16:2132; GFX12: ; %bb.0:2133; GFX12-NEXT: s_and_b32 s0, 1, s02134; GFX12-NEXT: s_and_b32 s1, 1, s12135; GFX12-NEXT: s_bitcmp1_b32 s2, 02136; GFX12-NEXT: s_cselect_b32 s2, -1, 02137; GFX12-NEXT: s_cmp_eq_u32 s1, 12138; GFX12-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s22139; GFX12-NEXT: s_cselect_b32 s1, -1, 02140; GFX12-NEXT: s_cmp_eq_u32 s0, 12141; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s12142; GFX12-NEXT: s_cselect_b32 s0, -1, 02143; GFX12-NEXT: v_bfe_u32 v5, v2, 16, 12144; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)2145; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s02146; GFX12-NEXT: v_or_b32_e32 v6, 0x400000, v22147; GFX12-NEXT: v_bfe_u32 v3, v0, 16, 12148; GFX12-NEXT: v_or_b32_e32 v7, 0x400000, v02149; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02150; GFX12-NEXT: v_add_nc_u32_e32 v5, v5, v22151; GFX12-NEXT: v_bfe_u32 v4, v1, 16, 12152; GFX12-NEXT: v_or_b32_e32 v8, 0x400000, v12153; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2154; GFX12-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v52155; GFX12-NEXT: v_add_nc_u32_e32 v3, v3, v02156; GFX12-NEXT: v_add_nc_u32_e32 v4, v4, v12157; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2158; GFX12-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v32159; GFX12-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v42160; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2161; GFX12-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo2162; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12163; GFX12-NEXT: v_ashrrev_i32_e32 v0, 16, v02164; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)2165; GFX12-NEXT: v_cndmask_b32_e32 v1, v4, v8, vcc_lo2166; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22167; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2168; GFX12-NEXT: v_readfirstlane_b32 s1, v02169; GFX12-NEXT: v_ashrrev_i32_e32 v1, 16, v12170; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)2171; GFX12-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc_lo2172; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2173; GFX12-NEXT: v_readfirstlane_b32 s0, v12174; GFX12-NEXT: v_ashrrev_i32_e32 v2, 16, v22175; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2176; GFX12-NEXT: v_readfirstlane_b32 s2, v22177; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)2178; GFX12-NEXT: ; return to shader part epilog2179 %op = sitofp <3 x i1> %num to <3 x bfloat>2180 %b16 = bitcast <3 x bfloat> %op to <3 x i16>2181 %b32 = sext <3 x i16> %b16 to <3 x i32>2182 ret <3 x i32> %b322183}2184 2185define <4 x bfloat> @v_sitofp_v4i1_to_v4bf16(<4 x i1> %num) {2186; GFX7-LABEL: v_sitofp_v4i1_to_v4bf16:2187; GFX7: ; %bb.0:2188; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2189; GFX7-NEXT: v_and_b32_e32 v3, 1, v32190; GFX7-NEXT: v_and_b32_e32 v2, 1, v22191; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v32192; GFX7-NEXT: v_and_b32_e32 v1, 1, v12193; GFX7-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc2194; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v22195; GFX7-NEXT: v_and_b32_e32 v0, 1, v02196; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc2197; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v12198; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc2199; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02200; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc2201; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02202; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12203; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v22204; GFX7-NEXT: v_and_b32_e32 v3, 0xffff0000, v32205; GFX7-NEXT: s_setpc_b64 s[30:31]2206;2207; GFX9-LABEL: v_sitofp_v4i1_to_v4bf16:2208; GFX9: ; %bb.0:2209; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2210; GFX9-NEXT: v_and_b32_e32 v2, 1, v22211; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v22212; GFX9-NEXT: s_movk_i32 s0, 0x7fff2213; GFX9-NEXT: v_and_b32_e32 v3, 1, v32214; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc2215; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 12216; GFX9-NEXT: v_add3_u32 v4, v4, v2, s02217; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v22218; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v22219; GFX9-NEXT: v_and_b32_e32 v0, 1, v02220; GFX9-NEXT: v_and_b32_e32 v1, 1, v12221; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc2222; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v32223; GFX9-NEXT: s_nop 12224; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc2225; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 12226; GFX9-NEXT: v_add3_u32 v4, v4, v3, s02227; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v32228; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v32229; GFX9-NEXT: s_nop 12230; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc2231; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02232; GFX9-NEXT: s_nop 12233; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc2234; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 12235; GFX9-NEXT: v_add3_u32 v4, v4, v0, s02236; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v02237; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02238; GFX9-NEXT: s_nop 12239; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc2240; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v12241; GFX9-NEXT: s_nop 12242; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc2243; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 12244; GFX9-NEXT: v_add3_u32 v4, v4, v1, s02245; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v12246; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12247; GFX9-NEXT: s_mov_b32 s0, 0x70603022248; GFX9-NEXT: s_nop 02249; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc2250; GFX9-NEXT: v_perm_b32 v0, v1, v0, s02251; GFX9-NEXT: v_perm_b32 v1, v3, v2, s02252; GFX9-NEXT: s_setpc_b64 s[30:31]2253;2254; GFX11-TRUE16-LABEL: v_sitofp_v4i1_to_v4bf16:2255; GFX11-TRUE16: ; %bb.0:2256; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2257; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v3.l2258; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 1, v2.l2259; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l2260; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)2261; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h2262; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l2263; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo2264; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v2.l2265; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 12266; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo2267; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l2268; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v32269; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2270; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff2271; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 12272; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo2273; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h2274; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v22275; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2276; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff2277; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 12278; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo2279; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22280; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12281; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2282; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff2283; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 12284; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo2285; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12286; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v02287; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2288; GFX11-TRUE16-NEXT: v_add3_u32 v5, v9, v0, 0x7fff2289; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo2290; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32291; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo2292; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02293; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h2294; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo2295; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h2296; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2297;2298; GFX11-FAKE16-LABEL: v_sitofp_v4i1_to_v4bf16:2299; GFX11-FAKE16: ; %bb.0:2300; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2301; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 1, v22302; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 1, v32303; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2304; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v22305; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo2306; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v32307; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2308; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 12309; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo2310; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v22311; GFX11-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff2312; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)2313; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 12314; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v32315; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 1, v12316; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff2317; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v02318; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)2319; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02320; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo2321; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v12322; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 12323; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo2324; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22325; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2326; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff2327; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 12328; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo2329; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v02330; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02331; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2332; GFX11-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff2333; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12334; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v4, vcc_lo2335; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12336; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2337; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo2338; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32339; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603022340; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v9, vcc_lo2341; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2342; GFX11-FAKE16-NEXT: v_perm_b32 v1, v3, v2, 0x70603022343; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2344;2345; GFX12-TRUE16-LABEL: v_sitofp_v4i1_to_v4bf16:2346; GFX12-TRUE16: ; %bb.0:2347; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x02348; GFX12-TRUE16-NEXT: s_wait_expcnt 0x02349; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x02350; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x02351; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x02352; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v3.l2353; GFX12-TRUE16-NEXT: v_and_b16 v2.l, 1, v2.l2354; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 1, v0.l2355; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)2356; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h2357; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 1, v1.l2358; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2359; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo2360; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v2.l2361; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 12362; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2363; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo2364; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.l2365; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v32366; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff2367; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2368; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 12369; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2370; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo2371; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 1, v0.h2372; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v22373; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff2374; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2375; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 12376; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2377; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo2378; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22379; GFX12-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12380; GFX12-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff2381; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2382; GFX12-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 12383; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2384; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo2385; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12386; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v02387; GFX12-TRUE16-NEXT: v_add3_u32 v5, v9, v0, 0x7fff2388; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2389; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo2390; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32391; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2392; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo2393; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02394; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h2395; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2396; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo2397; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h2398; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]2399;2400; GFX12-FAKE16-LABEL: v_sitofp_v4i1_to_v4bf16:2401; GFX12-FAKE16: ; %bb.0:2402; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02403; GFX12-FAKE16-NEXT: s_wait_expcnt 0x02404; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x02405; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x02406; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x02407; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 1, v22408; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 1, v32409; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2410; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v22411; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2412; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo2413; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v32414; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)2415; GFX12-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 12416; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2417; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo2418; GFX12-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v22419; GFX12-FAKE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff2420; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)2421; GFX12-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 12422; GFX12-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v32423; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 1, v12424; GFX12-FAKE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff2425; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v02426; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2427; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02428; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2429; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo2430; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v12431; GFX12-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 12432; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2433; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo2434; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22435; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2436; GFX12-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff2437; GFX12-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 12438; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2439; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo2440; GFX12-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v02441; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02442; GFX12-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff2443; GFX12-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12444; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2445; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v4, vcc_lo2446; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12447; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2448; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo2449; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32450; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)2451; GFX12-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x70603022452; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2453; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v9, vcc_lo2454; GFX12-FAKE16-NEXT: v_perm_b32 v1, v3, v2, 0x70603022455; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]2456 %op = sitofp <4 x i1> %num to <4 x bfloat>2457 ret <4 x bfloat> %op2458}2459 2460define amdgpu_ps <4 x i32> @s_sitofp_v4i1_to_v4bf16(<4 x i1> inreg %num) {2461; GFX7-LABEL: s_sitofp_v4i1_to_v4bf16:2462; GFX7: ; %bb.0:2463; GFX7-NEXT: s_and_b32 s6, 1, s02464; GFX7-NEXT: s_and_b32 s4, 1, s12465; GFX7-NEXT: s_and_b32 s2, 1, s22466; GFX7-NEXT: s_bitcmp1_b32 s3, 02467; GFX7-NEXT: s_cselect_b64 s[0:1], -1, 02468; GFX7-NEXT: s_cmp_eq_u32 s2, 12469; GFX7-NEXT: s_cselect_b64 s[2:3], -1, 02470; GFX7-NEXT: s_cmp_eq_u32 s4, 12471; GFX7-NEXT: s_cselect_b64 s[4:5], -1, 02472; GFX7-NEXT: s_cmp_eq_u32 s6, 12473; GFX7-NEXT: s_cselect_b64 s[6:7], -1, 02474; GFX7-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[6:7]2475; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[4:5]2476; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s[2:3]2477; GFX7-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, s[0:1]2478; GFX7-NEXT: v_ashrrev_i32_e32 v3, 16, v32479; GFX7-NEXT: v_ashrrev_i32_e32 v2, 16, v22480; GFX7-NEXT: v_ashrrev_i32_e32 v1, 16, v12481; GFX7-NEXT: v_ashrrev_i32_e32 v0, 16, v02482; GFX7-NEXT: v_readfirstlane_b32 s0, v02483; GFX7-NEXT: v_readfirstlane_b32 s1, v12484; GFX7-NEXT: v_readfirstlane_b32 s2, v22485; GFX7-NEXT: v_readfirstlane_b32 s3, v32486; GFX7-NEXT: ; return to shader part epilog2487;2488; GFX9-LABEL: s_sitofp_v4i1_to_v4bf16:2489; GFX9: ; %bb.0:2490; GFX9-NEXT: s_and_b32 s6, 1, s02491; GFX9-NEXT: s_and_b32 s4, 1, s12492; GFX9-NEXT: s_and_b32 s2, 1, s22493; GFX9-NEXT: s_bitcmp1_b32 s3, 02494; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 02495; GFX9-NEXT: s_cmp_eq_u32 s2, 12496; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 02497; GFX9-NEXT: s_cmp_eq_u32 s4, 12498; GFX9-NEXT: s_cselect_b64 s[4:5], -1, 02499; GFX9-NEXT: s_cmp_eq_u32 s6, 12500; GFX9-NEXT: s_cselect_b64 s[6:7], -1, 02501; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s[6:7]2502; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 12503; GFX9-NEXT: v_add_u32_e32 v2, v2, v02504; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v02505; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v22506; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02507; GFX9-NEXT: s_nop 12508; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc2509; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s[4:5]2510; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 12511; GFX9-NEXT: v_add_u32_e32 v3, v3, v12512; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v12513; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v32514; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12515; GFX9-NEXT: v_ashrrev_i32_e32 v0, 16, v02516; GFX9-NEXT: s_nop 02517; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc2518; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, s[2:3]2519; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 12520; GFX9-NEXT: v_add_u32_e32 v4, v4, v22521; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v22522; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v42523; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v22524; GFX9-NEXT: v_ashrrev_i32_e32 v1, 16, v12525; GFX9-NEXT: s_nop 02526; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v3, vcc2527; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, s[0:1]2528; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 12529; GFX9-NEXT: v_add_u32_e32 v5, v5, v32530; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v32531; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v52532; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v32533; GFX9-NEXT: v_ashrrev_i32_e32 v2, 16, v22534; GFX9-NEXT: v_readfirstlane_b32 s0, v02535; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc2536; GFX9-NEXT: v_ashrrev_i32_e32 v3, 16, v32537; GFX9-NEXT: v_readfirstlane_b32 s1, v12538; GFX9-NEXT: v_readfirstlane_b32 s2, v22539; GFX9-NEXT: v_readfirstlane_b32 s3, v32540; GFX9-NEXT: ; return to shader part epilog2541;2542; GFX11-LABEL: s_sitofp_v4i1_to_v4bf16:2543; GFX11: ; %bb.0:2544; GFX11-NEXT: s_and_b32 s0, 1, s02545; GFX11-NEXT: s_and_b32 s1, 1, s12546; GFX11-NEXT: s_and_b32 s2, 1, s22547; GFX11-NEXT: s_bitcmp1_b32 s3, 02548; GFX11-NEXT: s_cselect_b32 s3, -1, 02549; GFX11-NEXT: s_cmp_eq_u32 s2, 12550; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s32551; GFX11-NEXT: s_cselect_b32 s2, -1, 02552; GFX11-NEXT: s_cmp_eq_u32 s1, 12553; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, -1.0, s22554; GFX11-NEXT: s_cselect_b32 s1, -1, 02555; GFX11-NEXT: s_cmp_eq_u32 s0, 12556; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, s12557; GFX11-NEXT: s_cselect_b32 s0, -1, 02558; GFX11-NEXT: v_bfe_u32 v7, v4, 16, 12559; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s02560; GFX11-NEXT: v_bfe_u32 v5, v1, 16, 12561; GFX11-NEXT: v_bfe_u32 v6, v3, 16, 12562; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v32563; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)2564; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 12565; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v02566; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02567; GFX11-NEXT: v_add_nc_u32_e32 v7, v7, v42568; GFX11-NEXT: v_add_nc_u32_e32 v5, v5, v12569; GFX11-NEXT: v_add_nc_u32_e32 v6, v6, v32570; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2571; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v72572; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v02573; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v52574; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2575; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v22576; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v9, vcc_lo2577; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v62578; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32579; GFX11-NEXT: v_or_b32_e32 v6, 0x400000, v42580; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v12581; GFX11-NEXT: v_ashrrev_i32_e32 v0, 16, v02582; GFX11-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc_lo2583; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42584; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2585; GFX11-NEXT: v_readfirstlane_b32 s0, v02586; GFX11-NEXT: v_ashrrev_i32_e32 v2, 16, v22587; GFX11-NEXT: v_cndmask_b32_e32 v3, v7, v6, vcc_lo2588; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12589; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2590; GFX11-NEXT: v_readfirstlane_b32 s1, v22591; GFX11-NEXT: v_ashrrev_i32_e32 v3, 16, v32592; GFX11-NEXT: v_cndmask_b32_e32 v1, v5, v9, vcc_lo2593; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2594; GFX11-NEXT: v_readfirstlane_b32 s2, v32595; GFX11-NEXT: v_ashrrev_i32_e32 v1, 16, v12596; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2597; GFX11-NEXT: v_readfirstlane_b32 s3, v12598; GFX11-NEXT: ; return to shader part epilog2599;2600; GFX12-LABEL: s_sitofp_v4i1_to_v4bf16:2601; GFX12: ; %bb.0:2602; GFX12-NEXT: s_and_b32 s0, 1, s02603; GFX12-NEXT: s_and_b32 s1, 1, s12604; GFX12-NEXT: s_and_b32 s2, 1, s22605; GFX12-NEXT: s_bitcmp1_b32 s3, 02606; GFX12-NEXT: s_cselect_b32 s3, -1, 02607; GFX12-NEXT: s_cmp_eq_u32 s2, 12608; GFX12-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, s32609; GFX12-NEXT: s_cselect_b32 s2, -1, 02610; GFX12-NEXT: s_cmp_eq_u32 s1, 12611; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)2612; GFX12-NEXT: v_cndmask_b32_e64 v4, 0, -1.0, s22613; GFX12-NEXT: s_cselect_b32 s1, -1, 02614; GFX12-NEXT: s_cmp_eq_u32 s0, 12615; GFX12-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, s12616; GFX12-NEXT: s_cselect_b32 s0, -1, 02617; GFX12-NEXT: v_bfe_u32 v7, v4, 16, 12618; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)2619; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, s02620; GFX12-NEXT: v_bfe_u32 v5, v1, 16, 12621; GFX12-NEXT: v_bfe_u32 v6, v3, 16, 12622; GFX12-NEXT: v_or_b32_e32 v8, 0x400000, v32623; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4)2624; GFX12-NEXT: v_bfe_u32 v2, v0, 16, 12625; GFX12-NEXT: v_or_b32_e32 v9, 0x400000, v02626; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02627; GFX12-NEXT: v_add_nc_u32_e32 v7, v7, v42628; GFX12-NEXT: v_add_nc_u32_e32 v5, v5, v12629; GFX12-NEXT: v_add_nc_u32_e32 v6, v6, v32630; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2631; GFX12-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v72632; GFX12-NEXT: v_add_nc_u32_e32 v2, v2, v02633; GFX12-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v52634; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2635; GFX12-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v22636; GFX12-NEXT: v_cndmask_b32_e32 v0, v2, v9, vcc_lo2637; GFX12-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v62638; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32639; GFX12-NEXT: v_or_b32_e32 v6, 0x400000, v42640; GFX12-NEXT: v_or_b32_e32 v9, 0x400000, v12641; GFX12-NEXT: v_ashrrev_i32_e32 v0, 16, v02642; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)2643; GFX12-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc_lo2644; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42645; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2646; GFX12-NEXT: v_readfirstlane_b32 s0, v02647; GFX12-NEXT: v_ashrrev_i32_e32 v2, 16, v22648; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)2649; GFX12-NEXT: v_cndmask_b32_e32 v3, v7, v6, vcc_lo2650; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12651; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2652; GFX12-NEXT: v_readfirstlane_b32 s1, v22653; GFX12-NEXT: v_ashrrev_i32_e32 v3, 16, v32654; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)2655; GFX12-NEXT: v_cndmask_b32_e32 v1, v5, v9, vcc_lo2656; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2657; GFX12-NEXT: v_readfirstlane_b32 s2, v32658; GFX12-NEXT: v_ashrrev_i32_e32 v1, 16, v12659; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2660; GFX12-NEXT: v_readfirstlane_b32 s3, v12661; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)2662; GFX12-NEXT: ; return to shader part epilog2663 %op = sitofp <4 x i1> %num to <4 x bfloat>2664 %b16 = bitcast <4 x bfloat> %op to <4 x i16>2665 %b32 = sext <4 x i16> %b16 to <4 x i32>2666 ret <4 x i32> %b322667}2668