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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=VI %s3; RUN: llc -mtriple=amdgcn < %s| FileCheck -check-prefix=SI %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s| FileCheck -check-prefix=GFX11-FAKE16 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s| FileCheck -check-prefix=GFX11-TRUE16 %s6 7;;;==========================================================================;;;8;; 16-bit integer comparisons9;;;==========================================================================;;;10define amdgpu_kernel void @i16_eq(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {11; VI-LABEL: i16_eq:12; VI: ; %bb.0: ; %entry13; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2414; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3415; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v016; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v017; VI-NEXT: s_waitcnt lgkmcnt(0)18; VI-NEXT: v_mov_b32_e32 v2, s319; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v320; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc21; VI-NEXT: v_mov_b32_e32 v4, s522; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v323; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc24; VI-NEXT: flat_load_ushort v2, v[1:2]25; VI-NEXT: flat_load_ushort v3, v[3:4]26; VI-NEXT: v_mov_b32_e32 v1, s127; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v028; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc29; VI-NEXT: s_waitcnt vmcnt(0)30; VI-NEXT: v_cmp_eq_u16_e32 vcc, v2, v331; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc32; VI-NEXT: flat_store_dword v[0:1], v233; VI-NEXT: s_endpgm34;35; SI-LABEL: i16_eq:36; SI: ; %bb.0: ; %entry37; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x938; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd39; SI-NEXT: s_mov_b32 s11, 0xf00040; SI-NEXT: s_mov_b32 s10, 041; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v042; SI-NEXT: v_mov_b32_e32 v2, 043; SI-NEXT: s_mov_b64 s[6:7], s[10:11]44; SI-NEXT: s_waitcnt lgkmcnt(0)45; SI-NEXT: s_mov_b64 s[8:9], s[2:3]46; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr6447; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr6448; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v049; SI-NEXT: s_mov_b64 s[2:3], s[10:11]50; SI-NEXT: s_waitcnt vmcnt(0)51; SI-NEXT: v_cmp_eq_u32_e32 vcc, v3, v452; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc53; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6454; SI-NEXT: s_endpgm55;56; GFX11-FAKE16-LABEL: i16_eq:57; GFX11-FAKE16: ; %bb.0: ; %entry58; GFX11-FAKE16-NEXT: s_clause 0x159; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2460; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x3461; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v062; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)63; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v064; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v065; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)66; GFX11-FAKE16-NEXT: s_clause 0x167; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]68; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]69; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)70; GFX11-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, v2, v171; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo72; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]73; GFX11-FAKE16-NEXT: s_endpgm74;75; GFX11-TRUE16-LABEL: i16_eq:76; GFX11-TRUE16: ; %bb.0: ; %entry77; GFX11-TRUE16-NEXT: s_clause 0x178; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2479; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x3480; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v081; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)82; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v183; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v184; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)85; GFX11-TRUE16-NEXT: s_clause 0x186; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]87; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]88; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)89; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, v0.l, v0.h90; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo91; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]92; GFX11-TRUE16-NEXT: s_endpgm93entry:94 %tid = call i32 @llvm.amdgcn.workitem.id.x()95 %tid.ext = sext i32 %tid to i6496 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext97 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext98 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext99 %a = load i16, ptr addrspace(1) %a.gep100 %b = load i16, ptr addrspace(1) %b.gep101 %tmp0 = icmp eq i16 %a, %b102 %tmp1 = sext i1 %tmp0 to i32103 store i32 %tmp1, ptr addrspace(1) %out.gep104 ret void105}106 107define amdgpu_kernel void @i16_ne(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {108; VI-LABEL: i16_ne:109; VI: ; %bb.0: ; %entry110; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24111; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34112; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0113; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0114; VI-NEXT: s_waitcnt lgkmcnt(0)115; VI-NEXT: v_mov_b32_e32 v2, s3116; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3117; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc118; VI-NEXT: v_mov_b32_e32 v4, s5119; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3120; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc121; VI-NEXT: flat_load_ushort v2, v[1:2]122; VI-NEXT: flat_load_ushort v3, v[3:4]123; VI-NEXT: v_mov_b32_e32 v1, s1124; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0125; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc126; VI-NEXT: s_waitcnt vmcnt(0)127; VI-NEXT: v_cmp_ne_u16_e32 vcc, v2, v3128; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc129; VI-NEXT: flat_store_dword v[0:1], v2130; VI-NEXT: s_endpgm131;132; SI-LABEL: i16_ne:133; SI: ; %bb.0: ; %entry134; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9135; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd136; SI-NEXT: s_mov_b32 s11, 0xf000137; SI-NEXT: s_mov_b32 s10, 0138; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0139; SI-NEXT: v_mov_b32_e32 v2, 0140; SI-NEXT: s_mov_b64 s[6:7], s[10:11]141; SI-NEXT: s_waitcnt lgkmcnt(0)142; SI-NEXT: s_mov_b64 s[8:9], s[2:3]143; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr64144; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64145; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0146; SI-NEXT: s_mov_b64 s[2:3], s[10:11]147; SI-NEXT: s_waitcnt vmcnt(0)148; SI-NEXT: v_cmp_ne_u32_e32 vcc, v3, v4149; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc150; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64151; SI-NEXT: s_endpgm152;153; GFX11-FAKE16-LABEL: i16_ne:154; GFX11-FAKE16: ; %bb.0: ; %entry155; GFX11-FAKE16-NEXT: s_clause 0x1156; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24157; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34158; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0159; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)160; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0161; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0162; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)163; GFX11-FAKE16-NEXT: s_clause 0x1164; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]165; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]166; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)167; GFX11-FAKE16-NEXT: v_cmp_ne_u16_e32 vcc_lo, v2, v1168; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo169; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]170; GFX11-FAKE16-NEXT: s_endpgm171;172; GFX11-TRUE16-LABEL: i16_ne:173; GFX11-TRUE16: ; %bb.0: ; %entry174; GFX11-TRUE16-NEXT: s_clause 0x1175; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24176; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34177; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0178; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)179; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1180; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1181; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)182; GFX11-TRUE16-NEXT: s_clause 0x1183; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]184; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]185; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)186; GFX11-TRUE16-NEXT: v_cmp_ne_u16_e32 vcc_lo, v0.l, v0.h187; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo188; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]189; GFX11-TRUE16-NEXT: s_endpgm190entry:191 %tid = call i32 @llvm.amdgcn.workitem.id.x()192 %tid.ext = sext i32 %tid to i64193 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext194 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext195 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext196 %a = load i16, ptr addrspace(1) %a.gep197 %b = load i16, ptr addrspace(1) %b.gep198 %tmp0 = icmp ne i16 %a, %b199 %tmp1 = sext i1 %tmp0 to i32200 store i32 %tmp1, ptr addrspace(1) %out.gep201 ret void202}203 204define amdgpu_kernel void @i16_ugt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {205; VI-LABEL: i16_ugt:206; VI: ; %bb.0: ; %entry207; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24208; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34209; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0210; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0211; VI-NEXT: s_waitcnt lgkmcnt(0)212; VI-NEXT: v_mov_b32_e32 v2, s3213; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3214; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc215; VI-NEXT: v_mov_b32_e32 v4, s5216; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3217; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc218; VI-NEXT: flat_load_ushort v2, v[1:2]219; VI-NEXT: flat_load_ushort v3, v[3:4]220; VI-NEXT: v_mov_b32_e32 v1, s1221; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0222; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc223; VI-NEXT: s_waitcnt vmcnt(0)224; VI-NEXT: v_cmp_gt_u16_e32 vcc, v2, v3225; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc226; VI-NEXT: flat_store_dword v[0:1], v2227; VI-NEXT: s_endpgm228;229; SI-LABEL: i16_ugt:230; SI: ; %bb.0: ; %entry231; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9232; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd233; SI-NEXT: s_mov_b32 s11, 0xf000234; SI-NEXT: s_mov_b32 s10, 0235; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0236; SI-NEXT: v_mov_b32_e32 v2, 0237; SI-NEXT: s_mov_b64 s[6:7], s[10:11]238; SI-NEXT: s_waitcnt lgkmcnt(0)239; SI-NEXT: s_mov_b64 s[8:9], s[2:3]240; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr64241; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64242; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0243; SI-NEXT: s_mov_b64 s[2:3], s[10:11]244; SI-NEXT: s_waitcnt vmcnt(0)245; SI-NEXT: v_cmp_gt_u32_e32 vcc, v3, v4246; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc247; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64248; SI-NEXT: s_endpgm249;250; GFX11-FAKE16-LABEL: i16_ugt:251; GFX11-FAKE16: ; %bb.0: ; %entry252; GFX11-FAKE16-NEXT: s_clause 0x1253; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24254; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34255; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0256; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)257; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0258; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0259; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)260; GFX11-FAKE16-NEXT: s_clause 0x1261; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]262; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]263; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)264; GFX11-FAKE16-NEXT: v_cmp_gt_u16_e32 vcc_lo, v2, v1265; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo266; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]267; GFX11-FAKE16-NEXT: s_endpgm268;269; GFX11-TRUE16-LABEL: i16_ugt:270; GFX11-TRUE16: ; %bb.0: ; %entry271; GFX11-TRUE16-NEXT: s_clause 0x1272; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24273; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34274; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0275; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)276; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1277; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1278; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)279; GFX11-TRUE16-NEXT: s_clause 0x1280; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]281; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]282; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)283; GFX11-TRUE16-NEXT: v_cmp_gt_u16_e32 vcc_lo, v0.l, v0.h284; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo285; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]286; GFX11-TRUE16-NEXT: s_endpgm287entry:288 %tid = call i32 @llvm.amdgcn.workitem.id.x()289 %tid.ext = sext i32 %tid to i64290 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext291 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext292 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext293 %a = load i16, ptr addrspace(1) %a.gep294 %b = load i16, ptr addrspace(1) %b.gep295 %tmp0 = icmp ugt i16 %a, %b296 %tmp1 = sext i1 %tmp0 to i32297 store i32 %tmp1, ptr addrspace(1) %out.gep298 ret void299}300 301define amdgpu_kernel void @i16_uge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {302; VI-LABEL: i16_uge:303; VI: ; %bb.0: ; %entry304; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24305; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34306; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0307; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0308; VI-NEXT: s_waitcnt lgkmcnt(0)309; VI-NEXT: v_mov_b32_e32 v2, s3310; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3311; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc312; VI-NEXT: v_mov_b32_e32 v4, s5313; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3314; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc315; VI-NEXT: flat_load_ushort v2, v[1:2]316; VI-NEXT: flat_load_ushort v3, v[3:4]317; VI-NEXT: v_mov_b32_e32 v1, s1318; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0319; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc320; VI-NEXT: s_waitcnt vmcnt(0)321; VI-NEXT: v_cmp_ge_u16_e32 vcc, v2, v3322; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc323; VI-NEXT: flat_store_dword v[0:1], v2324; VI-NEXT: s_endpgm325;326; SI-LABEL: i16_uge:327; SI: ; %bb.0: ; %entry328; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9329; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd330; SI-NEXT: s_mov_b32 s11, 0xf000331; SI-NEXT: s_mov_b32 s10, 0332; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0333; SI-NEXT: v_mov_b32_e32 v2, 0334; SI-NEXT: s_mov_b64 s[6:7], s[10:11]335; SI-NEXT: s_waitcnt lgkmcnt(0)336; SI-NEXT: s_mov_b64 s[8:9], s[2:3]337; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr64338; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64339; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0340; SI-NEXT: s_mov_b64 s[2:3], s[10:11]341; SI-NEXT: s_waitcnt vmcnt(0)342; SI-NEXT: v_cmp_ge_u32_e32 vcc, v3, v4343; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc344; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64345; SI-NEXT: s_endpgm346;347; GFX11-FAKE16-LABEL: i16_uge:348; GFX11-FAKE16: ; %bb.0: ; %entry349; GFX11-FAKE16-NEXT: s_clause 0x1350; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24351; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34352; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0353; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)354; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0355; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0356; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)357; GFX11-FAKE16-NEXT: s_clause 0x1358; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]359; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]360; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)361; GFX11-FAKE16-NEXT: v_cmp_ge_u16_e32 vcc_lo, v2, v1362; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo363; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]364; GFX11-FAKE16-NEXT: s_endpgm365;366; GFX11-TRUE16-LABEL: i16_uge:367; GFX11-TRUE16: ; %bb.0: ; %entry368; GFX11-TRUE16-NEXT: s_clause 0x1369; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24370; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34371; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0372; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)373; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1374; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1375; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)376; GFX11-TRUE16-NEXT: s_clause 0x1377; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]378; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]379; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)380; GFX11-TRUE16-NEXT: v_cmp_ge_u16_e32 vcc_lo, v0.l, v0.h381; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo382; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]383; GFX11-TRUE16-NEXT: s_endpgm384entry:385 %tid = call i32 @llvm.amdgcn.workitem.id.x()386 %tid.ext = sext i32 %tid to i64387 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext388 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext389 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext390 %a = load i16, ptr addrspace(1) %a.gep391 %b = load i16, ptr addrspace(1) %b.gep392 %tmp0 = icmp uge i16 %a, %b393 %tmp1 = sext i1 %tmp0 to i32394 store i32 %tmp1, ptr addrspace(1) %out.gep395 ret void396}397 398define amdgpu_kernel void @i16_ult(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {399; VI-LABEL: i16_ult:400; VI: ; %bb.0: ; %entry401; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24402; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34403; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0404; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0405; VI-NEXT: s_waitcnt lgkmcnt(0)406; VI-NEXT: v_mov_b32_e32 v2, s3407; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3408; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc409; VI-NEXT: v_mov_b32_e32 v4, s5410; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3411; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc412; VI-NEXT: flat_load_ushort v2, v[1:2]413; VI-NEXT: flat_load_ushort v3, v[3:4]414; VI-NEXT: v_mov_b32_e32 v1, s1415; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0416; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc417; VI-NEXT: s_waitcnt vmcnt(0)418; VI-NEXT: v_cmp_lt_u16_e32 vcc, v2, v3419; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc420; VI-NEXT: flat_store_dword v[0:1], v2421; VI-NEXT: s_endpgm422;423; SI-LABEL: i16_ult:424; SI: ; %bb.0: ; %entry425; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9426; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd427; SI-NEXT: s_mov_b32 s11, 0xf000428; SI-NEXT: s_mov_b32 s10, 0429; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0430; SI-NEXT: v_mov_b32_e32 v2, 0431; SI-NEXT: s_mov_b64 s[6:7], s[10:11]432; SI-NEXT: s_waitcnt lgkmcnt(0)433; SI-NEXT: s_mov_b64 s[8:9], s[2:3]434; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr64435; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64436; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0437; SI-NEXT: s_mov_b64 s[2:3], s[10:11]438; SI-NEXT: s_waitcnt vmcnt(0)439; SI-NEXT: v_cmp_lt_u32_e32 vcc, v3, v4440; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc441; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64442; SI-NEXT: s_endpgm443;444; GFX11-FAKE16-LABEL: i16_ult:445; GFX11-FAKE16: ; %bb.0: ; %entry446; GFX11-FAKE16-NEXT: s_clause 0x1447; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24448; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34449; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0450; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)451; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0452; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0453; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)454; GFX11-FAKE16-NEXT: s_clause 0x1455; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]456; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]457; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)458; GFX11-FAKE16-NEXT: v_cmp_lt_u16_e32 vcc_lo, v2, v1459; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo460; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]461; GFX11-FAKE16-NEXT: s_endpgm462;463; GFX11-TRUE16-LABEL: i16_ult:464; GFX11-TRUE16: ; %bb.0: ; %entry465; GFX11-TRUE16-NEXT: s_clause 0x1466; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24467; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34468; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0469; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)470; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1471; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1472; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)473; GFX11-TRUE16-NEXT: s_clause 0x1474; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]475; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]476; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)477; GFX11-TRUE16-NEXT: v_cmp_lt_u16_e32 vcc_lo, v0.l, v0.h478; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo479; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]480; GFX11-TRUE16-NEXT: s_endpgm481entry:482 %tid = call i32 @llvm.amdgcn.workitem.id.x()483 %tid.ext = sext i32 %tid to i64484 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext485 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext486 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext487 %a = load i16, ptr addrspace(1) %a.gep488 %b = load i16, ptr addrspace(1) %b.gep489 %tmp0 = icmp ult i16 %a, %b490 %tmp1 = sext i1 %tmp0 to i32491 store i32 %tmp1, ptr addrspace(1) %out.gep492 ret void493}494 495define amdgpu_kernel void @i16_ule(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {496; VI-LABEL: i16_ule:497; VI: ; %bb.0: ; %entry498; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24499; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34500; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0501; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0502; VI-NEXT: s_waitcnt lgkmcnt(0)503; VI-NEXT: v_mov_b32_e32 v2, s3504; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3505; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc506; VI-NEXT: v_mov_b32_e32 v4, s5507; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3508; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc509; VI-NEXT: flat_load_ushort v2, v[1:2]510; VI-NEXT: flat_load_ushort v3, v[3:4]511; VI-NEXT: v_mov_b32_e32 v1, s1512; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0513; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc514; VI-NEXT: s_waitcnt vmcnt(0)515; VI-NEXT: v_cmp_le_u16_e32 vcc, v2, v3516; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc517; VI-NEXT: flat_store_dword v[0:1], v2518; VI-NEXT: s_endpgm519;520; SI-LABEL: i16_ule:521; SI: ; %bb.0: ; %entry522; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9523; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd524; SI-NEXT: s_mov_b32 s11, 0xf000525; SI-NEXT: s_mov_b32 s10, 0526; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0527; SI-NEXT: v_mov_b32_e32 v2, 0528; SI-NEXT: s_mov_b64 s[6:7], s[10:11]529; SI-NEXT: s_waitcnt lgkmcnt(0)530; SI-NEXT: s_mov_b64 s[8:9], s[2:3]531; SI-NEXT: buffer_load_ushort v3, v[1:2], s[8:11], 0 addr64532; SI-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64533; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0534; SI-NEXT: s_mov_b64 s[2:3], s[10:11]535; SI-NEXT: s_waitcnt vmcnt(0)536; SI-NEXT: v_cmp_le_u32_e32 vcc, v3, v4537; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc538; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64539; SI-NEXT: s_endpgm540;541; GFX11-FAKE16-LABEL: i16_ule:542; GFX11-FAKE16: ; %bb.0: ; %entry543; GFX11-FAKE16-NEXT: s_clause 0x1544; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24545; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34546; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0547; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)548; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0549; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0550; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)551; GFX11-FAKE16-NEXT: s_clause 0x1552; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]553; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]554; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)555; GFX11-FAKE16-NEXT: v_cmp_le_u16_e32 vcc_lo, v2, v1556; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo557; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]558; GFX11-FAKE16-NEXT: s_endpgm559;560; GFX11-TRUE16-LABEL: i16_ule:561; GFX11-TRUE16: ; %bb.0: ; %entry562; GFX11-TRUE16-NEXT: s_clause 0x1563; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24564; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34565; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0566; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)567; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1568; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1569; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)570; GFX11-TRUE16-NEXT: s_clause 0x1571; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]572; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]573; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)574; GFX11-TRUE16-NEXT: v_cmp_le_u16_e32 vcc_lo, v0.l, v0.h575; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo576; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]577; GFX11-TRUE16-NEXT: s_endpgm578entry:579 %tid = call i32 @llvm.amdgcn.workitem.id.x()580 %tid.ext = sext i32 %tid to i64581 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext582 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext583 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext584 %a = load i16, ptr addrspace(1) %a.gep585 %b = load i16, ptr addrspace(1) %b.gep586 %tmp0 = icmp ule i16 %a, %b587 %tmp1 = sext i1 %tmp0 to i32588 store i32 %tmp1, ptr addrspace(1) %out.gep589 ret void590 591}592 593define amdgpu_kernel void @i16_sgt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {594; VI-LABEL: i16_sgt:595; VI: ; %bb.0: ; %entry596; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24597; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34598; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0599; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0600; VI-NEXT: s_waitcnt lgkmcnt(0)601; VI-NEXT: v_mov_b32_e32 v2, s3602; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3603; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc604; VI-NEXT: v_mov_b32_e32 v4, s5605; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3606; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc607; VI-NEXT: flat_load_ushort v2, v[1:2]608; VI-NEXT: flat_load_ushort v3, v[3:4]609; VI-NEXT: v_mov_b32_e32 v1, s1610; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0611; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc612; VI-NEXT: s_waitcnt vmcnt(0)613; VI-NEXT: v_cmp_gt_i16_e32 vcc, v2, v3614; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc615; VI-NEXT: flat_store_dword v[0:1], v2616; VI-NEXT: s_endpgm617;618; SI-LABEL: i16_sgt:619; SI: ; %bb.0: ; %entry620; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9621; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd622; SI-NEXT: s_mov_b32 s11, 0xf000623; SI-NEXT: s_mov_b32 s10, 0624; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0625; SI-NEXT: v_mov_b32_e32 v2, 0626; SI-NEXT: s_mov_b64 s[6:7], s[10:11]627; SI-NEXT: s_waitcnt lgkmcnt(0)628; SI-NEXT: s_mov_b64 s[8:9], s[2:3]629; SI-NEXT: buffer_load_sshort v3, v[1:2], s[8:11], 0 addr64630; SI-NEXT: buffer_load_sshort v4, v[1:2], s[4:7], 0 addr64631; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0632; SI-NEXT: s_mov_b64 s[2:3], s[10:11]633; SI-NEXT: s_waitcnt vmcnt(0)634; SI-NEXT: v_cmp_gt_i32_e32 vcc, v3, v4635; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc636; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64637; SI-NEXT: s_endpgm638;639; GFX11-FAKE16-LABEL: i16_sgt:640; GFX11-FAKE16: ; %bb.0: ; %entry641; GFX11-FAKE16-NEXT: s_clause 0x1642; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24643; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34644; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0645; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)646; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0647; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0648; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)649; GFX11-FAKE16-NEXT: s_clause 0x1650; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]651; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]652; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)653; GFX11-FAKE16-NEXT: v_cmp_gt_i16_e32 vcc_lo, v2, v1654; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo655; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]656; GFX11-FAKE16-NEXT: s_endpgm657;658; GFX11-TRUE16-LABEL: i16_sgt:659; GFX11-TRUE16: ; %bb.0: ; %entry660; GFX11-TRUE16-NEXT: s_clause 0x1661; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24662; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34663; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0664; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)665; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1666; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1667; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)668; GFX11-TRUE16-NEXT: s_clause 0x1669; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]670; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]671; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)672; GFX11-TRUE16-NEXT: v_cmp_gt_i16_e32 vcc_lo, v0.l, v0.h673; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo674; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]675; GFX11-TRUE16-NEXT: s_endpgm676entry:677 %tid = call i32 @llvm.amdgcn.workitem.id.x()678 %tid.ext = sext i32 %tid to i64679 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext680 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext681 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext682 %a = load i16, ptr addrspace(1) %a.gep683 %b = load i16, ptr addrspace(1) %b.gep684 %tmp0 = icmp sgt i16 %a, %b685 %tmp1 = sext i1 %tmp0 to i32686 store i32 %tmp1, ptr addrspace(1) %out.gep687 ret void688}689 690define amdgpu_kernel void @i16_sge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {691; VI-LABEL: i16_sge:692; VI: ; %bb.0: ; %entry693; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24694; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34695; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0696; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0697; VI-NEXT: s_waitcnt lgkmcnt(0)698; VI-NEXT: v_mov_b32_e32 v2, s3699; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3700; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc701; VI-NEXT: v_mov_b32_e32 v4, s5702; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3703; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc704; VI-NEXT: flat_load_ushort v2, v[1:2]705; VI-NEXT: flat_load_ushort v3, v[3:4]706; VI-NEXT: v_mov_b32_e32 v1, s1707; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0708; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc709; VI-NEXT: s_waitcnt vmcnt(0)710; VI-NEXT: v_cmp_ge_i16_e32 vcc, v2, v3711; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc712; VI-NEXT: flat_store_dword v[0:1], v2713; VI-NEXT: s_endpgm714;715; SI-LABEL: i16_sge:716; SI: ; %bb.0: ; %entry717; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9718; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd719; SI-NEXT: s_mov_b32 s11, 0xf000720; SI-NEXT: s_mov_b32 s10, 0721; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0722; SI-NEXT: v_mov_b32_e32 v2, 0723; SI-NEXT: s_mov_b64 s[6:7], s[10:11]724; SI-NEXT: s_waitcnt lgkmcnt(0)725; SI-NEXT: s_mov_b64 s[8:9], s[2:3]726; SI-NEXT: buffer_load_sshort v3, v[1:2], s[8:11], 0 addr64727; SI-NEXT: buffer_load_sshort v4, v[1:2], s[4:7], 0 addr64728; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0729; SI-NEXT: s_mov_b64 s[2:3], s[10:11]730; SI-NEXT: s_waitcnt vmcnt(0)731; SI-NEXT: v_cmp_ge_i32_e32 vcc, v3, v4732; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc733; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64734; SI-NEXT: s_endpgm735;736; GFX11-FAKE16-LABEL: i16_sge:737; GFX11-FAKE16: ; %bb.0: ; %entry738; GFX11-FAKE16-NEXT: s_clause 0x1739; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24740; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34741; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0742; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)743; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0744; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0745; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)746; GFX11-FAKE16-NEXT: s_clause 0x1747; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]748; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]749; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)750; GFX11-FAKE16-NEXT: v_cmp_ge_i16_e32 vcc_lo, v2, v1751; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo752; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]753; GFX11-FAKE16-NEXT: s_endpgm754;755; GFX11-TRUE16-LABEL: i16_sge:756; GFX11-TRUE16: ; %bb.0: ; %entry757; GFX11-TRUE16-NEXT: s_clause 0x1758; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24759; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34760; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0761; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)762; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1763; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1764; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)765; GFX11-TRUE16-NEXT: s_clause 0x1766; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]767; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]768; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)769; GFX11-TRUE16-NEXT: v_cmp_ge_i16_e32 vcc_lo, v0.l, v0.h770; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo771; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]772; GFX11-TRUE16-NEXT: s_endpgm773entry:774 %tid = call i32 @llvm.amdgcn.workitem.id.x()775 %tid.ext = sext i32 %tid to i64776 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext777 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext778 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext779 %a = load i16, ptr addrspace(1) %a.gep780 %b = load i16, ptr addrspace(1) %b.gep781 %tmp0 = icmp sge i16 %a, %b782 %tmp1 = sext i1 %tmp0 to i32783 store i32 %tmp1, ptr addrspace(1) %out.gep784 ret void785}786 787define amdgpu_kernel void @i16_slt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {788; VI-LABEL: i16_slt:789; VI: ; %bb.0: ; %entry790; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24791; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34792; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0793; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0794; VI-NEXT: s_waitcnt lgkmcnt(0)795; VI-NEXT: v_mov_b32_e32 v2, s3796; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3797; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc798; VI-NEXT: v_mov_b32_e32 v4, s5799; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3800; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc801; VI-NEXT: flat_load_ushort v2, v[1:2]802; VI-NEXT: flat_load_ushort v3, v[3:4]803; VI-NEXT: v_mov_b32_e32 v1, s1804; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0805; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc806; VI-NEXT: s_waitcnt vmcnt(0)807; VI-NEXT: v_cmp_lt_i16_e32 vcc, v2, v3808; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc809; VI-NEXT: flat_store_dword v[0:1], v2810; VI-NEXT: s_endpgm811;812; SI-LABEL: i16_slt:813; SI: ; %bb.0: ; %entry814; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9815; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd816; SI-NEXT: s_mov_b32 s11, 0xf000817; SI-NEXT: s_mov_b32 s10, 0818; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0819; SI-NEXT: v_mov_b32_e32 v2, 0820; SI-NEXT: s_mov_b64 s[6:7], s[10:11]821; SI-NEXT: s_waitcnt lgkmcnt(0)822; SI-NEXT: s_mov_b64 s[8:9], s[2:3]823; SI-NEXT: buffer_load_sshort v3, v[1:2], s[8:11], 0 addr64824; SI-NEXT: buffer_load_sshort v4, v[1:2], s[4:7], 0 addr64825; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0826; SI-NEXT: s_mov_b64 s[2:3], s[10:11]827; SI-NEXT: s_waitcnt vmcnt(0)828; SI-NEXT: v_cmp_lt_i32_e32 vcc, v3, v4829; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc830; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64831; SI-NEXT: s_endpgm832;833; GFX11-FAKE16-LABEL: i16_slt:834; GFX11-FAKE16: ; %bb.0: ; %entry835; GFX11-FAKE16-NEXT: s_clause 0x1836; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24837; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34838; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0839; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)840; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0841; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0842; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)843; GFX11-FAKE16-NEXT: s_clause 0x1844; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]845; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]846; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)847; GFX11-FAKE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, v2, v1848; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo849; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]850; GFX11-FAKE16-NEXT: s_endpgm851;852; GFX11-TRUE16-LABEL: i16_slt:853; GFX11-TRUE16: ; %bb.0: ; %entry854; GFX11-TRUE16-NEXT: s_clause 0x1855; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24856; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34857; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0858; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)859; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1860; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1861; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)862; GFX11-TRUE16-NEXT: s_clause 0x1863; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]864; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]865; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)866; GFX11-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, v0.l, v0.h867; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo868; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]869; GFX11-TRUE16-NEXT: s_endpgm870entry:871 %tid = call i32 @llvm.amdgcn.workitem.id.x()872 %tid.ext = sext i32 %tid to i64873 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext874 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext875 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext876 %a = load i16, ptr addrspace(1) %a.gep877 %b = load i16, ptr addrspace(1) %b.gep878 %tmp0 = icmp slt i16 %a, %b879 %tmp1 = sext i1 %tmp0 to i32880 store i32 %tmp1, ptr addrspace(1) %out.gep881 ret void882}883 884define amdgpu_kernel void @i16_sle(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {885; VI-LABEL: i16_sle:886; VI: ; %bb.0: ; %entry887; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24888; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34889; VI-NEXT: v_lshlrev_b32_e32 v3, 1, v0890; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0891; VI-NEXT: s_waitcnt lgkmcnt(0)892; VI-NEXT: v_mov_b32_e32 v2, s3893; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v3894; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc895; VI-NEXT: v_mov_b32_e32 v4, s5896; VI-NEXT: v_add_u32_e32 v3, vcc, s4, v3897; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc898; VI-NEXT: flat_load_ushort v2, v[1:2]899; VI-NEXT: flat_load_ushort v3, v[3:4]900; VI-NEXT: v_mov_b32_e32 v1, s1901; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0902; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc903; VI-NEXT: s_waitcnt vmcnt(0)904; VI-NEXT: v_cmp_le_i16_e32 vcc, v2, v3905; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc906; VI-NEXT: flat_store_dword v[0:1], v2907; VI-NEXT: s_endpgm908;909; SI-LABEL: i16_sle:910; SI: ; %bb.0: ; %entry911; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9912; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd913; SI-NEXT: s_mov_b32 s11, 0xf000914; SI-NEXT: s_mov_b32 s10, 0915; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v0916; SI-NEXT: v_mov_b32_e32 v2, 0917; SI-NEXT: s_mov_b64 s[6:7], s[10:11]918; SI-NEXT: s_waitcnt lgkmcnt(0)919; SI-NEXT: s_mov_b64 s[8:9], s[2:3]920; SI-NEXT: buffer_load_sshort v3, v[1:2], s[8:11], 0 addr64921; SI-NEXT: buffer_load_sshort v4, v[1:2], s[4:7], 0 addr64922; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0923; SI-NEXT: s_mov_b64 s[2:3], s[10:11]924; SI-NEXT: s_waitcnt vmcnt(0)925; SI-NEXT: v_cmp_le_i32_e32 vcc, v3, v4926; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc927; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64928; SI-NEXT: s_endpgm929;930; GFX11-FAKE16-LABEL: i16_sle:931; GFX11-FAKE16: ; %bb.0: ; %entry932; GFX11-FAKE16-NEXT: s_clause 0x1933; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24934; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34935; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0936; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)937; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0938; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0939; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)940; GFX11-FAKE16-NEXT: s_clause 0x1941; GFX11-FAKE16-NEXT: global_load_u16 v2, v1, s[2:3]942; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[4:5]943; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)944; GFX11-FAKE16-NEXT: v_cmp_le_i16_e32 vcc_lo, v2, v1945; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo946; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]947; GFX11-FAKE16-NEXT: s_endpgm948;949; GFX11-TRUE16-LABEL: i16_sle:950; GFX11-TRUE16: ; %bb.0: ; %entry951; GFX11-TRUE16-NEXT: s_clause 0x1952; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24953; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34954; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0955; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)956; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v1957; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1958; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)959; GFX11-TRUE16-NEXT: s_clause 0x1960; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3]961; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5]962; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)963; GFX11-TRUE16-NEXT: v_cmp_le_i16_e32 vcc_lo, v0.l, v0.h964; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo965; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]966; GFX11-TRUE16-NEXT: s_endpgm967entry:968 %tid = call i32 @llvm.amdgcn.workitem.id.x()969 %tid.ext = sext i32 %tid to i64970 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext971 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext972 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext973 %a = load i16, ptr addrspace(1) %a.gep974 %b = load i16, ptr addrspace(1) %b.gep975 %tmp0 = icmp sle i16 %a, %b976 %tmp1 = sext i1 %tmp0 to i32977 store i32 %tmp1, ptr addrspace(1) %out.gep978 ret void979}980 981; These should be commuted to reduce code size982define amdgpu_kernel void @i16_eq_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {983; VI-LABEL: i16_eq_v_s:984; VI: ; %bb.0: ; %entry985; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24986; VI-NEXT: s_load_dword s4, s[4:5], 0x34987; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v0988; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0989; VI-NEXT: s_waitcnt lgkmcnt(0)990; VI-NEXT: v_mov_b32_e32 v2, s3991; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v1992; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc993; VI-NEXT: flat_load_ushort v2, v[1:2]994; VI-NEXT: v_mov_b32_e32 v1, s1995; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0996; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc997; VI-NEXT: s_waitcnt vmcnt(0)998; VI-NEXT: v_cmp_eq_u16_e32 vcc, s4, v2999; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1000; VI-NEXT: flat_store_dword v[0:1], v21001; VI-NEXT: s_endpgm1002;1003; SI-LABEL: i16_eq_v_s:1004; SI: ; %bb.0: ; %entry1005; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91006; SI-NEXT: s_load_dword s8, s[4:5], 0xd1007; SI-NEXT: s_mov_b32 s7, 0xf0001008; SI-NEXT: s_mov_b32 s6, 01009; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01010; SI-NEXT: v_mov_b32_e32 v2, 01011; SI-NEXT: s_waitcnt lgkmcnt(0)1012; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1013; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641014; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01015; SI-NEXT: s_and_b32 s4, s8, 0xffff1016; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1017; SI-NEXT: s_waitcnt vmcnt(0)1018; SI-NEXT: v_cmp_eq_u32_e32 vcc, s4, v31019; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1020; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641021; SI-NEXT: s_endpgm1022;1023; GFX11-FAKE16-LABEL: i16_eq_v_s:1024; GFX11-FAKE16: ; %bb.0: ; %entry1025; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241026; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01027; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341028; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1029; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01030; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01031; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1032; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1033; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1034; GFX11-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, s4, v11035; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1036; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1037; GFX11-FAKE16-NEXT: s_endpgm1038;1039; GFX11-TRUE16-LABEL: i16_eq_v_s:1040; GFX11-TRUE16: ; %bb.0: ; %entry1041; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241042; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01043; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341044; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1045; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11046; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11047; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1048; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1049; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1050; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, s4, v0.l1051; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1052; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1053; GFX11-TRUE16-NEXT: s_endpgm1054entry:1055 %tid = call i32 @llvm.amdgcn.workitem.id.x()1056 %tid.ext = sext i32 %tid to i641057 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1058 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1059 %a = load i16, ptr addrspace(1) %a.gep1060 %tmp0 = icmp eq i16 %a, %b1061 %tmp1 = sext i1 %tmp0 to i321062 store i32 %tmp1, ptr addrspace(1) %out.gep1063 ret void1064}1065 1066define amdgpu_kernel void @i16_ne_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1067; VI-LABEL: i16_ne_v_s:1068; VI: ; %bb.0: ; %entry1069; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241070; VI-NEXT: s_load_dword s4, s[4:5], 0x341071; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01072; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01073; VI-NEXT: s_waitcnt lgkmcnt(0)1074; VI-NEXT: v_mov_b32_e32 v2, s31075; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11076; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1077; VI-NEXT: flat_load_ushort v2, v[1:2]1078; VI-NEXT: v_mov_b32_e32 v1, s11079; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01080; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1081; VI-NEXT: s_waitcnt vmcnt(0)1082; VI-NEXT: v_cmp_ne_u16_e32 vcc, s4, v21083; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1084; VI-NEXT: flat_store_dword v[0:1], v21085; VI-NEXT: s_endpgm1086;1087; SI-LABEL: i16_ne_v_s:1088; SI: ; %bb.0: ; %entry1089; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91090; SI-NEXT: s_load_dword s8, s[4:5], 0xd1091; SI-NEXT: s_mov_b32 s7, 0xf0001092; SI-NEXT: s_mov_b32 s6, 01093; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01094; SI-NEXT: v_mov_b32_e32 v2, 01095; SI-NEXT: s_waitcnt lgkmcnt(0)1096; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1097; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641098; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01099; SI-NEXT: s_and_b32 s4, s8, 0xffff1100; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1101; SI-NEXT: s_waitcnt vmcnt(0)1102; SI-NEXT: v_cmp_ne_u32_e32 vcc, s4, v31103; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1104; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641105; SI-NEXT: s_endpgm1106;1107; GFX11-FAKE16-LABEL: i16_ne_v_s:1108; GFX11-FAKE16: ; %bb.0: ; %entry1109; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241110; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01111; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341112; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1113; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01114; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01115; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1116; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1117; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1118; GFX11-FAKE16-NEXT: v_cmp_ne_u16_e32 vcc_lo, s4, v11119; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1120; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1121; GFX11-FAKE16-NEXT: s_endpgm1122;1123; GFX11-TRUE16-LABEL: i16_ne_v_s:1124; GFX11-TRUE16: ; %bb.0: ; %entry1125; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241126; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01127; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341128; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1129; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11130; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11131; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1132; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1133; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1134; GFX11-TRUE16-NEXT: v_cmp_ne_u16_e32 vcc_lo, s4, v0.l1135; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1136; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1137; GFX11-TRUE16-NEXT: s_endpgm1138entry:1139 %tid = call i32 @llvm.amdgcn.workitem.id.x()1140 %tid.ext = sext i32 %tid to i641141 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1142 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1143 %a = load i16, ptr addrspace(1) %a.gep1144 %tmp0 = icmp ne i16 %a, %b1145 %tmp1 = sext i1 %tmp0 to i321146 store i32 %tmp1, ptr addrspace(1) %out.gep1147 ret void1148}1149 1150define amdgpu_kernel void @i16_ugt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1151; VI-LABEL: i16_ugt_v_s:1152; VI: ; %bb.0: ; %entry1153; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241154; VI-NEXT: s_load_dword s4, s[4:5], 0x341155; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01156; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01157; VI-NEXT: s_waitcnt lgkmcnt(0)1158; VI-NEXT: v_mov_b32_e32 v2, s31159; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11160; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1161; VI-NEXT: flat_load_ushort v2, v[1:2]1162; VI-NEXT: v_mov_b32_e32 v1, s11163; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01164; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1165; VI-NEXT: s_waitcnt vmcnt(0)1166; VI-NEXT: v_cmp_lt_u16_e32 vcc, s4, v21167; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1168; VI-NEXT: flat_store_dword v[0:1], v21169; VI-NEXT: s_endpgm1170;1171; SI-LABEL: i16_ugt_v_s:1172; SI: ; %bb.0: ; %entry1173; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91174; SI-NEXT: s_load_dword s8, s[4:5], 0xd1175; SI-NEXT: s_mov_b32 s7, 0xf0001176; SI-NEXT: s_mov_b32 s6, 01177; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01178; SI-NEXT: v_mov_b32_e32 v2, 01179; SI-NEXT: s_waitcnt lgkmcnt(0)1180; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1181; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641182; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01183; SI-NEXT: s_and_b32 s4, s8, 0xffff1184; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1185; SI-NEXT: s_waitcnt vmcnt(0)1186; SI-NEXT: v_cmp_lt_u32_e32 vcc, s4, v31187; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1188; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641189; SI-NEXT: s_endpgm1190;1191; GFX11-FAKE16-LABEL: i16_ugt_v_s:1192; GFX11-FAKE16: ; %bb.0: ; %entry1193; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241194; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01195; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341196; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1197; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01198; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01199; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1200; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1201; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1202; GFX11-FAKE16-NEXT: v_cmp_lt_u16_e32 vcc_lo, s4, v11203; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1204; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1205; GFX11-FAKE16-NEXT: s_endpgm1206;1207; GFX11-TRUE16-LABEL: i16_ugt_v_s:1208; GFX11-TRUE16: ; %bb.0: ; %entry1209; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241210; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01211; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341212; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1213; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11214; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11215; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1216; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1217; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1218; GFX11-TRUE16-NEXT: v_cmp_lt_u16_e32 vcc_lo, s4, v0.l1219; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1220; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1221; GFX11-TRUE16-NEXT: s_endpgm1222entry:1223 %tid = call i32 @llvm.amdgcn.workitem.id.x()1224 %tid.ext = sext i32 %tid to i641225 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1226 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1227 %a = load i16, ptr addrspace(1) %a.gep1228 %tmp0 = icmp ugt i16 %a, %b1229 %tmp1 = sext i1 %tmp0 to i321230 store i32 %tmp1, ptr addrspace(1) %out.gep1231 ret void1232}1233 1234define amdgpu_kernel void @i16_uge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1235; VI-LABEL: i16_uge_v_s:1236; VI: ; %bb.0: ; %entry1237; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241238; VI-NEXT: s_load_dword s4, s[4:5], 0x341239; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01240; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01241; VI-NEXT: s_waitcnt lgkmcnt(0)1242; VI-NEXT: v_mov_b32_e32 v2, s31243; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11244; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1245; VI-NEXT: flat_load_ushort v2, v[1:2]1246; VI-NEXT: v_mov_b32_e32 v1, s11247; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01248; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1249; VI-NEXT: s_waitcnt vmcnt(0)1250; VI-NEXT: v_cmp_le_u16_e32 vcc, s4, v21251; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1252; VI-NEXT: flat_store_dword v[0:1], v21253; VI-NEXT: s_endpgm1254;1255; SI-LABEL: i16_uge_v_s:1256; SI: ; %bb.0: ; %entry1257; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91258; SI-NEXT: s_load_dword s8, s[4:5], 0xd1259; SI-NEXT: s_mov_b32 s7, 0xf0001260; SI-NEXT: s_mov_b32 s6, 01261; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01262; SI-NEXT: v_mov_b32_e32 v2, 01263; SI-NEXT: s_waitcnt lgkmcnt(0)1264; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1265; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641266; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01267; SI-NEXT: s_and_b32 s4, s8, 0xffff1268; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1269; SI-NEXT: s_waitcnt vmcnt(0)1270; SI-NEXT: v_cmp_le_u32_e32 vcc, s4, v31271; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1272; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641273; SI-NEXT: s_endpgm1274;1275; GFX11-FAKE16-LABEL: i16_uge_v_s:1276; GFX11-FAKE16: ; %bb.0: ; %entry1277; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241278; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01279; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341280; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1281; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01282; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01283; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1284; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1285; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1286; GFX11-FAKE16-NEXT: v_cmp_le_u16_e32 vcc_lo, s4, v11287; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1288; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1289; GFX11-FAKE16-NEXT: s_endpgm1290;1291; GFX11-TRUE16-LABEL: i16_uge_v_s:1292; GFX11-TRUE16: ; %bb.0: ; %entry1293; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241294; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01295; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341296; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1297; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11298; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11299; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1300; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1301; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1302; GFX11-TRUE16-NEXT: v_cmp_le_u16_e32 vcc_lo, s4, v0.l1303; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1304; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1305; GFX11-TRUE16-NEXT: s_endpgm1306entry:1307 %tid = call i32 @llvm.amdgcn.workitem.id.x()1308 %tid.ext = sext i32 %tid to i641309 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1310 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1311 %a = load i16, ptr addrspace(1) %a.gep1312 %tmp0 = icmp uge i16 %a, %b1313 %tmp1 = sext i1 %tmp0 to i321314 store i32 %tmp1, ptr addrspace(1) %out.gep1315 ret void1316}1317 1318define amdgpu_kernel void @i16_ult_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1319; VI-LABEL: i16_ult_v_s:1320; VI: ; %bb.0: ; %entry1321; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241322; VI-NEXT: s_load_dword s4, s[4:5], 0x341323; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01324; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01325; VI-NEXT: s_waitcnt lgkmcnt(0)1326; VI-NEXT: v_mov_b32_e32 v2, s31327; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11328; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1329; VI-NEXT: flat_load_ushort v2, v[1:2]1330; VI-NEXT: v_mov_b32_e32 v1, s11331; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01332; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1333; VI-NEXT: s_waitcnt vmcnt(0)1334; VI-NEXT: v_cmp_gt_u16_e32 vcc, s4, v21335; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1336; VI-NEXT: flat_store_dword v[0:1], v21337; VI-NEXT: s_endpgm1338;1339; SI-LABEL: i16_ult_v_s:1340; SI: ; %bb.0: ; %entry1341; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91342; SI-NEXT: s_load_dword s8, s[4:5], 0xd1343; SI-NEXT: s_mov_b32 s7, 0xf0001344; SI-NEXT: s_mov_b32 s6, 01345; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01346; SI-NEXT: v_mov_b32_e32 v2, 01347; SI-NEXT: s_waitcnt lgkmcnt(0)1348; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1349; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641350; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01351; SI-NEXT: s_and_b32 s4, s8, 0xffff1352; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1353; SI-NEXT: s_waitcnt vmcnt(0)1354; SI-NEXT: v_cmp_gt_u32_e32 vcc, s4, v31355; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1356; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641357; SI-NEXT: s_endpgm1358;1359; GFX11-FAKE16-LABEL: i16_ult_v_s:1360; GFX11-FAKE16: ; %bb.0: ; %entry1361; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241362; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01363; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341364; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1365; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01366; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01367; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1368; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1369; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1370; GFX11-FAKE16-NEXT: v_cmp_gt_u16_e32 vcc_lo, s4, v11371; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1372; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1373; GFX11-FAKE16-NEXT: s_endpgm1374;1375; GFX11-TRUE16-LABEL: i16_ult_v_s:1376; GFX11-TRUE16: ; %bb.0: ; %entry1377; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241378; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01379; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341380; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1381; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11382; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11383; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1384; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1385; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1386; GFX11-TRUE16-NEXT: v_cmp_gt_u16_e32 vcc_lo, s4, v0.l1387; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1388; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1389; GFX11-TRUE16-NEXT: s_endpgm1390entry:1391 %tid = call i32 @llvm.amdgcn.workitem.id.x()1392 %tid.ext = sext i32 %tid to i641393 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1394 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1395 %a = load i16, ptr addrspace(1) %a.gep1396 %tmp0 = icmp ult i16 %a, %b1397 %tmp1 = sext i1 %tmp0 to i321398 store i32 %tmp1, ptr addrspace(1) %out.gep1399 ret void1400}1401 1402define amdgpu_kernel void @i16_ule_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1403; VI-LABEL: i16_ule_v_s:1404; VI: ; %bb.0: ; %entry1405; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241406; VI-NEXT: s_load_dword s4, s[4:5], 0x341407; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01408; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01409; VI-NEXT: s_waitcnt lgkmcnt(0)1410; VI-NEXT: v_mov_b32_e32 v2, s31411; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11412; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1413; VI-NEXT: flat_load_ushort v2, v[1:2]1414; VI-NEXT: v_mov_b32_e32 v1, s11415; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01416; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1417; VI-NEXT: s_waitcnt vmcnt(0)1418; VI-NEXT: v_cmp_ge_u16_e32 vcc, s4, v21419; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1420; VI-NEXT: flat_store_dword v[0:1], v21421; VI-NEXT: s_endpgm1422;1423; SI-LABEL: i16_ule_v_s:1424; SI: ; %bb.0: ; %entry1425; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91426; SI-NEXT: s_load_dword s8, s[4:5], 0xd1427; SI-NEXT: s_mov_b32 s7, 0xf0001428; SI-NEXT: s_mov_b32 s6, 01429; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01430; SI-NEXT: v_mov_b32_e32 v2, 01431; SI-NEXT: s_waitcnt lgkmcnt(0)1432; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1433; SI-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr641434; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01435; SI-NEXT: s_and_b32 s4, s8, 0xffff1436; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1437; SI-NEXT: s_waitcnt vmcnt(0)1438; SI-NEXT: v_cmp_ge_u32_e32 vcc, s4, v31439; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1440; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641441; SI-NEXT: s_endpgm1442;1443; GFX11-FAKE16-LABEL: i16_ule_v_s:1444; GFX11-FAKE16: ; %bb.0: ; %entry1445; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241446; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01447; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341448; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1449; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01450; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01451; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1452; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1453; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1454; GFX11-FAKE16-NEXT: v_cmp_ge_u16_e32 vcc_lo, s4, v11455; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1456; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1457; GFX11-FAKE16-NEXT: s_endpgm1458;1459; GFX11-TRUE16-LABEL: i16_ule_v_s:1460; GFX11-TRUE16: ; %bb.0: ; %entry1461; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241462; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01463; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341464; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1465; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11466; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11467; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1468; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1469; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1470; GFX11-TRUE16-NEXT: v_cmp_ge_u16_e32 vcc_lo, s4, v0.l1471; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1472; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1473; GFX11-TRUE16-NEXT: s_endpgm1474entry:1475 %tid = call i32 @llvm.amdgcn.workitem.id.x()1476 %tid.ext = sext i32 %tid to i641477 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1478 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1479 %a = load i16, ptr addrspace(1) %a.gep1480 %tmp0 = icmp ule i16 %a, %b1481 %tmp1 = sext i1 %tmp0 to i321482 store i32 %tmp1, ptr addrspace(1) %out.gep1483 ret void1484}1485 1486define amdgpu_kernel void @i16_sgt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1487; VI-LABEL: i16_sgt_v_s:1488; VI: ; %bb.0: ; %entry1489; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241490; VI-NEXT: s_load_dword s4, s[4:5], 0x341491; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01492; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01493; VI-NEXT: s_waitcnt lgkmcnt(0)1494; VI-NEXT: v_mov_b32_e32 v2, s31495; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11496; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1497; VI-NEXT: flat_load_ushort v2, v[1:2]1498; VI-NEXT: v_mov_b32_e32 v1, s11499; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01500; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1501; VI-NEXT: s_waitcnt vmcnt(0)1502; VI-NEXT: v_cmp_lt_i16_e32 vcc, s4, v21503; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1504; VI-NEXT: flat_store_dword v[0:1], v21505; VI-NEXT: s_endpgm1506;1507; SI-LABEL: i16_sgt_v_s:1508; SI: ; %bb.0: ; %entry1509; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91510; SI-NEXT: s_load_dword s8, s[4:5], 0xd1511; SI-NEXT: s_mov_b32 s7, 0xf0001512; SI-NEXT: s_mov_b32 s6, 01513; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01514; SI-NEXT: v_mov_b32_e32 v2, 01515; SI-NEXT: s_waitcnt lgkmcnt(0)1516; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1517; SI-NEXT: buffer_load_sshort v3, v[1:2], s[4:7], 0 addr641518; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01519; SI-NEXT: s_sext_i32_i16 s4, s81520; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1521; SI-NEXT: s_waitcnt vmcnt(0)1522; SI-NEXT: v_cmp_lt_i32_e32 vcc, s4, v31523; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1524; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641525; SI-NEXT: s_endpgm1526;1527; GFX11-FAKE16-LABEL: i16_sgt_v_s:1528; GFX11-FAKE16: ; %bb.0: ; %entry1529; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241530; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01531; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341532; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1533; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01534; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01535; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1536; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1537; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1538; GFX11-FAKE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, s4, v11539; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1540; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1541; GFX11-FAKE16-NEXT: s_endpgm1542;1543; GFX11-TRUE16-LABEL: i16_sgt_v_s:1544; GFX11-TRUE16: ; %bb.0: ; %entry1545; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241546; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01547; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341548; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1549; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11550; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11551; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1552; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1553; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1554; GFX11-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, s4, v0.l1555; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1556; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1557; GFX11-TRUE16-NEXT: s_endpgm1558entry:1559 %tid = call i32 @llvm.amdgcn.workitem.id.x()1560 %tid.ext = sext i32 %tid to i641561 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1562 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1563 %a = load i16, ptr addrspace(1) %a.gep1564 %tmp0 = icmp sgt i16 %a, %b1565 %tmp1 = sext i1 %tmp0 to i321566 store i32 %tmp1, ptr addrspace(1) %out.gep1567 ret void1568}1569 1570define amdgpu_kernel void @i16_sge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1571; VI-LABEL: i16_sge_v_s:1572; VI: ; %bb.0: ; %entry1573; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241574; VI-NEXT: s_load_dword s4, s[4:5], 0x341575; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01576; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01577; VI-NEXT: s_waitcnt lgkmcnt(0)1578; VI-NEXT: v_mov_b32_e32 v2, s31579; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11580; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1581; VI-NEXT: flat_load_ushort v2, v[1:2]1582; VI-NEXT: v_mov_b32_e32 v1, s11583; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01584; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1585; VI-NEXT: s_waitcnt vmcnt(0)1586; VI-NEXT: v_cmp_le_i16_e32 vcc, s4, v21587; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1588; VI-NEXT: flat_store_dword v[0:1], v21589; VI-NEXT: s_endpgm1590;1591; SI-LABEL: i16_sge_v_s:1592; SI: ; %bb.0: ; %entry1593; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91594; SI-NEXT: s_load_dword s8, s[4:5], 0xd1595; SI-NEXT: s_mov_b32 s7, 0xf0001596; SI-NEXT: s_mov_b32 s6, 01597; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01598; SI-NEXT: v_mov_b32_e32 v2, 01599; SI-NEXT: s_waitcnt lgkmcnt(0)1600; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1601; SI-NEXT: buffer_load_sshort v3, v[1:2], s[4:7], 0 addr641602; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01603; SI-NEXT: s_sext_i32_i16 s4, s81604; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1605; SI-NEXT: s_waitcnt vmcnt(0)1606; SI-NEXT: v_cmp_le_i32_e32 vcc, s4, v31607; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1608; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641609; SI-NEXT: s_endpgm1610;1611; GFX11-FAKE16-LABEL: i16_sge_v_s:1612; GFX11-FAKE16: ; %bb.0: ; %entry1613; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241614; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01615; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341616; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1617; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01618; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01619; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1620; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1621; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1622; GFX11-FAKE16-NEXT: v_cmp_le_i16_e32 vcc_lo, s4, v11623; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1624; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1625; GFX11-FAKE16-NEXT: s_endpgm1626;1627; GFX11-TRUE16-LABEL: i16_sge_v_s:1628; GFX11-TRUE16: ; %bb.0: ; %entry1629; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241630; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01631; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341632; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1633; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11634; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11635; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1636; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1637; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1638; GFX11-TRUE16-NEXT: v_cmp_le_i16_e32 vcc_lo, s4, v0.l1639; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1640; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1641; GFX11-TRUE16-NEXT: s_endpgm1642entry:1643 %tid = call i32 @llvm.amdgcn.workitem.id.x()1644 %tid.ext = sext i32 %tid to i641645 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1646 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1647 %a = load i16, ptr addrspace(1) %a.gep1648 %tmp0 = icmp sge i16 %a, %b1649 %tmp1 = sext i1 %tmp0 to i321650 store i32 %tmp1, ptr addrspace(1) %out.gep1651 ret void1652}1653 1654define amdgpu_kernel void @i16_slt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1655; VI-LABEL: i16_slt_v_s:1656; VI: ; %bb.0: ; %entry1657; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241658; VI-NEXT: s_load_dword s4, s[4:5], 0x341659; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01660; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01661; VI-NEXT: s_waitcnt lgkmcnt(0)1662; VI-NEXT: v_mov_b32_e32 v2, s31663; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11664; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1665; VI-NEXT: flat_load_ushort v2, v[1:2]1666; VI-NEXT: v_mov_b32_e32 v1, s11667; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01668; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1669; VI-NEXT: s_waitcnt vmcnt(0)1670; VI-NEXT: v_cmp_gt_i16_e32 vcc, s4, v21671; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1672; VI-NEXT: flat_store_dword v[0:1], v21673; VI-NEXT: s_endpgm1674;1675; SI-LABEL: i16_slt_v_s:1676; SI: ; %bb.0: ; %entry1677; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91678; SI-NEXT: s_load_dword s8, s[4:5], 0xd1679; SI-NEXT: s_mov_b32 s7, 0xf0001680; SI-NEXT: s_mov_b32 s6, 01681; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01682; SI-NEXT: v_mov_b32_e32 v2, 01683; SI-NEXT: s_waitcnt lgkmcnt(0)1684; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1685; SI-NEXT: buffer_load_sshort v3, v[1:2], s[4:7], 0 addr641686; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01687; SI-NEXT: s_sext_i32_i16 s4, s81688; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1689; SI-NEXT: s_waitcnt vmcnt(0)1690; SI-NEXT: v_cmp_gt_i32_e32 vcc, s4, v31691; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1692; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641693; SI-NEXT: s_endpgm1694;1695; GFX11-FAKE16-LABEL: i16_slt_v_s:1696; GFX11-FAKE16: ; %bb.0: ; %entry1697; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241698; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01699; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341700; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1701; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01702; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01703; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1704; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1705; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1706; GFX11-FAKE16-NEXT: v_cmp_gt_i16_e32 vcc_lo, s4, v11707; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1708; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1709; GFX11-FAKE16-NEXT: s_endpgm1710;1711; GFX11-TRUE16-LABEL: i16_slt_v_s:1712; GFX11-TRUE16: ; %bb.0: ; %entry1713; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241714; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01715; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341716; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1717; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11718; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11719; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1720; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1721; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1722; GFX11-TRUE16-NEXT: v_cmp_gt_i16_e32 vcc_lo, s4, v0.l1723; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1724; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1725; GFX11-TRUE16-NEXT: s_endpgm1726entry:1727 %tid = call i32 @llvm.amdgcn.workitem.id.x()1728 %tid.ext = sext i32 %tid to i641729 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1730 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1731 %a = load i16, ptr addrspace(1) %a.gep1732 %tmp0 = icmp slt i16 %a, %b1733 %tmp1 = sext i1 %tmp0 to i321734 store i32 %tmp1, ptr addrspace(1) %out.gep1735 ret void1736}1737 1738define amdgpu_kernel void @i16_sle_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {1739; VI-LABEL: i16_sle_v_s:1740; VI: ; %bb.0: ; %entry1741; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241742; VI-NEXT: s_load_dword s4, s[4:5], 0x341743; VI-NEXT: v_lshlrev_b32_e32 v1, 1, v01744; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01745; VI-NEXT: s_waitcnt lgkmcnt(0)1746; VI-NEXT: v_mov_b32_e32 v2, s31747; VI-NEXT: v_add_u32_e32 v1, vcc, s2, v11748; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc1749; VI-NEXT: flat_load_ushort v2, v[1:2]1750; VI-NEXT: v_mov_b32_e32 v1, s11751; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01752; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1753; VI-NEXT: s_waitcnt vmcnt(0)1754; VI-NEXT: v_cmp_ge_i16_e32 vcc, s4, v21755; VI-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1756; VI-NEXT: flat_store_dword v[0:1], v21757; VI-NEXT: s_endpgm1758;1759; SI-LABEL: i16_sle_v_s:1760; SI: ; %bb.0: ; %entry1761; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91762; SI-NEXT: s_load_dword s8, s[4:5], 0xd1763; SI-NEXT: s_mov_b32 s7, 0xf0001764; SI-NEXT: s_mov_b32 s6, 01765; SI-NEXT: v_lshlrev_b32_e32 v1, 1, v01766; SI-NEXT: v_mov_b32_e32 v2, 01767; SI-NEXT: s_waitcnt lgkmcnt(0)1768; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1769; SI-NEXT: buffer_load_sshort v3, v[1:2], s[4:7], 0 addr641770; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v01771; SI-NEXT: s_sext_i32_i16 s4, s81772; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1773; SI-NEXT: s_waitcnt vmcnt(0)1774; SI-NEXT: v_cmp_ge_i32_e32 vcc, s4, v31775; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc1776; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641777; SI-NEXT: s_endpgm1778;1779; GFX11-FAKE16-LABEL: i16_sle_v_s:1780; GFX11-FAKE16: ; %bb.0: ; %entry1781; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241782; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01783; GFX11-FAKE16-NEXT: s_load_b32 s4, s[4:5], 0x341784; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1785; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v01786; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01787; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1788; GFX11-FAKE16-NEXT: global_load_u16 v1, v1, s[2:3]1789; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1790; GFX11-FAKE16-NEXT: v_cmp_ge_i16_e32 vcc_lo, s4, v11791; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1792; GFX11-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]1793; GFX11-FAKE16-NEXT: s_endpgm1794;1795; GFX11-TRUE16-LABEL: i16_sle_v_s:1796; GFX11-TRUE16: ; %bb.0: ; %entry1797; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241798; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v01799; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x341800; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1801; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v11802; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v11803; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1804; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]1805; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1806; GFX11-TRUE16-NEXT: v_cmp_ge_i16_e32 vcc_lo, s4, v0.l1807; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo1808; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]1809; GFX11-TRUE16-NEXT: s_endpgm1810entry:1811 %tid = call i32 @llvm.amdgcn.workitem.id.x()1812 %tid.ext = sext i32 %tid to i641813 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext1814 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext1815 %a = load i16, ptr addrspace(1) %a.gep1816 %tmp0 = icmp sle i16 %a, %b1817 %tmp1 = sext i1 %tmp0 to i321818 store i32 %tmp1, ptr addrspace(1) %out.gep1819 ret void1820}1821 1822declare i32 @llvm.amdgcn.workitem.id.x() #11823 1824attributes #0 = { nounwind }1825attributes #1 = { nounwind readnone }1826