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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -enable-var-scope -check-prefix=GFX9 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -enable-var-scope -check-prefix=GFX10 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -enable-var-scope -check-prefix=GFX11 %s5 6define amdgpu_kernel void @udiv32_invariant_denom(ptr addrspace(1) nocapture %arg, i32 %arg1) {7; GFX9-LABEL: udiv32_invariant_denom:8; GFX9: ; %bb.0: ; %bb9; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c10; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2411; GFX9-NEXT: s_mov_b32 s7, 012; GFX9-NEXT: s_mov_b64 s[2:3], 013; GFX9-NEXT: s_waitcnt lgkmcnt(0)14; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s615; GFX9-NEXT: s_sub_i32 s4, 0, s616; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v017; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v018; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v019; GFX9-NEXT: v_mov_b32_e32 v0, 020; GFX9-NEXT: v_readfirstlane_b32 s5, v121; GFX9-NEXT: s_mul_i32 s4, s4, s522; GFX9-NEXT: s_mul_hi_u32 s4, s5, s423; GFX9-NEXT: s_add_i32 s8, s5, s424; GFX9-NEXT: s_mov_b64 s[4:5], 025; GFX9-NEXT: .LBB0_1: ; %bb326; GFX9-NEXT: ; =>This Inner Loop Header: Depth=127; GFX9-NEXT: s_not_b32 s10, s528; GFX9-NEXT: s_mul_i32 s9, s6, s529; GFX9-NEXT: s_mul_i32 s10, s6, s1030; GFX9-NEXT: s_add_i32 s11, s5, 131; GFX9-NEXT: s_sub_i32 s9, s7, s932; GFX9-NEXT: s_add_i32 s10, s7, s1033; GFX9-NEXT: s_cmp_ge_u32 s9, s634; GFX9-NEXT: s_cselect_b32 s11, s11, s535; GFX9-NEXT: s_cselect_b32 s9, s10, s936; GFX9-NEXT: s_add_i32 s10, s11, 137; GFX9-NEXT: s_cmp_ge_u32 s9, s638; GFX9-NEXT: s_cselect_b32 s9, s10, s1139; GFX9-NEXT: s_add_u32 s10, s0, s240; GFX9-NEXT: s_addc_u32 s11, s1, s341; GFX9-NEXT: s_add_i32 s7, s7, 142; GFX9-NEXT: s_add_u32 s4, s4, s843; GFX9-NEXT: s_addc_u32 s5, s5, 044; GFX9-NEXT: s_add_u32 s2, s2, 445; GFX9-NEXT: s_addc_u32 s3, s3, 046; GFX9-NEXT: v_mov_b32_e32 v1, s947; GFX9-NEXT: s_cmpk_eq_i32 s2, 0x100048; GFX9-NEXT: global_store_dword v0, v1, s[10:11]49; GFX9-NEXT: s_cbranch_scc0 .LBB0_150; GFX9-NEXT: ; %bb.2: ; %bb251; GFX9-NEXT: s_endpgm52;53; GFX10-LABEL: udiv32_invariant_denom:54; GFX10: ; %bb.0: ; %bb55; GFX10-NEXT: s_clause 0x156; GFX10-NEXT: s_load_dword s6, s[4:5], 0x2c57; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2458; GFX10-NEXT: s_mov_b32 s7, 059; GFX10-NEXT: s_waitcnt lgkmcnt(0)60; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s661; GFX10-NEXT: s_sub_i32 s2, 0, s662; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v063; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v064; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v065; GFX10-NEXT: v_readfirstlane_b32 s4, v066; GFX10-NEXT: v_mov_b32_e32 v0, 067; GFX10-NEXT: s_mul_i32 s2, s2, s468; GFX10-NEXT: s_mul_hi_u32 s5, s4, s269; GFX10-NEXT: s_mov_b64 s[2:3], 070; GFX10-NEXT: s_add_i32 s8, s4, s571; GFX10-NEXT: s_mov_b64 s[4:5], 072; GFX10-NEXT: .LBB0_1: ; %bb373; GFX10-NEXT: ; =>This Inner Loop Header: Depth=174; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)75; GFX10-NEXT: s_not_b32 s10, s576; GFX10-NEXT: s_mul_i32 s9, s6, s577; GFX10-NEXT: s_mul_i32 s10, s6, s1078; GFX10-NEXT: s_sub_i32 s9, s7, s979; GFX10-NEXT: s_add_i32 s11, s5, 180; GFX10-NEXT: s_add_i32 s10, s7, s1081; GFX10-NEXT: s_cmp_ge_u32 s9, s682; GFX10-NEXT: s_cselect_b32 s11, s11, s583; GFX10-NEXT: s_cselect_b32 s9, s10, s984; GFX10-NEXT: s_add_i32 s10, s11, 185; GFX10-NEXT: s_cmp_ge_u32 s9, s686; GFX10-NEXT: s_cselect_b32 s9, s10, s1187; GFX10-NEXT: s_add_u32 s10, s0, s288; GFX10-NEXT: s_addc_u32 s11, s1, s389; GFX10-NEXT: s_add_i32 s7, s7, 190; GFX10-NEXT: s_add_u32 s4, s4, s891; GFX10-NEXT: v_mov_b32_e32 v1, s992; GFX10-NEXT: s_addc_u32 s5, s5, 093; GFX10-NEXT: s_add_u32 s2, s2, 494; GFX10-NEXT: s_addc_u32 s3, s3, 095; GFX10-NEXT: s_cmpk_eq_i32 s2, 0x100096; GFX10-NEXT: global_store_dword v0, v1, s[10:11]97; GFX10-NEXT: s_cbranch_scc0 .LBB0_198; GFX10-NEXT: ; %bb.2: ; %bb299; GFX10-NEXT: s_endpgm100;101; GFX11-LABEL: udiv32_invariant_denom:102; GFX11: ; %bb.0: ; %bb103; GFX11-NEXT: s_clause 0x1104; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x2c105; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24106; GFX11-NEXT: s_mov_b32 s7, 0107; GFX11-NEXT: s_waitcnt lgkmcnt(0)108; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s6109; GFX11-NEXT: s_sub_i32 s2, 0, s6110; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)111; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v0112; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)113; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0114; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v0115; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)116; GFX11-NEXT: v_readfirstlane_b32 s4, v0117; GFX11-NEXT: v_mov_b32_e32 v0, 0118; GFX11-NEXT: s_mul_i32 s2, s2, s4119; GFX11-NEXT: s_mul_hi_u32 s5, s4, s2120; GFX11-NEXT: s_mov_b64 s[2:3], 0121; GFX11-NEXT: s_add_i32 s8, s4, s5122; GFX11-NEXT: s_mov_b64 s[4:5], 0123; GFX11-NEXT: .p2align 6124; GFX11-NEXT: .LBB0_1: ; %bb3125; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1126; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)127; GFX11-NEXT: s_not_b32 s10, s5128; GFX11-NEXT: s_mul_i32 s9, s6, s5129; GFX11-NEXT: s_mul_i32 s10, s6, s10130; GFX11-NEXT: s_sub_i32 s9, s7, s9131; GFX11-NEXT: s_add_i32 s11, s5, 1132; GFX11-NEXT: s_add_i32 s10, s7, s10133; GFX11-NEXT: s_cmp_ge_u32 s9, s6134; GFX11-NEXT: s_cselect_b32 s11, s11, s5135; GFX11-NEXT: s_cselect_b32 s9, s10, s9136; GFX11-NEXT: s_add_i32 s10, s11, 1137; GFX11-NEXT: s_cmp_ge_u32 s9, s6138; GFX11-NEXT: s_cselect_b32 s9, s10, s11139; GFX11-NEXT: s_add_u32 s10, s0, s2140; GFX11-NEXT: s_addc_u32 s11, s1, s3141; GFX11-NEXT: s_add_i32 s7, s7, 1142; GFX11-NEXT: s_add_u32 s4, s4, s8143; GFX11-NEXT: v_mov_b32_e32 v1, s9144; GFX11-NEXT: s_addc_u32 s5, s5, 0145; GFX11-NEXT: s_add_u32 s2, s2, 4146; GFX11-NEXT: s_addc_u32 s3, s3, 0147; GFX11-NEXT: s_cmpk_eq_i32 s2, 0x1000148; GFX11-NEXT: global_store_b32 v0, v1, s[10:11]149; GFX11-NEXT: s_cbranch_scc0 .LBB0_1150; GFX11-NEXT: ; %bb.2: ; %bb2151; GFX11-NEXT: s_endpgm152bb:153 br label %bb3154 155bb2: ; preds = %bb3156 ret void157 158bb3: ; preds = %bb3, %bb159 %tmp = phi i32 [ 0, %bb ], [ %tmp7, %bb3 ]160 %tmp4 = udiv i32 %tmp, %arg1161 %tmp5 = zext i32 %tmp to i64162 %tmp6 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp5163 store i32 %tmp4, ptr addrspace(1) %tmp6, align 4164 %tmp7 = add nuw nsw i32 %tmp, 1165 %tmp8 = icmp eq i32 %tmp7, 1024166 br i1 %tmp8, label %bb2, label %bb3167}168 169define amdgpu_kernel void @urem32_invariant_denom(ptr addrspace(1) nocapture %arg, i32 %arg1) {170; GFX9-LABEL: urem32_invariant_denom:171; GFX9: ; %bb.0: ; %bb172; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c173; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24174; GFX9-NEXT: s_mov_b32 s7, 0175; GFX9-NEXT: s_mov_b64 s[2:3], 0176; GFX9-NEXT: s_waitcnt lgkmcnt(0)177; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s6178; GFX9-NEXT: s_sub_i32 s4, 0, s6179; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0180; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0181; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v0182; GFX9-NEXT: v_mov_b32_e32 v0, 0183; GFX9-NEXT: v_readfirstlane_b32 s5, v1184; GFX9-NEXT: s_mul_i32 s4, s4, s5185; GFX9-NEXT: s_mul_hi_u32 s4, s5, s4186; GFX9-NEXT: s_add_i32 s8, s5, s4187; GFX9-NEXT: s_mov_b64 s[4:5], 0188; GFX9-NEXT: .LBB1_1: ; %bb3189; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1190; GFX9-NEXT: s_not_b32 s10, s5191; GFX9-NEXT: s_mul_i32 s9, s6, s5192; GFX9-NEXT: s_mul_i32 s10, s6, s10193; GFX9-NEXT: s_sub_i32 s9, s7, s9194; GFX9-NEXT: s_add_i32 s10, s7, s10195; GFX9-NEXT: s_cmp_ge_u32 s9, s6196; GFX9-NEXT: s_cselect_b32 s9, s10, s9197; GFX9-NEXT: s_sub_i32 s10, s9, s6198; GFX9-NEXT: s_cmp_ge_u32 s9, s6199; GFX9-NEXT: s_cselect_b32 s9, s10, s9200; GFX9-NEXT: s_add_u32 s10, s0, s2201; GFX9-NEXT: s_addc_u32 s11, s1, s3202; GFX9-NEXT: s_add_i32 s7, s7, 1203; GFX9-NEXT: s_add_u32 s4, s4, s8204; GFX9-NEXT: s_addc_u32 s5, s5, 0205; GFX9-NEXT: s_add_u32 s2, s2, 4206; GFX9-NEXT: s_addc_u32 s3, s3, 0207; GFX9-NEXT: v_mov_b32_e32 v1, s9208; GFX9-NEXT: s_cmpk_eq_i32 s2, 0x1000209; GFX9-NEXT: global_store_dword v0, v1, s[10:11]210; GFX9-NEXT: s_cbranch_scc0 .LBB1_1211; GFX9-NEXT: ; %bb.2: ; %bb2212; GFX9-NEXT: s_endpgm213;214; GFX10-LABEL: urem32_invariant_denom:215; GFX10: ; %bb.0: ; %bb216; GFX10-NEXT: s_clause 0x1217; GFX10-NEXT: s_load_dword s6, s[4:5], 0x2c218; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24219; GFX10-NEXT: s_mov_b32 s7, 0220; GFX10-NEXT: s_waitcnt lgkmcnt(0)221; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s6222; GFX10-NEXT: s_sub_i32 s2, 0, s6223; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v0224; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0225; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v0226; GFX10-NEXT: v_readfirstlane_b32 s4, v0227; GFX10-NEXT: v_mov_b32_e32 v0, 0228; GFX10-NEXT: s_mul_i32 s2, s2, s4229; GFX10-NEXT: s_mul_hi_u32 s5, s4, s2230; GFX10-NEXT: s_mov_b64 s[2:3], 0231; GFX10-NEXT: s_add_i32 s8, s4, s5232; GFX10-NEXT: s_mov_b64 s[4:5], 0233; GFX10-NEXT: .LBB1_1: ; %bb3234; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1235; GFX10-NEXT: s_not_b32 s9, s5236; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)237; GFX10-NEXT: s_mul_i32 s10, s6, s5238; GFX10-NEXT: s_mul_i32 s9, s6, s9239; GFX10-NEXT: s_sub_i32 s10, s7, s10240; GFX10-NEXT: s_add_i32 s9, s7, s9241; GFX10-NEXT: s_cmp_ge_u32 s10, s6242; GFX10-NEXT: s_cselect_b32 s9, s9, s10243; GFX10-NEXT: s_sub_i32 s10, s9, s6244; GFX10-NEXT: s_cmp_ge_u32 s9, s6245; GFX10-NEXT: s_cselect_b32 s9, s10, s9246; GFX10-NEXT: s_add_u32 s10, s0, s2247; GFX10-NEXT: s_addc_u32 s11, s1, s3248; GFX10-NEXT: s_add_i32 s7, s7, 1249; GFX10-NEXT: s_add_u32 s4, s4, s8250; GFX10-NEXT: v_mov_b32_e32 v1, s9251; GFX10-NEXT: s_addc_u32 s5, s5, 0252; GFX10-NEXT: s_add_u32 s2, s2, 4253; GFX10-NEXT: s_addc_u32 s3, s3, 0254; GFX10-NEXT: s_cmpk_eq_i32 s2, 0x1000255; GFX10-NEXT: global_store_dword v0, v1, s[10:11]256; GFX10-NEXT: s_cbranch_scc0 .LBB1_1257; GFX10-NEXT: ; %bb.2: ; %bb2258; GFX10-NEXT: s_endpgm259;260; GFX11-LABEL: urem32_invariant_denom:261; GFX11: ; %bb.0: ; %bb262; GFX11-NEXT: s_clause 0x1263; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x2c264; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24265; GFX11-NEXT: s_mov_b32 s7, 0266; GFX11-NEXT: s_waitcnt lgkmcnt(0)267; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s6268; GFX11-NEXT: s_sub_i32 s2, 0, s6269; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)270; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v0271; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)272; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0273; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v0274; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)275; GFX11-NEXT: v_readfirstlane_b32 s4, v0276; GFX11-NEXT: v_mov_b32_e32 v0, 0277; GFX11-NEXT: s_mul_i32 s2, s2, s4278; GFX11-NEXT: s_mul_hi_u32 s5, s4, s2279; GFX11-NEXT: s_mov_b64 s[2:3], 0280; GFX11-NEXT: s_add_i32 s8, s4, s5281; GFX11-NEXT: s_mov_b64 s[4:5], 0282; GFX11-NEXT: .p2align 6283; GFX11-NEXT: .LBB1_1: ; %bb3284; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1285; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)286; GFX11-NEXT: s_not_b32 s9, s5287; GFX11-NEXT: s_mul_i32 s10, s6, s5288; GFX11-NEXT: s_mul_i32 s9, s6, s9289; GFX11-NEXT: s_sub_i32 s10, s7, s10290; GFX11-NEXT: s_add_i32 s9, s7, s9291; GFX11-NEXT: s_cmp_ge_u32 s10, s6292; GFX11-NEXT: s_cselect_b32 s9, s9, s10293; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)294; GFX11-NEXT: s_sub_i32 s10, s9, s6295; GFX11-NEXT: s_cmp_ge_u32 s9, s6296; GFX11-NEXT: s_cselect_b32 s9, s10, s9297; GFX11-NEXT: s_add_u32 s10, s0, s2298; GFX11-NEXT: s_addc_u32 s11, s1, s3299; GFX11-NEXT: s_add_i32 s7, s7, 1300; GFX11-NEXT: s_add_u32 s4, s4, s8301; GFX11-NEXT: v_mov_b32_e32 v1, s9302; GFX11-NEXT: s_addc_u32 s5, s5, 0303; GFX11-NEXT: s_add_u32 s2, s2, 4304; GFX11-NEXT: s_addc_u32 s3, s3, 0305; GFX11-NEXT: s_cmpk_eq_i32 s2, 0x1000306; GFX11-NEXT: global_store_b32 v0, v1, s[10:11]307; GFX11-NEXT: s_cbranch_scc0 .LBB1_1308; GFX11-NEXT: ; %bb.2: ; %bb2309; GFX11-NEXT: s_endpgm310bb:311 br label %bb3312 313bb2: ; preds = %bb3314 ret void315 316bb3: ; preds = %bb3, %bb317 %tmp = phi i32 [ 0, %bb ], [ %tmp7, %bb3 ]318 %tmp4 = urem i32 %tmp, %arg1319 %tmp5 = zext i32 %tmp to i64320 %tmp6 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp5321 store i32 %tmp4, ptr addrspace(1) %tmp6, align 4322 %tmp7 = add nuw nsw i32 %tmp, 1323 %tmp8 = icmp eq i32 %tmp7, 1024324 br i1 %tmp8, label %bb2, label %bb3325}326 327define amdgpu_kernel void @sdiv32_invariant_denom(ptr addrspace(1) nocapture %arg, i32 %arg1) {328; GFX9-LABEL: sdiv32_invariant_denom:329; GFX9: ; %bb.0: ; %bb330; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c331; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24332; GFX9-NEXT: s_mov_b32 s3, 0333; GFX9-NEXT: s_waitcnt lgkmcnt(0)334; GFX9-NEXT: s_abs_i32 s2, s6335; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s2336; GFX9-NEXT: s_ashr_i32 s4, s6, 31337; GFX9-NEXT: s_sub_i32 s5, 0, s2338; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0339; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0340; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0341; GFX9-NEXT: v_readfirstlane_b32 s6, v0342; GFX9-NEXT: s_mul_i32 s5, s5, s6343; GFX9-NEXT: s_mul_hi_u32 s5, s6, s5344; GFX9-NEXT: s_add_i32 s5, s6, s5345; GFX9-NEXT: v_mov_b32_e32 v0, 0346; GFX9-NEXT: .LBB2_1: ; %bb3347; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1348; GFX9-NEXT: s_mul_hi_u32 s6, s3, s5349; GFX9-NEXT: s_mul_i32 s7, s6, s2350; GFX9-NEXT: s_sub_i32 s7, s3, s7351; GFX9-NEXT: s_add_i32 s8, s6, 1352; GFX9-NEXT: s_sub_i32 s9, s7, s2353; GFX9-NEXT: s_cmp_ge_u32 s7, s2354; GFX9-NEXT: s_cselect_b32 s6, s8, s6355; GFX9-NEXT: s_cselect_b32 s7, s9, s7356; GFX9-NEXT: s_add_i32 s8, s6, 1357; GFX9-NEXT: s_cmp_ge_u32 s7, s2358; GFX9-NEXT: s_cselect_b32 s6, s8, s6359; GFX9-NEXT: s_xor_b32 s6, s6, s4360; GFX9-NEXT: s_sub_i32 s6, s6, s4361; GFX9-NEXT: s_add_i32 s3, s3, 1362; GFX9-NEXT: v_mov_b32_e32 v1, s6363; GFX9-NEXT: global_store_dword v0, v1, s[0:1]364; GFX9-NEXT: s_add_u32 s0, s0, 4365; GFX9-NEXT: s_addc_u32 s1, s1, 0366; GFX9-NEXT: s_cmpk_eq_i32 s3, 0x400367; GFX9-NEXT: s_cbranch_scc0 .LBB2_1368; GFX9-NEXT: ; %bb.2: ; %bb2369; GFX9-NEXT: s_endpgm370;371; GFX10-LABEL: sdiv32_invariant_denom:372; GFX10: ; %bb.0: ; %bb373; GFX10-NEXT: s_clause 0x1374; GFX10-NEXT: s_load_dword s3, s[4:5], 0x2c375; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24376; GFX10-NEXT: s_waitcnt lgkmcnt(0)377; GFX10-NEXT: s_abs_i32 s2, s3378; GFX10-NEXT: s_ashr_i32 s3, s3, 31379; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s2380; GFX10-NEXT: s_sub_i32 s4, 0, s2381; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v0382; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0383; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v0384; GFX10-NEXT: v_readfirstlane_b32 s5, v0385; GFX10-NEXT: v_mov_b32_e32 v0, 0386; GFX10-NEXT: s_mul_i32 s4, s4, s5387; GFX10-NEXT: s_mul_hi_u32 s6, s5, s4388; GFX10-NEXT: s_mov_b32 s4, 0389; GFX10-NEXT: s_add_i32 s5, s5, s6390; GFX10-NEXT: .LBB2_1: ; %bb3391; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1392; GFX10-NEXT: s_mul_hi_u32 s6, s4, s5393; GFX10-NEXT: s_mul_i32 s7, s6, s2394; GFX10-NEXT: s_add_i32 s8, s6, 1395; GFX10-NEXT: s_sub_i32 s7, s4, s7396; GFX10-NEXT: s_sub_i32 s9, s7, s2397; GFX10-NEXT: s_cmp_ge_u32 s7, s2398; GFX10-NEXT: s_cselect_b32 s6, s8, s6399; GFX10-NEXT: s_cselect_b32 s7, s9, s7400; GFX10-NEXT: s_add_i32 s8, s6, 1401; GFX10-NEXT: s_cmp_ge_u32 s7, s2402; GFX10-NEXT: s_cselect_b32 s6, s8, s6403; GFX10-NEXT: s_add_i32 s4, s4, 1404; GFX10-NEXT: s_xor_b32 s6, s6, s3405; GFX10-NEXT: s_sub_i32 s6, s6, s3406; GFX10-NEXT: v_mov_b32_e32 v1, s6407; GFX10-NEXT: global_store_dword v0, v1, s[0:1]408; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)409; GFX10-NEXT: s_add_u32 s0, s0, 4410; GFX10-NEXT: s_addc_u32 s1, s1, 0411; GFX10-NEXT: s_cmpk_eq_i32 s4, 0x400412; GFX10-NEXT: s_cbranch_scc0 .LBB2_1413; GFX10-NEXT: ; %bb.2: ; %bb2414; GFX10-NEXT: s_endpgm415;416; GFX11-LABEL: sdiv32_invariant_denom:417; GFX11: ; %bb.0: ; %bb418; GFX11-NEXT: s_clause 0x1419; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x2c420; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24421; GFX11-NEXT: s_waitcnt lgkmcnt(0)422; GFX11-NEXT: s_abs_i32 s2, s3423; GFX11-NEXT: s_ashr_i32 s3, s3, 31424; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s2425; GFX11-NEXT: s_sub_i32 s4, 0, s2426; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)427; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v0428; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)429; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0430; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v0431; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)432; GFX11-NEXT: v_readfirstlane_b32 s5, v0433; GFX11-NEXT: v_mov_b32_e32 v0, 0434; GFX11-NEXT: s_mul_i32 s4, s4, s5435; GFX11-NEXT: s_mul_hi_u32 s6, s5, s4436; GFX11-NEXT: s_mov_b32 s4, 0437; GFX11-NEXT: s_add_i32 s5, s5, s6438; GFX11-NEXT: .p2align 6439; GFX11-NEXT: .LBB2_1: ; %bb3440; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1441; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)442; GFX11-NEXT: s_mul_hi_u32 s6, s4, s5443; GFX11-NEXT: s_mul_i32 s7, s6, s2444; GFX11-NEXT: s_add_i32 s8, s6, 1445; GFX11-NEXT: s_sub_i32 s7, s4, s7446; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)447; GFX11-NEXT: s_sub_i32 s9, s7, s2448; GFX11-NEXT: s_cmp_ge_u32 s7, s2449; GFX11-NEXT: s_cselect_b32 s6, s8, s6450; GFX11-NEXT: s_cselect_b32 s7, s9, s7451; GFX11-NEXT: s_add_i32 s8, s6, 1452; GFX11-NEXT: s_cmp_ge_u32 s7, s2453; GFX11-NEXT: s_cselect_b32 s6, s8, s6454; GFX11-NEXT: s_add_i32 s4, s4, 1455; GFX11-NEXT: s_xor_b32 s6, s6, s3456; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)457; GFX11-NEXT: s_sub_i32 s6, s6, s3458; GFX11-NEXT: v_mov_b32_e32 v1, s6459; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]460; GFX11-NEXT: s_add_u32 s0, s0, 4461; GFX11-NEXT: s_addc_u32 s1, s1, 0462; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x400463; GFX11-NEXT: s_cbranch_scc0 .LBB2_1464; GFX11-NEXT: ; %bb.2: ; %bb2465; GFX11-NEXT: s_endpgm466bb:467 br label %bb3468 469bb2: ; preds = %bb3470 ret void471 472bb3: ; preds = %bb3, %bb473 %tmp = phi i32 [ 0, %bb ], [ %tmp7, %bb3 ]474 %tmp4 = sdiv i32 %tmp, %arg1475 %tmp5 = zext i32 %tmp to i64476 %tmp6 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp5477 store i32 %tmp4, ptr addrspace(1) %tmp6, align 4478 %tmp7 = add nuw nsw i32 %tmp, 1479 %tmp8 = icmp eq i32 %tmp7, 1024480 br i1 %tmp8, label %bb2, label %bb3481}482 483define amdgpu_kernel void @srem32_invariant_denom(ptr addrspace(1) nocapture %arg, i32 %arg1) {484; GFX9-LABEL: srem32_invariant_denom:485; GFX9: ; %bb.0: ; %bb486; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c487; GFX9-NEXT: s_mov_b32 s3, 0488; GFX9-NEXT: s_waitcnt lgkmcnt(0)489; GFX9-NEXT: s_abs_i32 s2, s0490; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s2491; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24492; GFX9-NEXT: s_sub_i32 s4, 0, s2493; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0494; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0495; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0496; GFX9-NEXT: v_readfirstlane_b32 s5, v0497; GFX9-NEXT: s_mul_i32 s4, s4, s5498; GFX9-NEXT: s_mul_hi_u32 s4, s5, s4499; GFX9-NEXT: s_add_i32 s4, s5, s4500; GFX9-NEXT: v_mov_b32_e32 v0, 0501; GFX9-NEXT: .LBB3_1: ; %bb3502; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1503; GFX9-NEXT: s_mul_hi_u32 s5, s3, s4504; GFX9-NEXT: s_mul_i32 s5, s5, s2505; GFX9-NEXT: s_sub_i32 s5, s3, s5506; GFX9-NEXT: s_sub_i32 s6, s5, s2507; GFX9-NEXT: s_cmp_ge_u32 s5, s2508; GFX9-NEXT: s_cselect_b32 s5, s6, s5509; GFX9-NEXT: s_sub_i32 s6, s5, s2510; GFX9-NEXT: s_cmp_ge_u32 s5, s2511; GFX9-NEXT: s_cselect_b32 s5, s6, s5512; GFX9-NEXT: s_add_i32 s3, s3, 1513; GFX9-NEXT: v_mov_b32_e32 v1, s5514; GFX9-NEXT: s_waitcnt lgkmcnt(0)515; GFX9-NEXT: global_store_dword v0, v1, s[0:1]516; GFX9-NEXT: s_add_u32 s0, s0, 4517; GFX9-NEXT: s_addc_u32 s1, s1, 0518; GFX9-NEXT: s_cmpk_eq_i32 s3, 0x400519; GFX9-NEXT: s_cbranch_scc0 .LBB3_1520; GFX9-NEXT: ; %bb.2: ; %bb2521; GFX9-NEXT: s_endpgm522;523; GFX10-LABEL: srem32_invariant_denom:524; GFX10: ; %bb.0: ; %bb525; GFX10-NEXT: s_load_dword s0, s[4:5], 0x2c526; GFX10-NEXT: s_waitcnt lgkmcnt(0)527; GFX10-NEXT: s_abs_i32 s2, s0528; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24529; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s2530; GFX10-NEXT: s_sub_i32 s3, 0, s2531; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v0532; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0533; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v0534; GFX10-NEXT: v_readfirstlane_b32 s4, v0535; GFX10-NEXT: v_mov_b32_e32 v0, 0536; GFX10-NEXT: s_mul_i32 s3, s3, s4537; GFX10-NEXT: s_mul_hi_u32 s5, s4, s3538; GFX10-NEXT: s_mov_b32 s3, 0539; GFX10-NEXT: s_add_i32 s4, s4, s5540; GFX10-NEXT: .LBB3_1: ; %bb3541; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1542; GFX10-NEXT: s_mul_hi_u32 s5, s3, s4543; GFX10-NEXT: s_mul_i32 s5, s5, s2544; GFX10-NEXT: s_sub_i32 s5, s3, s5545; GFX10-NEXT: s_sub_i32 s6, s5, s2546; GFX10-NEXT: s_cmp_ge_u32 s5, s2547; GFX10-NEXT: s_cselect_b32 s5, s6, s5548; GFX10-NEXT: s_sub_i32 s6, s5, s2549; GFX10-NEXT: s_cmp_ge_u32 s5, s2550; GFX10-NEXT: s_cselect_b32 s5, s6, s5551; GFX10-NEXT: s_add_i32 s3, s3, 1552; GFX10-NEXT: v_mov_b32_e32 v1, s5553; GFX10-NEXT: s_waitcnt lgkmcnt(0)554; GFX10-NEXT: global_store_dword v0, v1, s[0:1]555; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)556; GFX10-NEXT: s_add_u32 s0, s0, 4557; GFX10-NEXT: s_addc_u32 s1, s1, 0558; GFX10-NEXT: s_cmpk_eq_i32 s3, 0x400559; GFX10-NEXT: s_cbranch_scc0 .LBB3_1560; GFX10-NEXT: ; %bb.2: ; %bb2561; GFX10-NEXT: s_endpgm562;563; GFX11-LABEL: srem32_invariant_denom:564; GFX11: ; %bb.0: ; %bb565; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c566; GFX11-NEXT: s_waitcnt lgkmcnt(0)567; GFX11-NEXT: s_abs_i32 s2, s0568; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24569; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s2570; GFX11-NEXT: s_sub_i32 s3, 0, s2571; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)572; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v0573; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)574; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0575; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v0576; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)577; GFX11-NEXT: v_readfirstlane_b32 s4, v0578; GFX11-NEXT: v_mov_b32_e32 v0, 0579; GFX11-NEXT: s_mul_i32 s3, s3, s4580; GFX11-NEXT: s_mul_hi_u32 s5, s4, s3581; GFX11-NEXT: s_mov_b32 s3, 0582; GFX11-NEXT: s_add_i32 s4, s4, s5583; GFX11-NEXT: .p2align 6584; GFX11-NEXT: .LBB3_1: ; %bb3585; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1586; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)587; GFX11-NEXT: s_mul_hi_u32 s5, s3, s4588; GFX11-NEXT: s_mul_i32 s5, s5, s2589; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)590; GFX11-NEXT: s_sub_i32 s5, s3, s5591; GFX11-NEXT: s_sub_i32 s6, s5, s2592; GFX11-NEXT: s_cmp_ge_u32 s5, s2593; GFX11-NEXT: s_cselect_b32 s5, s6, s5594; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)595; GFX11-NEXT: s_sub_i32 s6, s5, s2596; GFX11-NEXT: s_cmp_ge_u32 s5, s2597; GFX11-NEXT: s_cselect_b32 s5, s6, s5598; GFX11-NEXT: s_add_i32 s3, s3, 1599; GFX11-NEXT: v_mov_b32_e32 v1, s5600; GFX11-NEXT: s_waitcnt lgkmcnt(0)601; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]602; GFX11-NEXT: s_add_u32 s0, s0, 4603; GFX11-NEXT: s_addc_u32 s1, s1, 0604; GFX11-NEXT: s_cmpk_eq_i32 s3, 0x400605; GFX11-NEXT: s_cbranch_scc0 .LBB3_1606; GFX11-NEXT: ; %bb.2: ; %bb2607; GFX11-NEXT: s_endpgm608bb:609 br label %bb3610 611bb2: ; preds = %bb3612 ret void613 614bb3: ; preds = %bb3, %bb615 %tmp = phi i32 [ 0, %bb ], [ %tmp7, %bb3 ]616 %tmp4 = srem i32 %tmp, %arg1617 %tmp5 = zext i32 %tmp to i64618 %tmp6 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp5619 store i32 %tmp4, ptr addrspace(1) %tmp6, align 4620 %tmp7 = add nuw nsw i32 %tmp, 1621 %tmp8 = icmp eq i32 %tmp7, 1024622 br i1 %tmp8, label %bb2, label %bb3623}624 625define amdgpu_kernel void @udiv16_invariant_denom(ptr addrspace(1) nocapture %arg, i16 %arg1) {626; GFX9-LABEL: udiv16_invariant_denom:627; GFX9: ; %bb.0: ; %bb628; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c629; GFX9-NEXT: s_mov_b32 s2, 0630; GFX9-NEXT: s_waitcnt lgkmcnt(0)631; GFX9-NEXT: s_and_b32 s0, s0, 0xffff632; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s0633; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24634; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0635; GFX9-NEXT: .LBB4_1: ; %bb3636; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1637; GFX9-NEXT: s_and_b32 s3, 0xffff, s2638; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s3639; GFX9-NEXT: s_add_i32 s2, s2, 1640; GFX9-NEXT: s_lshl_b32 s3, s3, 1641; GFX9-NEXT: s_and_b32 s4, s2, 0xffff642; GFX9-NEXT: v_mul_f32_e32 v4, v2, v1643; GFX9-NEXT: v_trunc_f32_e32 v4, v4644; GFX9-NEXT: v_cvt_u32_f32_e32 v5, v4645; GFX9-NEXT: v_mad_f32 v2, -v4, v0, v2646; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0647; GFX9-NEXT: v_mov_b32_e32 v3, s3648; GFX9-NEXT: s_cmpk_eq_i32 s4, 0x400649; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v5, vcc650; GFX9-NEXT: s_waitcnt lgkmcnt(0)651; GFX9-NEXT: global_store_short v3, v2, s[0:1]652; GFX9-NEXT: s_cbranch_scc0 .LBB4_1653; GFX9-NEXT: ; %bb.2: ; %bb2654; GFX9-NEXT: s_endpgm655;656; GFX10-LABEL: udiv16_invariant_denom:657; GFX10: ; %bb.0: ; %bb658; GFX10-NEXT: s_clause 0x1659; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c660; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24661; GFX10-NEXT: s_waitcnt lgkmcnt(0)662; GFX10-NEXT: s_and_b32 s2, s2, 0xffff663; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s2664; GFX10-NEXT: s_mov_b32 s2, 0665; GFX10-NEXT: v_rcp_iflag_f32_e32 v1, v0666; GFX10-NEXT: .LBB4_1: ; %bb3667; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1668; GFX10-NEXT: s_and_b32 s3, 0xffff, s2669; GFX10-NEXT: s_add_i32 s2, s2, 1670; GFX10-NEXT: v_cvt_f32_u32_e32 v2, s3671; GFX10-NEXT: s_lshl_b32 s3, s3, 1672; GFX10-NEXT: v_mov_b32_e32 v4, s3673; GFX10-NEXT: s_and_b32 s3, s2, 0xffff674; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1675; GFX10-NEXT: s_cmpk_eq_i32 s3, 0x400676; GFX10-NEXT: v_trunc_f32_e32 v3, v3677; GFX10-NEXT: v_mad_f32 v2, -v3, v0, v2678; GFX10-NEXT: v_cvt_u32_f32_e32 v3, v3679; GFX10-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v0680; GFX10-NEXT: v_add_co_ci_u32_e32 v2, vcc_lo, 0, v3, vcc_lo681; GFX10-NEXT: global_store_short v4, v2, s[0:1]682; GFX10-NEXT: s_cbranch_scc0 .LBB4_1683; GFX10-NEXT: ; %bb.2: ; %bb2684; GFX10-NEXT: s_endpgm685;686; GFX11-LABEL: udiv16_invariant_denom:687; GFX11: ; %bb.0: ; %bb688; GFX11-NEXT: s_clause 0x1689; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c690; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24691; GFX11-NEXT: s_waitcnt lgkmcnt(0)692; GFX11-NEXT: s_and_b32 s2, s2, 0xffff693; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)694; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s2695; GFX11-NEXT: s_mov_b32 s2, 0696; GFX11-NEXT: v_rcp_iflag_f32_e32 v1, v0697; GFX11-NEXT: .p2align 6698; GFX11-NEXT: .LBB4_1: ; %bb3699; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1700; GFX11-NEXT: s_and_b32 s3, 0xffff, s2701; GFX11-NEXT: s_add_i32 s2, s2, 1702; GFX11-NEXT: v_cvt_f32_u32_e32 v2, s3703; GFX11-NEXT: s_lshl_b32 s3, s3, 1704; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)705; GFX11-NEXT: v_mov_b32_e32 v4, s3706; GFX11-NEXT: s_and_b32 s3, s2, 0xffff707; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)708; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1709; GFX11-NEXT: s_cmpk_eq_i32 s3, 0x400710; GFX11-NEXT: v_trunc_f32_e32 v3, v3711; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)712; GFX11-NEXT: v_fma_f32 v2, -v3, v0, v2713; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v3714; GFX11-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v0715; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)716; GFX11-NEXT: v_add_co_ci_u32_e64 v2, null, 0, v3, vcc_lo717; GFX11-NEXT: global_store_b16 v4, v2, s[0:1]718; GFX11-NEXT: s_cbranch_scc0 .LBB4_1719; GFX11-NEXT: ; %bb.2: ; %bb2720; GFX11-NEXT: s_endpgm721bb:722 br label %bb3723 724bb2: ; preds = %bb3725 ret void726 727bb3: ; preds = %bb3, %bb728 %tmp = phi i16 [ 0, %bb ], [ %tmp7, %bb3 ]729 %tmp4 = udiv i16 %tmp, %arg1730 %tmp5 = zext i16 %tmp to i64731 %tmp6 = getelementptr inbounds i16, ptr addrspace(1) %arg, i64 %tmp5732 store i16 %tmp4, ptr addrspace(1) %tmp6, align 2733 %tmp7 = add nuw nsw i16 %tmp, 1734 %tmp8 = icmp eq i16 %tmp7, 1024735 br i1 %tmp8, label %bb2, label %bb3736}737 738define amdgpu_kernel void @urem16_invariant_denom(ptr addrspace(1) nocapture %arg, i16 %arg1) {739; GFX9-LABEL: urem16_invariant_denom:740; GFX9: ; %bb.0: ; %bb741; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c742; GFX9-NEXT: s_mov_b32 s3, 0743; GFX9-NEXT: s_waitcnt lgkmcnt(0)744; GFX9-NEXT: s_and_b32 s2, s0, 0xffff745; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s2746; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24747; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0748; GFX9-NEXT: .LBB5_1: ; %bb3749; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1750; GFX9-NEXT: s_and_b32 s4, 0xffff, s3751; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s4752; GFX9-NEXT: s_add_i32 s3, s3, 1753; GFX9-NEXT: s_lshl_b32 s5, s4, 1754; GFX9-NEXT: s_and_b32 s6, s3, 0xffff755; GFX9-NEXT: v_mul_f32_e32 v3, v2, v1756; GFX9-NEXT: v_trunc_f32_e32 v3, v3757; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v3758; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2759; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0760; GFX9-NEXT: v_mov_b32_e32 v3, s5761; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v4, vcc762; GFX9-NEXT: v_mul_lo_u32 v2, v2, s2763; GFX9-NEXT: s_cmpk_eq_i32 s6, 0x400764; GFX9-NEXT: v_sub_u32_e32 v2, s4, v2765; GFX9-NEXT: s_waitcnt lgkmcnt(0)766; GFX9-NEXT: global_store_short v3, v2, s[0:1]767; GFX9-NEXT: s_cbranch_scc0 .LBB5_1768; GFX9-NEXT: ; %bb.2: ; %bb2769; GFX9-NEXT: s_endpgm770;771; GFX10-LABEL: urem16_invariant_denom:772; GFX10: ; %bb.0: ; %bb773; GFX10-NEXT: s_clause 0x1774; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c775; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24776; GFX10-NEXT: s_mov_b32 s3, 0777; GFX10-NEXT: s_waitcnt lgkmcnt(0)778; GFX10-NEXT: s_and_b32 s2, s2, 0xffff779; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s2780; GFX10-NEXT: v_rcp_iflag_f32_e32 v1, v0781; GFX10-NEXT: .LBB5_1: ; %bb3782; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1783; GFX10-NEXT: s_and_b32 s4, 0xffff, s3784; GFX10-NEXT: s_add_i32 s3, s3, 1785; GFX10-NEXT: v_cvt_f32_u32_e32 v2, s4786; GFX10-NEXT: s_lshl_b32 s5, s4, 1787; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1788; GFX10-NEXT: v_trunc_f32_e32 v3, v3789; GFX10-NEXT: v_mad_f32 v2, -v3, v0, v2790; GFX10-NEXT: v_cvt_u32_f32_e32 v3, v3791; GFX10-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v0792; GFX10-NEXT: v_add_co_ci_u32_e32 v2, vcc_lo, 0, v3, vcc_lo793; GFX10-NEXT: v_mov_b32_e32 v3, s5794; GFX10-NEXT: v_mul_lo_u32 v2, v2, s2795; GFX10-NEXT: v_sub_nc_u32_e32 v2, s4, v2796; GFX10-NEXT: s_and_b32 s4, s3, 0xffff797; GFX10-NEXT: s_cmpk_eq_i32 s4, 0x400798; GFX10-NEXT: global_store_short v3, v2, s[0:1]799; GFX10-NEXT: s_cbranch_scc0 .LBB5_1800; GFX10-NEXT: ; %bb.2: ; %bb2801; GFX10-NEXT: s_endpgm802;803; GFX11-LABEL: urem16_invariant_denom:804; GFX11: ; %bb.0: ; %bb805; GFX11-NEXT: s_clause 0x1806; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c807; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24808; GFX11-NEXT: s_mov_b32 s3, 0809; GFX11-NEXT: s_waitcnt lgkmcnt(0)810; GFX11-NEXT: s_and_b32 s2, s2, 0xffff811; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)812; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s2813; GFX11-NEXT: v_rcp_iflag_f32_e32 v1, v0814; GFX11-NEXT: .p2align 6815; GFX11-NEXT: .LBB5_1: ; %bb3816; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1817; GFX11-NEXT: s_and_b32 s4, 0xffff, s3818; GFX11-NEXT: s_add_i32 s3, s3, 1819; GFX11-NEXT: v_cvt_f32_u32_e32 v2, s4820; GFX11-NEXT: s_lshl_b32 s5, s4, 1821; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)822; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1823; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)824; GFX11-NEXT: v_trunc_f32_e32 v3, v3825; GFX11-NEXT: v_fma_f32 v2, -v3, v0, v2826; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v3827; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)828; GFX11-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v0829; GFX11-NEXT: v_add_co_ci_u32_e64 v2, null, 0, v3, vcc_lo830; GFX11-NEXT: v_mov_b32_e32 v3, s5831; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)832; GFX11-NEXT: v_mul_lo_u32 v2, v2, s2833; GFX11-NEXT: v_sub_nc_u32_e32 v2, s4, v2834; GFX11-NEXT: s_and_b32 s4, s3, 0xffff835; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)836; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x400837; GFX11-NEXT: global_store_b16 v3, v2, s[0:1]838; GFX11-NEXT: s_cbranch_scc0 .LBB5_1839; GFX11-NEXT: ; %bb.2: ; %bb2840; GFX11-NEXT: s_endpgm841bb:842 br label %bb3843 844bb2: ; preds = %bb3845 ret void846 847bb3: ; preds = %bb3, %bb848 %tmp = phi i16 [ 0, %bb ], [ %tmp7, %bb3 ]849 %tmp4 = urem i16 %tmp, %arg1850 %tmp5 = zext i16 %tmp to i64851 %tmp6 = getelementptr inbounds i16, ptr addrspace(1) %arg, i64 %tmp5852 store i16 %tmp4, ptr addrspace(1) %tmp6, align 2853 %tmp7 = add nuw nsw i16 %tmp, 1854 %tmp8 = icmp eq i16 %tmp7, 1024855 br i1 %tmp8, label %bb2, label %bb3856}857 858define amdgpu_kernel void @sdiv16_invariant_denom(ptr addrspace(1) nocapture %arg, i16 %arg1) {859; GFX9-LABEL: sdiv16_invariant_denom:860; GFX9: ; %bb.0: ; %bb861; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c862; GFX9-NEXT: s_mov_b32 s3, 0863; GFX9-NEXT: s_waitcnt lgkmcnt(0)864; GFX9-NEXT: s_sext_i32_i16 s2, s0865; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s2866; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24867; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0868; GFX9-NEXT: .LBB6_1: ; %bb3869; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1870; GFX9-NEXT: s_sext_i32_i16 s4, s3871; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s4872; GFX9-NEXT: s_xor_b32 s4, s4, s2873; GFX9-NEXT: s_ashr_i32 s4, s4, 30874; GFX9-NEXT: s_or_b32 s6, s4, 1875; GFX9-NEXT: v_mul_f32_e32 v3, v2, v1876; GFX9-NEXT: v_trunc_f32_e32 v3, v3877; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2878; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3879; GFX9-NEXT: v_cmp_ge_f32_e64 s[4:5], |v2|, |v0|880; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec881; GFX9-NEXT: s_cselect_b32 s4, s6, 0882; GFX9-NEXT: s_and_b32 s5, 0xffff, s3883; GFX9-NEXT: s_add_i32 s3, s3, 1884; GFX9-NEXT: v_add_u32_e32 v2, s4, v3885; GFX9-NEXT: s_lshl_b32 s4, s5, 1886; GFX9-NEXT: s_and_b32 s5, s3, 0xffff887; GFX9-NEXT: v_mov_b32_e32 v3, s4888; GFX9-NEXT: s_cmpk_eq_i32 s5, 0x400889; GFX9-NEXT: s_waitcnt lgkmcnt(0)890; GFX9-NEXT: global_store_short v3, v2, s[0:1]891; GFX9-NEXT: s_cbranch_scc0 .LBB6_1892; GFX9-NEXT: ; %bb.2: ; %bb2893; GFX9-NEXT: s_endpgm894;895; GFX10-LABEL: sdiv16_invariant_denom:896; GFX10: ; %bb.0: ; %bb897; GFX10-NEXT: s_clause 0x1898; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c899; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24900; GFX10-NEXT: s_mov_b32 s3, 0901; GFX10-NEXT: s_waitcnt lgkmcnt(0)902; GFX10-NEXT: s_sext_i32_i16 s2, s2903; GFX10-NEXT: v_cvt_f32_i32_e32 v0, s2904; GFX10-NEXT: v_rcp_iflag_f32_e32 v1, v0905; GFX10-NEXT: .LBB6_1: ; %bb3906; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1907; GFX10-NEXT: s_sext_i32_i16 s4, s3908; GFX10-NEXT: v_cvt_f32_i32_e32 v2, s4909; GFX10-NEXT: s_xor_b32 s4, s4, s2910; GFX10-NEXT: s_ashr_i32 s4, s4, 30911; GFX10-NEXT: s_or_b32 s4, s4, 1912; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1913; GFX10-NEXT: v_trunc_f32_e32 v3, v3914; GFX10-NEXT: v_mad_f32 v2, -v3, v0, v2915; GFX10-NEXT: v_cmp_ge_f32_e64 s5, |v2|, |v0|916; GFX10-NEXT: v_cvt_i32_f32_e32 v2, v3917; GFX10-NEXT: s_and_b32 s5, s5, exec_lo918; GFX10-NEXT: s_cselect_b32 s4, s4, 0919; GFX10-NEXT: s_and_b32 s5, 0xffff, s3920; GFX10-NEXT: s_add_i32 s3, s3, 1921; GFX10-NEXT: s_lshl_b32 s5, s5, 1922; GFX10-NEXT: v_add_nc_u32_e32 v2, s4, v2923; GFX10-NEXT: v_mov_b32_e32 v3, s5924; GFX10-NEXT: s_and_b32 s4, s3, 0xffff925; GFX10-NEXT: s_cmpk_eq_i32 s4, 0x400926; GFX10-NEXT: global_store_short v3, v2, s[0:1]927; GFX10-NEXT: s_cbranch_scc0 .LBB6_1928; GFX10-NEXT: ; %bb.2: ; %bb2929; GFX10-NEXT: s_endpgm930;931; GFX11-LABEL: sdiv16_invariant_denom:932; GFX11: ; %bb.0: ; %bb933; GFX11-NEXT: s_clause 0x1934; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c935; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24936; GFX11-NEXT: s_mov_b32 s3, 0937; GFX11-NEXT: s_waitcnt lgkmcnt(0)938; GFX11-NEXT: s_sext_i32_i16 s2, s2939; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)940; GFX11-NEXT: v_cvt_f32_i32_e32 v0, s2941; GFX11-NEXT: v_rcp_iflag_f32_e32 v1, v0942; GFX11-NEXT: .p2align 6943; GFX11-NEXT: .LBB6_1: ; %bb3944; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1945; GFX11-NEXT: s_sext_i32_i16 s4, s3946; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)947; GFX11-NEXT: v_cvt_f32_i32_e32 v2, s4948; GFX11-NEXT: s_xor_b32 s4, s4, s2949; GFX11-NEXT: s_ashr_i32 s4, s4, 30950; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)951; GFX11-NEXT: s_or_b32 s4, s4, 1952; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)953; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1954; GFX11-NEXT: v_trunc_f32_e32 v3, v3955; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)956; GFX11-NEXT: v_fma_f32 v2, -v3, v0, v2957; GFX11-NEXT: v_cmp_ge_f32_e64 s5, |v2|, |v0|958; GFX11-NEXT: v_cvt_i32_f32_e32 v2, v3959; GFX11-NEXT: s_and_b32 s5, s5, exec_lo960; GFX11-NEXT: s_cselect_b32 s4, s4, 0961; GFX11-NEXT: s_and_b32 s5, 0xffff, s3962; GFX11-NEXT: s_add_i32 s3, s3, 1963; GFX11-NEXT: s_lshl_b32 s5, s5, 1964; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)965; GFX11-NEXT: v_dual_mov_b32 v3, s5 :: v_dual_add_nc_u32 v2, s4, v2966; GFX11-NEXT: s_and_b32 s4, s3, 0xffff967; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x400968; GFX11-NEXT: global_store_b16 v3, v2, s[0:1]969; GFX11-NEXT: s_cbranch_scc0 .LBB6_1970; GFX11-NEXT: ; %bb.2: ; %bb2971; GFX11-NEXT: s_endpgm972bb:973 br label %bb3974 975bb2: ; preds = %bb3976 ret void977 978bb3: ; preds = %bb3, %bb979 %tmp = phi i16 [ 0, %bb ], [ %tmp7, %bb3 ]980 %tmp4 = sdiv i16 %tmp, %arg1981 %tmp5 = zext i16 %tmp to i64982 %tmp6 = getelementptr inbounds i16, ptr addrspace(1) %arg, i64 %tmp5983 store i16 %tmp4, ptr addrspace(1) %tmp6, align 2984 %tmp7 = add nuw nsw i16 %tmp, 1985 %tmp8 = icmp eq i16 %tmp7, 1024986 br i1 %tmp8, label %bb2, label %bb3987}988 989define amdgpu_kernel void @srem16_invariant_denom(ptr addrspace(1) nocapture %arg, i16 %arg1) {990; GFX9-LABEL: srem16_invariant_denom:991; GFX9: ; %bb.0: ; %bb992; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c993; GFX9-NEXT: s_mov_b32 s3, 0994; GFX9-NEXT: s_waitcnt lgkmcnt(0)995; GFX9-NEXT: s_sext_i32_i16 s2, s0996; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s2997; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24998; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0999; GFX9-NEXT: .LBB7_1: ; %bb31000; GFX9-NEXT: ; =>This Inner Loop Header: Depth=11001; GFX9-NEXT: s_sext_i32_i16 s6, s31002; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s61003; GFX9-NEXT: s_xor_b32 s4, s6, s21004; GFX9-NEXT: s_ashr_i32 s4, s4, 301005; GFX9-NEXT: s_or_b32 s7, s4, 11006; GFX9-NEXT: v_mul_f32_e32 v3, v2, v11007; GFX9-NEXT: v_trunc_f32_e32 v3, v31008; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v21009; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v31010; GFX9-NEXT: v_cmp_ge_f32_e64 s[4:5], |v2|, |v0|1011; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec1012; GFX9-NEXT: s_cselect_b32 s4, s7, 01013; GFX9-NEXT: v_add_u32_e32 v2, s4, v31014; GFX9-NEXT: v_mul_lo_u32 v2, v2, s21015; GFX9-NEXT: s_and_b32 s5, 0xffff, s31016; GFX9-NEXT: s_add_i32 s3, s3, 11017; GFX9-NEXT: s_lshl_b32 s4, s5, 11018; GFX9-NEXT: s_and_b32 s5, s3, 0xffff1019; GFX9-NEXT: v_mov_b32_e32 v3, s41020; GFX9-NEXT: s_cmpk_eq_i32 s5, 0x4001021; GFX9-NEXT: v_sub_u32_e32 v2, s6, v21022; GFX9-NEXT: s_waitcnt lgkmcnt(0)1023; GFX9-NEXT: global_store_short v3, v2, s[0:1]1024; GFX9-NEXT: s_cbranch_scc0 .LBB7_11025; GFX9-NEXT: ; %bb.2: ; %bb21026; GFX9-NEXT: s_endpgm1027;1028; GFX10-LABEL: srem16_invariant_denom:1029; GFX10: ; %bb.0: ; %bb1030; GFX10-NEXT: s_clause 0x11031; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c1032; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241033; GFX10-NEXT: s_mov_b32 s3, 01034; GFX10-NEXT: s_waitcnt lgkmcnt(0)1035; GFX10-NEXT: s_sext_i32_i16 s2, s21036; GFX10-NEXT: v_cvt_f32_i32_e32 v0, s21037; GFX10-NEXT: v_rcp_iflag_f32_e32 v1, v01038; GFX10-NEXT: .LBB7_1: ; %bb31039; GFX10-NEXT: ; =>This Inner Loop Header: Depth=11040; GFX10-NEXT: s_sext_i32_i16 s4, s31041; GFX10-NEXT: v_cvt_f32_i32_e32 v2, s41042; GFX10-NEXT: s_xor_b32 s5, s4, s21043; GFX10-NEXT: s_ashr_i32 s5, s5, 301044; GFX10-NEXT: s_or_b32 s5, s5, 11045; GFX10-NEXT: v_mul_f32_e32 v3, v2, v11046; GFX10-NEXT: v_trunc_f32_e32 v3, v31047; GFX10-NEXT: v_mad_f32 v2, -v3, v0, v21048; GFX10-NEXT: v_cmp_ge_f32_e64 s6, |v2|, |v0|1049; GFX10-NEXT: v_cvt_i32_f32_e32 v2, v31050; GFX10-NEXT: s_and_b32 s6, s6, exec_lo1051; GFX10-NEXT: s_cselect_b32 s5, s5, 01052; GFX10-NEXT: v_add_nc_u32_e32 v2, s5, v21053; GFX10-NEXT: s_and_b32 s5, 0xffff, s31054; GFX10-NEXT: s_add_i32 s3, s3, 11055; GFX10-NEXT: s_lshl_b32 s5, s5, 11056; GFX10-NEXT: v_mul_lo_u32 v2, v2, s21057; GFX10-NEXT: v_mov_b32_e32 v3, s51058; GFX10-NEXT: v_sub_nc_u32_e32 v2, s4, v21059; GFX10-NEXT: s_and_b32 s4, s3, 0xffff1060; GFX10-NEXT: s_cmpk_eq_i32 s4, 0x4001061; GFX10-NEXT: global_store_short v3, v2, s[0:1]1062; GFX10-NEXT: s_cbranch_scc0 .LBB7_11063; GFX10-NEXT: ; %bb.2: ; %bb21064; GFX10-NEXT: s_endpgm1065;1066; GFX11-LABEL: srem16_invariant_denom:1067; GFX11: ; %bb.0: ; %bb1068; GFX11-NEXT: s_clause 0x11069; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c1070; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x241071; GFX11-NEXT: s_mov_b32 s3, 01072; GFX11-NEXT: s_waitcnt lgkmcnt(0)1073; GFX11-NEXT: s_sext_i32_i16 s2, s21074; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)1075; GFX11-NEXT: v_cvt_f32_i32_e32 v0, s21076; GFX11-NEXT: v_rcp_iflag_f32_e32 v1, v01077; GFX11-NEXT: .p2align 61078; GFX11-NEXT: .LBB7_1: ; %bb31079; GFX11-NEXT: ; =>This Inner Loop Header: Depth=11080; GFX11-NEXT: s_sext_i32_i16 s4, s31081; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)1082; GFX11-NEXT: v_cvt_f32_i32_e32 v2, s41083; GFX11-NEXT: s_xor_b32 s5, s4, s21084; GFX11-NEXT: s_ashr_i32 s5, s5, 301085; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1086; GFX11-NEXT: s_or_b32 s5, s5, 11087; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1088; GFX11-NEXT: v_mul_f32_e32 v3, v2, v11089; GFX11-NEXT: v_trunc_f32_e32 v3, v31090; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1091; GFX11-NEXT: v_fma_f32 v2, -v3, v0, v21092; GFX11-NEXT: v_cmp_ge_f32_e64 s6, |v2|, |v0|1093; GFX11-NEXT: v_cvt_i32_f32_e32 v2, v31094; GFX11-NEXT: s_and_b32 s6, s6, exec_lo1095; GFX11-NEXT: s_cselect_b32 s5, s5, 01096; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)1097; GFX11-NEXT: v_add_nc_u32_e32 v2, s5, v21098; GFX11-NEXT: s_and_b32 s5, 0xffff, s31099; GFX11-NEXT: s_add_i32 s3, s3, 11100; GFX11-NEXT: s_lshl_b32 s5, s5, 11101; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1102; GFX11-NEXT: v_mul_lo_u32 v2, v2, s21103; GFX11-NEXT: v_mov_b32_e32 v3, s51104; GFX11-NEXT: v_sub_nc_u32_e32 v2, s4, v21105; GFX11-NEXT: s_and_b32 s4, s3, 0xffff1106; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1107; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x4001108; GFX11-NEXT: global_store_b16 v3, v2, s[0:1]1109; GFX11-NEXT: s_cbranch_scc0 .LBB7_11110; GFX11-NEXT: ; %bb.2: ; %bb21111; GFX11-NEXT: s_endpgm1112bb:1113 br label %bb31114 1115bb2: ; preds = %bb31116 ret void1117 1118bb3: ; preds = %bb3, %bb1119 %tmp = phi i16 [ 0, %bb ], [ %tmp7, %bb3 ]1120 %tmp4 = srem i16 %tmp, %arg11121 %tmp5 = zext i16 %tmp to i641122 %tmp6 = getelementptr inbounds i16, ptr addrspace(1) %arg, i64 %tmp51123 store i16 %tmp4, ptr addrspace(1) %tmp6, align 21124 %tmp7 = add nuw nsw i16 %tmp, 11125 %tmp8 = icmp eq i16 %tmp7, 10241126 br i1 %tmp8, label %bb2, label %bb31127}1128