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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-regalloc -start-before=greedy,0 -stop-after=virtregrewriter,0 -simplify-mir -o - %s | FileCheck %s3 4--- |5 6 define void @main() #0 {7 bb:8 ret void9 }10 11 attributes #0 = { "amdgpu-waves-per-eu"="10,10" }12 13...14---15name: main16tracksRegLiveness: true17machineFunctionInfo:18 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'19 frameOffsetReg: '$sgpr33'20 stackPtrOffsetReg: '$sgpr32'21 occupancy: 822 sgprForEXECCopy: '$sgpr58_sgpr59'23body: |24 ; CHECK-LABEL: name: main25 ; CHECK: bb.0:26 ; CHECK-NEXT: liveins: $vgpr027 ; CHECK-NEXT: {{ $}}28 ; CHECK-NEXT: renamable $sgpr5 = IMPLICIT_DEF29 ; CHECK-NEXT: dead undef [[DEF:%[0-9]+]].sub0:vreg_64 = IMPLICIT_DEF30 ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF31 ; CHECK-NEXT: dead undef [[DEF2:%[0-9]+]].sub0:vreg_64 = IMPLICIT_DEF32 ; CHECK-NEXT: renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51 = S_LOAD_DWORDX16_IMM renamable $sgpr4_sgpr5, 0, 0 :: (invariant load (s512), align 32, addrspace 4)33 ; CHECK-NEXT: renamable $sgpr24 = IMPLICIT_DEF implicit-def $sgpr2534 ; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = S_LOAD_DWORDX16_IMM undef renamable $sgpr4_sgpr5, 0, 0 :: (invariant load (s512), align 32, addrspace 4)35 ; CHECK-NEXT: $exec = S_MOV_B64_term undef renamable $sgpr4_sgpr536 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.6, implicit $exec37 ; CHECK-NEXT: S_BRANCH %bb.538 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: bb.1:40 ; CHECK-NEXT: liveins: $sgpr24_sgpr25_sgpr26_sgpr27:0x000000000000000F, $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x000000000000FFFF41 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: $exec = S_MOV_B64_term undef renamable $sgpr4_sgpr543 ; CHECK-NEXT: S_CBRANCH_EXECNZ %bb.4, implicit $exec44 ; CHECK-NEXT: {{ $}}45 ; CHECK-NEXT: bb.2:46 ; CHECK-NEXT: liveins: $sgpr24_sgpr25_sgpr26_sgpr27:0x000000000000000F, $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x000000000000FFFF47 ; CHECK-NEXT: {{ $}}48 ; CHECK-NEXT: dead [[IMAGE_SAMPLE_LZ_V1_V2_:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF2]], killed renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43, undef renamable $sgpr24_sgpr25_sgpr26_sgpr27, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)49 ; CHECK-NEXT: dead [[IMAGE_SAMPLE_LZ_V1_V2_1:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF2]], killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11, renamable $sgpr24_sgpr25_sgpr26_sgpr27, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)50 ; CHECK-NEXT: {{ $}}51 ; CHECK-NEXT: bb.3:52 ; CHECK-NEXT: SI_RETURN53 ; CHECK-NEXT: {{ $}}54 ; CHECK-NEXT: bb.4:55 ; CHECK-NEXT: liveins: $sgpr24_sgpr25_sgpr26_sgpr27:0x000000000000000F, $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x000000000000FFFF56 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: renamable $sgpr12 = IMPLICIT_DEF58 ; CHECK-NEXT: SI_SPILL_S512_SAVE renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s512) into %stack.0, align 4, addrspace 5)59 ; CHECK-NEXT: renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51 = IMPLICIT_DEF60 ; CHECK-NEXT: dead undef [[IMAGE_SAMPLE_LZ_V1_V2_2:%[0-9]+]].sub0:vreg_96 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF2]], killed renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43, renamable $sgpr12_sgpr13_sgpr14_sgpr15, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)61 ; CHECK-NEXT: renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s512) from %stack.0, align 4, addrspace 5)62 ; CHECK-NEXT: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = IMPLICIT_DEF63 ; CHECK-NEXT: dead undef [[IMAGE_SAMPLE_LZ_V1_V2_3:%[0-9]+]].sub0:vreg_128 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF2]], undef renamable $sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51, killed renamable $sgpr12_sgpr13_sgpr14_sgpr15, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)64 ; CHECK-NEXT: S_BRANCH %bb.265 ; CHECK-NEXT: {{ $}}66 ; CHECK-NEXT: bb.5:67 ; CHECK-NEXT: liveins: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x00000000FFFFFFFF68 ; CHECK-NEXT: {{ $}}69 ; CHECK-NEXT: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = COPY killed renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr5170 ; CHECK-NEXT: renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51 = IMPLICIT_DEF71 ; CHECK-NEXT: dead [[IMAGE_SAMPLE_LZ_V1_V2_4:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF]], killed renamable $sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51, undef renamable $sgpr24_sgpr25_sgpr26_sgpr27, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)72 ; CHECK-NEXT: renamable $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51 = COPY killed renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr2773 ; CHECK-NEXT: S_BRANCH %bb.774 ; CHECK-NEXT: {{ $}}75 ; CHECK-NEXT: bb.6:76 ; CHECK-NEXT: liveins: $sgpr24_sgpr25_sgpr26_sgpr27:0x000000000000000F, $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x000000000000FFFF77 ; CHECK-NEXT: {{ $}}78 ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, undef renamable $sgpr4_sgpr5, implicit-def $scc79 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.8, implicit $exec80 ; CHECK-NEXT: S_BRANCH %bb.181 ; CHECK-NEXT: {{ $}}82 ; CHECK-NEXT: bb.7:83 ; CHECK-NEXT: liveins: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19:0x000000000000FFFF, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51:0x00000000FFFFFFFF84 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: dead [[IMAGE_SAMPLE_LZ_V1_V2_5:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef [[DEF]], renamable $sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51, undef renamable $sgpr8_sgpr9_sgpr10_sgpr11, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)86 ; CHECK-NEXT: renamable $sgpr25 = COPY undef renamable $sgpr24, implicit-def $sgpr2487 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc88 ; CHECK-NEXT: S_BRANCH %bb.689 ; CHECK-NEXT: {{ $}}90 ; CHECK-NEXT: bb.8:91 ; CHECK-NEXT: SI_RETURN92 bb.0:93 liveins: $vgpr094 95 undef %0.sub1:sreg_64 = IMPLICIT_DEF96 %1:sgpr_512 = IMPLICIT_DEF97 dead undef %2.sub0:vreg_64 = IMPLICIT_DEF98 %3:sgpr_256 = IMPLICIT_DEF99 dead %4:vgpr_32 = IMPLICIT_DEF100 dead undef %5.sub0:vreg_64 = IMPLICIT_DEF101 %6:sgpr_512 = S_LOAD_DWORDX16_IMM %0, 0, 0 :: (invariant load (s512), align 32, addrspace 4)102 undef %7.sub0:sgpr_128 = IMPLICIT_DEF103 %8:sgpr_512 = S_LOAD_DWORDX16_IMM undef %0, 0, 0 :: (invariant load (s512), align 32, addrspace 4)104 $exec = S_MOV_B64_term undef %0105 S_CBRANCH_EXECZ %bb.6, implicit $exec106 S_BRANCH %bb.5107 108 bb.1:109 $exec = S_MOV_B64_term undef %0110 S_CBRANCH_EXECNZ %bb.4, implicit $exec111 112 bb.2:113 dead %9:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef %5, %6.sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7, undef %7, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)114 dead %10:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef %5, %8.sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7, %7, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)115 116 bb.3:117 SI_RETURN118 119 bb.4:120 undef %11.sub0:sgpr_128 = IMPLICIT_DEF121 dead undef %12.sub0:vreg_96 = IMAGE_SAMPLE_LZ_V1_V2 undef %5, %1.sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7, %11, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)122 dead undef %13.sub0:vreg_128 = IMAGE_SAMPLE_LZ_V1_V2 undef %5, undef %6.sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15, %3.sub0_sub1_sub2_sub3, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)123 S_BRANCH %bb.2124 125 bb.5:126 dead %14:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef %2, %1.sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15, undef %7, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)127 S_BRANCH %bb.7128 129 bb.6:130 $exec = S_XOR_B64_term $exec, undef %0, implicit-def $scc131 S_CBRANCH_EXECZ %bb.8, implicit $exec132 S_BRANCH %bb.1133 134 bb.7:135 dead %15:vgpr_32 = IMAGE_SAMPLE_LZ_V1_V2 undef %2, %6.sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15, undef %3.sub4_sub5_sub6_sub7, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)136 undef %7.sub1:sgpr_128 = COPY undef %7.sub0137 S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc138 S_BRANCH %bb.6139 140 bb.8:141 SI_RETURN142 143...144