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1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 < %s | FileCheck %s2 3; CHECK-LABEL: .shader_functions:4 5; Make sure that .vgpr_count doesn't include the %inactive.vgpr registers.6; The shader is free to use any of the VGPRs mapped to a %inactive.vgpr as long as it only touches its active lanes.7; In that case, the VGPR should be included in the .vgpr_count8; CHECK-LABEL: _miss_1:9; CHECK: .vgpr_count: 0xd{{$}}10 11define amdgpu_cs_chain void @_miss_1(ptr inreg %next.callee, i32 inreg %global.table, i32 inreg %max.outgoing.vgpr.count,12 i32 %vcr, { i32 } %system.data,13 i32 %inactive.vgpr, i32 %inactive.vgpr1, i32 %inactive.vgpr2, i32 %inactive.vgpr3,14 i32 %inactive.vgpr4, i32 %inactive.vgpr5, i32 %inactive.vgpr6, i32 %inactive.vgpr7,15 i32 %inactive.vgpr8, i32 %inactive.vgpr9)16 local_unnamed_addr {17entry:18 %system.data.value = extractvalue { i32 } %system.data, 019 %dead.val = call i32 @llvm.amdgcn.dead.i32()20 %is.whole.wave = call i1 @llvm.amdgcn.init.whole.wave()21 br i1 %is.whole.wave, label %shader, label %tail22 23shader:24 %system.data.extract = extractvalue { i32 } %system.data, 025 %data.mul = mul i32 %system.data.extract, 226 %data.add = add i32 %data.mul, 127 call void asm sideeffect "; clobber VGPR for %inactive.vgpr2", "~{v12}"()28 br label %tail29 30tail:31 %final.vcr = phi i32 [ %vcr, %entry ], [ %data.mul, %shader ]32 %final.sys.data = phi i32 [ %system.data.value, %entry ], [ %data.add, %shader ]33 %final.inactive0 = phi i32 [ %inactive.vgpr, %entry ], [ %dead.val, %shader ]34 %final.inactive1 = phi i32 [ %inactive.vgpr1, %entry ], [ %dead.val, %shader ]35 %final.inactive2 = phi i32 [ %inactive.vgpr2, %entry ], [ %dead.val, %shader ]36 %final.inactive3 = phi i32 [ %inactive.vgpr3, %entry ], [ %dead.val, %shader ]37 %final.inactive4 = phi i32 [ %inactive.vgpr4, %entry ], [ %dead.val, %shader ]38 %final.inactive5 = phi i32 [ %inactive.vgpr5, %entry ], [ %dead.val, %shader ]39 %final.inactive6 = phi i32 [ %inactive.vgpr6, %entry ], [ %dead.val, %shader ]40 %final.inactive7 = phi i32 [ %inactive.vgpr7, %entry ], [ %dead.val, %shader ]41 %final.inactive8 = phi i32 [ %inactive.vgpr8, %entry ], [ %dead.val, %shader ]42 %final.inactive9 = phi i32 [ %inactive.vgpr9, %entry ], [ %dead.val, %shader ]43 44 %struct.init = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } poison, i32 %final.vcr, 045 %struct.with.data = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.init, i32 %final.sys.data, 146 %struct.with.inactive0 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.data, i32 %final.inactive0, 247 %struct.with.inactive1 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive0, i32 %final.inactive1, 348 %struct.with.inactive2 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive1, i32 %final.inactive2, 449 %struct.with.inactive3 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive2, i32 %final.inactive3, 550 %struct.with.inactive4 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive3, i32 %final.inactive4, 651 %struct.with.inactive5 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive4, i32 %final.inactive5, 752 %struct.with.inactive6 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive5, i32 %final.inactive6, 853 %struct.with.inactive7 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive6, i32 %final.inactive7, 954 %struct.with.inactive8 = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive7, i32 %final.inactive8, 1055 %final.struct = insertvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.with.inactive8, i32 %final.inactive9, 1156 57 %vec.global = insertelement <4 x i32> poison, i32 %global.table, i64 058 %vec.max.vgpr = insertelement <4 x i32> %vec.global, i32 %max.outgoing.vgpr.count, i64 159 %vec.sys.data = insertelement <4 x i32> %vec.max.vgpr, i32 %final.sys.data, i64 260 %final.vec = insertelement <4 x i32> %vec.sys.data, i32 0, i64 361 62 call void (ptr, i32, <4 x i32>, { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }, i32, ...)63 @llvm.amdgcn.cs.chain.p0.i32.v4i32.sl_i32i32i32i32i32i32i32i32i32i32i32i32s(64 ptr %next.callee, i32 0, <4 x i32> inreg %final.vec,65 { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %final.struct,66 i32 1, i32 %max.outgoing.vgpr.count, i32 -1, ptr @retry_vgpr_alloc.v4i32)67 unreachable68}69 70declare i32 @llvm.amdgcn.dead.i32()71declare i1 @llvm.amdgcn.init.whole.wave()72declare void @llvm.amdgcn.cs.chain.p0.i32.v4i32.sl_i32i32i32i32i32i32i32i32i32i32i32i32s(ptr, i32, <4 x i32>, { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }, i32 immarg, ...)73 74declare amdgpu_cs_chain void @retry_vgpr_alloc.v4i32(<4 x i32> inreg)75