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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX908 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX90A %s4 5; Make sure we only use one 128-bit register instead of 2 for i128 asm6; constraints7 8define amdgpu_kernel void @s_input_output_i128() {9 ; GFX908-LABEL: name: s_input_output_i12810 ; GFX908: bb.0 (%ir-block.0):11 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9764874 /* regdef:SGPR_128 */, def %1312 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %1313 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9764873 /* reguse:SGPR_128 */, [[COPY]]14 ; GFX908-NEXT: S_ENDPGM 015 ;16 ; GFX90A-LABEL: name: s_input_output_i12817 ; GFX90A: bb.0 (%ir-block.0):18 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9764874 /* regdef:SGPR_128 */, def %1119 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %1120 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9764873 /* reguse:SGPR_128 */, [[COPY]]21 ; GFX90A-NEXT: S_ENDPGM 022 %val = tail call i128 asm sideeffect "; def $0", "=s"()23 call void asm sideeffect "; use $0", "s"(i128 %val)24 ret void25}26 27define amdgpu_kernel void @v_input_output_i128() {28 ; GFX908-LABEL: name: v_input_output_i12829 ; GFX908: bb.0 (%ir-block.0):30 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7012362 /* regdef:VReg_128 */, def %1331 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY %1332 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7012361 /* reguse:VReg_128 */, [[COPY]]33 ; GFX908-NEXT: S_ENDPGM 034 ;35 ; GFX90A-LABEL: name: v_input_output_i12836 ; GFX90A: bb.0 (%ir-block.0):37 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7340042 /* regdef:VReg_128_Align2 */, def %1138 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY %1139 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7340041 /* reguse:VReg_128_Align2 */, [[COPY]]40 ; GFX90A-NEXT: S_ENDPGM 041 %val = tail call i128 asm sideeffect "; def $0", "=v"()42 call void asm sideeffect "; use $0", "v"(i128 %val)43 ret void44}45 46define amdgpu_kernel void @a_input_output_i128() {47 48 ; GFX908-LABEL: name: a_input_output_i12849 ; GFX908: bb.0 (%ir-block.0):50 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7929866 /* regdef:AReg_128 */, def %1351 ; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128 = COPY %1352 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7929865 /* reguse:AReg_128 */, [[COPY]]53 ; GFX908-NEXT: S_ENDPGM 054 ;55 ; GFX90A-LABEL: name: a_input_output_i12856 ; GFX90A: bb.0 (%ir-block.0):57 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 8650762 /* regdef:AReg_128_Align2 */, def %1158 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY %1159 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8650761 /* reguse:AReg_128_Align2 */, [[COPY]]60 ; GFX90A-NEXT: S_ENDPGM 061 %val = call i128 asm sideeffect "; def $0", "=a"()62 call void asm sideeffect "; use $0", "a"(i128 %val)63 ret void64}65