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1; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -enable-var-scope -check-prefix=GCN %s2; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s3; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s4 5; GCN-LABEL: {{^}}s_input_output_i16:6; GCN: s_mov_b32 s[[REG:[0-9]+]], -17; GCN: ; use s[[REG]]8define amdgpu_kernel void @s_input_output_i16() #0 {9  %v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"()10  tail call void asm sideeffect "; use $0", "s"(i16 %v) #011  ret void12}13 14; GCN-LABEL: {{^}}v_input_output_i16:15; GCN: v_mov_b32 v[[REG:[0-9]+]], -116; GCN: ; use v[[REG]]17define amdgpu_kernel void @v_input_output_i16() #0 {18  %v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #019  tail call void asm sideeffect "; use $0", "v"(i16 %v)20  ret void21}22 23; GCN-LABEL: {{^}}s_input_output_f16:24; GCN: s_mov_b32 s[[REG:[0-9]+]], -125; GCN: ; use s[[REG]]26define amdgpu_kernel void @s_input_output_f16() #0 {27  %v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #028  tail call void asm sideeffect "; use $0", "s"(half %v)29  ret void30}31 32; GCN-LABEL: {{^}}v_input_output_f16:33; GCN: v_mov_b32 v[[REG:[0-9]+]], -134; GCN: ; use v[[REG]]35define amdgpu_kernel void @v_input_output_f16() #0 {36  %v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #037  tail call void asm sideeffect "; use $0", "v"(half %v)38  ret void39}40 41attributes #0 = { nounwind }42