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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX67,GFX6,GFX67-SDAG,GFX6-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX67,GFX6,GFX67-GISEL,GFX6-GISEL %s4 5; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX67,GFX7,GFX67-SDAG,GFX7-SDAG %s6; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX67,GFX7,GFX67-GISEL,GFX7-GISEL %s7 8; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s9; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s10 11; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG,GFX900-SDAG,GFX900 %s12; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL,GFX900-GISEL,GFX900 %s13 14; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx90a < %s | FileCheck -check-prefixes=GFX9,GFX90A,GFX9-SDAG,GFX90A-SDAG %s15; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx90a < %s | FileCheck -check-prefixes=GFX9,GFX90A,GFX9-GISEL,GFX90A-GISEL %s16 17; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s18; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s19 20; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s21; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s22; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s23; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s24 25; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1200,GFX1200-SDAG,GFX1200-SDAG-TRUE16 %s26; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1200,GFX1200-SDAG,GFX1200-SDAG-FAKE16 %s27; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1200,GFX1200-GISEL,GFX1200-GISEL-TRUE16 %s28; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1200,GFX1200-GISEL,GFX1200-GISEL-FAKE16 %s29 30; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s31; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s32 33; Test for integer mad formation for patterns used in clpeak34 35define i32 @clpeak_imad_pat_i32(i32 %x, i32 %y) {36; GFX67-SDAG-LABEL: clpeak_imad_pat_i32:37; GFX67-SDAG:       ; %bb.0: ; %entry38; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v040; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v141; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v042; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v143; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v244; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v045; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v046; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v147; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]48;49; GFX67-GISEL-LABEL: clpeak_imad_pat_i32:50; GFX67-GISEL:       ; %bb.0: ; %entry51; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)52; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v053; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v154; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v055; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v156; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v257; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v158; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v059; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v060; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]61;62; GFX8-SDAG-LABEL: clpeak_imad_pat_i32:63; GFX8-SDAG:       ; %bb.0: ; %entry64; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)65; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v066; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v167; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v2, v068; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v169; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v270; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v071; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v072; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v173; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]74;75; GFX8-GISEL-LABEL: clpeak_imad_pat_i32:76; GFX8-GISEL:       ; %bb.0: ; %entry77; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)78; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v079; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v180; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v2, v081; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v182; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v283; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v184; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v085; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v086; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]87;88; GFX900-SDAG-LABEL: clpeak_imad_pat_i32:89; GFX900-SDAG:       ; %bb.0: ; %entry90; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)91; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v092; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v193; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v094; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v195; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v0, v2, v[0:1]96; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v1, v0, v[1:2]97; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]98;99; GFX900-GISEL-LABEL: clpeak_imad_pat_i32:100; GFX900-GISEL:       ; %bb.0: ; %entry101; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)102; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v0103; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1104; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v0105; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1106; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v2107; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v1108; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v0109; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v0110; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]111;112; GFX90A-SDAG-LABEL: clpeak_imad_pat_i32:113; GFX90A-SDAG:       ; %bb.0: ; %entry114; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v0116; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v1117; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v0118; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v1119; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v2, v[0:1]120; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v0, v[2:3]121; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]122;123; GFX90A-GISEL-LABEL: clpeak_imad_pat_i32:124; GFX90A-GISEL:       ; %bb.0: ; %entry125; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)126; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v0127; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1128; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v2, v0129; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1130; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v2131; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v0132; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1133; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v2134; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]135;136; GFX10-SDAG-LABEL: clpeak_imad_pat_i32:137; GFX10-SDAG:       ; %bb.0: ; %entry138; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v0140; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v1141; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v0142; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v1143; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v0, v2, v[0:1]144; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v1, v0, v[1:2]145; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]146;147; GFX10-GISEL-LABEL: clpeak_imad_pat_i32:148; GFX10-GISEL:       ; %bb.0: ; %entry149; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)150; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0151; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1152; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v0153; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1154; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v2155; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v1156; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0157; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v0158; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]159;160; GFX11-SDAG-LABEL: clpeak_imad_pat_i32:161; GFX11-SDAG:       ; %bb.0: ; %entry162; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v0164; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)165; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v1166; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v5, v0167; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)168; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v1169; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v2, v5, v[2:3]170; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)171; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v2, v[3:4]172; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]173;174; GFX11-GISEL-LABEL: clpeak_imad_pat_i32:175; GFX11-GISEL:       ; %bb.0: ; %entry176; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0178; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)179; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1180; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v0181; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)182; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1183; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v2184; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v1185; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0186; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)187; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v0188; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]189;190; GFX1200-SDAG-LABEL: clpeak_imad_pat_i32:191; GFX1200-SDAG:       ; %bb.0: ; %entry192; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0193; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x0194; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x0195; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x0196; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x0197; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v0198; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)199; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v1200; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v0201; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)202; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v1203; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v0, v2, v[0:1]204; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)205; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v1, v0, v[1:2]206; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]207;208; GFX1200-GISEL-LABEL: clpeak_imad_pat_i32:209; GFX1200-GISEL:       ; %bb.0: ; %entry210; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0211; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x0212; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x0213; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x0214; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x0215; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0216; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)217; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1218; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v0219; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)220; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1221; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v2222; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v1223; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0224; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)225; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v0226; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]227;228; GFX1250-SDAG-LABEL: clpeak_imad_pat_i32:229; GFX1250-SDAG:       ; %bb.0: ; %entry230; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0231; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0232; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v0233; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)234; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v1235; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v0236; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)237; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v1238; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v0, v2, v0239; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)240; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v1, v0, v1241; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]242;243; GFX1250-GISEL-LABEL: clpeak_imad_pat_i32:244; GFX1250-GISEL:       ; %bb.0: ; %entry245; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0246; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x0247; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0248; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)249; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v1250; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v0251; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)252; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v1253; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v2254; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v1255; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v0256; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)257; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v0258; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]259entry:260  %y18 = add i32 %x, 1261  %add = mul i32 %y18, %y262  %mul119 = add i32 %add, %y18263  %add2 = mul i32 %mul119, %y264  %add220 = add i32 %add, 1265  %add422 = add i32 %add2, 1266  %mul521 = mul i32 %add2, %add220267  %add6 = mul i32 %mul521, %add422268  ret i32 %add6269}270 271define signext i16 @clpeak_imad_pat_i16(i16 signext %x, i16 signext %y) {272; GFX67-LABEL: clpeak_imad_pat_i16:273; GFX67:       ; %bb.0: ; %entry274; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)275; GFX67-NEXT:    v_add_i32_e32 v0, vcc, 1, v0276; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v0277; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v1278; GFX67-NEXT:    v_mul_u32_u24_e32 v3, v0, v2279; GFX67-NEXT:    v_add_i32_e32 v1, vcc, 1, v1280; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v1281; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v3282; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v1, v3283; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v2, 1284; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v0285; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v4286; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v2287; GFX67-NEXT:    v_mad_u32_u24 v1, v1, v3, 1288; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v0289; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v1290; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v1291; GFX67-NEXT:    v_bfe_i32 v0, v0, 0, 16292; GFX67-NEXT:    s_setpc_b64 s[30:31]293;294; GFX8-SDAG-LABEL: clpeak_imad_pat_i16:295; GFX8-SDAG:       ; %bb.0: ; %entry296; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)297; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1298; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v0299; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1300; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v0301; GFX8-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 16302; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]303;304; GFX8-GISEL-LABEL: clpeak_imad_pat_i16:305; GFX8-GISEL:       ; %bb.0: ; %entry306; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)307; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v0308; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v1309; GFX8-GISEL-NEXT:    v_add_u16_e32 v3, 1, v1310; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v2311; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 1312; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v4313; GFX8-GISEL-NEXT:    v_mad_u16 v1, v3, v2, 1314; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v1315; GFX8-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 16316; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]317;318; GFX9-SDAG-LABEL: clpeak_imad_pat_i16:319; GFX9-SDAG:       ; %bb.0: ; %entry320; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)321; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v1322; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v0323; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v1324; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v0325; GFX9-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 16326; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]327;328; GFX9-GISEL-LABEL: clpeak_imad_pat_i16:329; GFX9-GISEL:       ; %bb.0: ; %entry330; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)331; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v0332; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v1333; GFX9-GISEL-NEXT:    v_add_u16_e32 v3, 1, v1334; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v2335; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, 1336; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v4337; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v3, v2, 1338; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v1339; GFX9-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 16340; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]341;342; GFX10-SDAG-LABEL: clpeak_imad_pat_i16:343; GFX10-SDAG:       ; %bb.0: ; %entry344; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)345; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1346; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v0347; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1348; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v0349; GFX10-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 16350; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]351;352; GFX10-GISEL-LABEL: clpeak_imad_pat_i16:353; GFX10-GISEL:       ; %bb.0: ; %entry354; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)355; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 1356; GFX10-GISEL-NEXT:    v_add_nc_u16 v2, v1, 1357; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v1358; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 1359; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v3360; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v1361; GFX10-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 1362; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v1363; GFX10-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 16364; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]365;366; GFX11-SDAG-TRUE16-LABEL: clpeak_imad_pat_i16:367; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry368; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)369; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l370; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)371; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l372; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h373; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)374; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l375; GFX11-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 16376; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]377;378; GFX11-SDAG-FAKE16-LABEL: clpeak_imad_pat_i16:379; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry380; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)381; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v1382; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)383; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v0384; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v1385; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)386; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v0387; GFX11-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 16388; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]389;390; GFX11-GISEL-TRUE16-LABEL: clpeak_imad_pat_i16:391; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry392; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)393; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 1394; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 1395; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)396; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l397; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 1398; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h399; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 1400; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)401; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l402; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h403; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)404; GFX11-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 16405; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]406;407; GFX11-GISEL-FAKE16-LABEL: clpeak_imad_pat_i16:408; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry409; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)410; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 1411; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 1412; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)413; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v1414; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 1415; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v3416; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)417; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v1418; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 1419; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v1420; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)421; GFX11-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 16422; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]423;424; GFX1200-SDAG-TRUE16-LABEL: clpeak_imad_pat_i16:425; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry426; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0427; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0428; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0429; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0430; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0431; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l432; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)433; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l434; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h435; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)436; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l437; GFX1200-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 16438; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]439;440; GFX1200-SDAG-FAKE16-LABEL: clpeak_imad_pat_i16:441; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry442; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0443; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0444; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0445; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0446; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0447; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v1448; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)449; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v0450; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v1451; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)452; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v0453; GFX1200-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 16454; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]455;456; GFX1200-GISEL-TRUE16-LABEL: clpeak_imad_pat_i16:457; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry458; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0459; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0460; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0461; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0462; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0463; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 1464; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 1465; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)466; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l467; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 1468; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h469; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 1470; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)471; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l472; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h473; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)474; GFX1200-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 16475; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]476;477; GFX1200-GISEL-FAKE16-LABEL: clpeak_imad_pat_i16:478; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry479; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0480; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0481; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0482; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0483; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0484; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 1485; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 1486; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)487; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v1488; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 1489; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v3490; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)491; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v1492; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 1493; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v1494; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)495; GFX1200-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 16496; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]497;498; GFX1250-SDAG-LABEL: clpeak_imad_pat_i16:499; GFX1250-SDAG:       ; %bb.0: ; %entry500; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0501; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0502; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1503; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)504; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v0505; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v1506; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)507; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v0508; GFX1250-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 16509; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]510;511; GFX1250-GISEL-LABEL: clpeak_imad_pat_i16:512; GFX1250-GISEL:       ; %bb.0: ; %entry513; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0514; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x0515; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 1516; GFX1250-GISEL-NEXT:    v_add_nc_u16 v2, v1, 1517; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)518; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v1519; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 1520; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v3521; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)522; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v1523; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 1524; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v1525; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)526; GFX1250-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 16527; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]528entry:529  %conv33 = add i16 %x, 1530  %add = mul i16 %conv33, %y531  %conv434 = add i16 %y, 1532  %add8 = mul i16 %conv434, %add533  %conv1035 = add i16 %add, 1534  %add14 = mul i16 %conv1035, %add8535  %conv1636 = add i16 %add8, 1536  %add20 = mul i16 %add14, %conv1636537  ret i16 %add20538}539 540define <2 x i16> @clpeak_imad_pat_v2i16(<2 x i16> %x, <2 x i16> %y) {541; GFX67-SDAG-LABEL: clpeak_imad_pat_v2i16:542; GFX67-SDAG:       ; %bb.0: ; %entry543; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)544; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v0545; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v0546; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v1547; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v2548; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v1549; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v3550; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v4, v2, v0551; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0552; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v5, v3, v1553; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v1554; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v6, v0, v2555; GFX67-SDAG-NEXT:    v_mad_u32_u24 v4, v4, v2, 1556; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v7, v1, v3557; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v4558; GFX67-SDAG-NEXT:    v_mad_u32_u24 v5, v5, v3, 1559; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v3, 1560; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v6561; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, 1562; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v5563; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v4564; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v7565; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v2566; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0567; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v1568; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v3569; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v2570; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v3, v0571; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v2, v1572; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]573;574; GFX67-GISEL-LABEL: clpeak_imad_pat_v2i16:575; GFX67-GISEL:       ; %bb.0: ; %entry576; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)577; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v1578; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v0579; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v1580; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v0581; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v5582; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v5583; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4584; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v3585; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v4586; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v2587; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v5, v3, v1588; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v4, v2, v0589; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v1590; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0591; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v1592; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v1593; GFX67-GISEL-NEXT:    v_mad_u32_u24 v5, v5, v3, 1594; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v0595; GFX67-GISEL-NEXT:    v_mad_u32_u24 v4, v4, v2, 1596; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v5597; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0598; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v1, v3599; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v4600; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v5601; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, 1602; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v6, v0, v2603; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v5604; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, 1605; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v1606; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0607; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v1608; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v6609; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v4610; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v1611; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v4612; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v3613; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v7614; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v1615; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0616; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v2617; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0618; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v1619; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v2, v0620; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v3621; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]622;623; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i16:624; GFX8-SDAG:       ; %bb.0: ; %entry625; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)626; GFX8-SDAG-NEXT:    v_mov_b32_e32 v3, 1627; GFX8-SDAG-NEXT:    v_add_u16_e32 v2, 1, v0628; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD629; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v1630; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v0, v3631; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v3, v0632; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v2, v1633; GFX8-SDAG-NEXT:    v_mad_u16 v2, v2, v1, v2634; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v3635; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v2, v1636; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v4, v0637; GFX8-SDAG-NEXT:    v_mad_u16 v3, v1, v5, v1638; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v2639; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v0640; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v3641; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v1, v0642; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]643;644; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i16:645; GFX8-GISEL:       ; %bb.0: ; %entry646; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GFX8-GISEL-NEXT:    v_mov_b32_e32 v3, 1648; GFX8-GISEL-NEXT:    v_add_u16_e32 v2, 1, v0649; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD650; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1651; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v2652; GFX8-GISEL-NEXT:    v_mad_u16 v5, v0, v3, v0653; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v1654; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v3655; GFX8-GISEL-NEXT:    v_mad_u16 v2, v2, v1, 1656; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 1657; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v1, 1658; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 1659; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v6, v2660; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v7, v0661; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v2, v1662; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD663; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0664; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]665;666; GFX9-LABEL: clpeak_imad_pat_v2i16:667; GFX9:       ; %bb.0: ; %entry668; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX9-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]670; GFX9-NEXT:    v_pk_mad_u16 v2, v0, v1, v0671; GFX9-NEXT:    v_pk_mul_lo_u16 v3, v2, v1672; GFX9-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]673; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]674; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v3, v0675; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v0, v1676; GFX9-NEXT:    s_setpc_b64 s[30:31]677;678; GFX10-LABEL: clpeak_imad_pat_v2i16:679; GFX10:       ; %bb.0: ; %entry680; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)681; GFX10-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]682; GFX10-NEXT:    v_pk_mad_u16 v2, v0, v1, v0683; GFX10-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]684; GFX10-NEXT:    v_pk_mul_lo_u16 v3, v2, v1685; GFX10-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]686; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v3, v0687; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v0, v1688; GFX10-NEXT:    s_setpc_b64 s[30:31]689;690; GFX11-LABEL: clpeak_imad_pat_v2i16:691; GFX11:       ; %bb.0: ; %entry692; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)693; GFX11-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]694; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)695; GFX11-NEXT:    v_pk_mad_u16 v2, v0, v1, v0696; GFX11-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]697; GFX11-NEXT:    v_pk_mul_lo_u16 v3, v2, v1698; GFX11-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]699; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)700; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v3, v0701; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v0, v1702; GFX11-NEXT:    s_setpc_b64 s[30:31]703;704; GFX1200-LABEL: clpeak_imad_pat_v2i16:705; GFX1200:       ; %bb.0: ; %entry706; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x0707; GFX1200-NEXT:    s_wait_expcnt 0x0708; GFX1200-NEXT:    s_wait_samplecnt 0x0709; GFX1200-NEXT:    s_wait_bvhcnt 0x0710; GFX1200-NEXT:    s_wait_kmcnt 0x0711; GFX1200-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]712; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)713; GFX1200-NEXT:    v_pk_mad_u16 v2, v0, v1, v0714; GFX1200-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]715; GFX1200-NEXT:    v_pk_mul_lo_u16 v3, v2, v1716; GFX1200-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]717; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)718; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v3, v0719; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v0, v1720; GFX1200-NEXT:    s_setpc_b64 s[30:31]721;722; GFX1250-LABEL: clpeak_imad_pat_v2i16:723; GFX1250:       ; %bb.0: ; %entry724; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0725; GFX1250-NEXT:    s_wait_kmcnt 0x0726; GFX1250-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]727; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)728; GFX1250-NEXT:    v_pk_mad_u16 v2, v0, v1, v0729; GFX1250-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]730; GFX1250-NEXT:    v_pk_mul_lo_u16 v3, v2, v1731; GFX1250-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]732; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)733; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v3, v0734; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v0, v1735; GFX1250-NEXT:    s_set_pc_i64 s[30:31]736entry:737  %y18 = add <2 x i16> %x, <i16 1, i16 1>738  %add = mul <2 x i16> %y18, %y739  %mul119 = add <2 x i16> %add, %y18740  %add2 = mul <2 x i16> %mul119, %y741  %add220 = add <2 x i16> %add, <i16 1, i16 1>742  %add422 = add <2 x i16> %add2, <i16 1, i16 1>743  %mul521 = mul <2 x i16> %add2, %add220744  %add6 = mul <2 x i16> %mul521, %add422745  ret <2 x i16> %add6746}747 748define <3 x i16> @clpeak_imad_pat_v3i16(<3 x i16> %x, <3 x i16> %y) {749; GFX67-SDAG-LABEL: clpeak_imad_pat_v3i16:750; GFX67-SDAG:       ; %bb.0: ; %entry751; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)752; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v0753; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v1754; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v0755; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v1756; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v3757; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v4758; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v2759; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v9, v8, v4760; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v6, v3, v0761; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v8, v4, v1762; GFX67-SDAG-NEXT:    v_mad_u32_u24 v6, v6, v3, 1763; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v2764; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v5765; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0766; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v1767; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v6768; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v9769; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v7, v5, v2770; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v8, v0, v3771; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v4772; GFX67-SDAG-NEXT:    v_or_b32_e32 v6, v9, v6773; GFX67-SDAG-NEXT:    s_mov_b32 s4, 0x10000774; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v3, 1775; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v2776; GFX67-SDAG-NEXT:    v_add_i32_e32 v6, vcc, s4, v6777; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0778; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v3, 16, v1779; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v4, v2, v5780; GFX67-SDAG-NEXT:    v_mad_u32_u24 v7, v7, v5, 1781; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v3, v0782; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v6783; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v1784; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v7785; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v2, v5, 1786; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v8787; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v6788; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v3789; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v4790; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, s4, v0791; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v5, v5, v6792; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v7793; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v2794; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v0795; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v5796; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0797; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v1798; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v3799; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v5, v0800; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v4801; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v3, v2802; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]803;804; GFX67-GISEL-LABEL: clpeak_imad_pat_v3i16:805; GFX67-GISEL:       ; %bb.0: ; %entry806; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)807; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v0808; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v1809; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v0810; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v3811; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v2812; GFX67-GISEL-NEXT:    v_and_b32_e32 v7, 0xffff, v1813; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v4814; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v6, v3, v0815; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v2816; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v5817; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v7, v4, v1818; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0819; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v8, v5, v2820; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v9, v0, v3821; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v1822; GFX67-GISEL-NEXT:    v_mad_u32_u24 v6, v6, v3, 1823; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v10, v1, v4824; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v2825; GFX67-GISEL-NEXT:    v_mad_u32_u24 v7, v7, v4, 1826; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v3, 1827; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v4, 1828; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v9829; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v6830; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v11, v2, v5831; GFX67-GISEL-NEXT:    v_mad_u32_u24 v8, v8, v5, 1832; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v2, v5, 1833; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v4834; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v10835; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v7836; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v4, v5837; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v11838; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v8839; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v3840; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0841; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v5, v5, v6842; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v3, v0843; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v4844; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v1845; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v1846; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v5847; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v2848; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v3, v2849; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]850;851; GFX8-SDAG-LABEL: clpeak_imad_pat_v3i16:852; GFX8-SDAG:       ; %bb.0: ; %entry853; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)854; GFX8-SDAG-NEXT:    v_mov_b32_e32 v5, 1855; GFX8-SDAG-NEXT:    v_add_u16_e32 v4, 1, v0856; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD857; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v2858; GFX8-SDAG-NEXT:    v_add_u16_e32 v1, 1, v1859; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v6, v0, v5860; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v5, v0861; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v7, v1, v3862; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v8, v4, v2863; GFX8-SDAG-NEXT:    v_mad_u16 v4, v4, v2, v4864; GFX8-SDAG-NEXT:    v_mad_u16 v1, v1, v3, v1865; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v5866; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v3867; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v4, v2868; GFX8-SDAG-NEXT:    v_mad_u16 v3, v0, v6, v0869; GFX8-SDAG-NEXT:    v_mad_u16 v4, v2, v8, v2870; GFX8-SDAG-NEXT:    v_mad_u16 v0, v3, v0, v3871; GFX8-SDAG-NEXT:    v_mad_u16 v5, v1, v7, v1872; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v0873; GFX8-SDAG-NEXT:    v_mad_u16 v2, v4, v2, v4874; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, v5875; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v2, v0876; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]877;878; GFX8-GISEL-LABEL: clpeak_imad_pat_v3i16:879; GFX8-GISEL:       ; %bb.0: ; %entry880; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)881; GFX8-GISEL-NEXT:    v_mov_b32_e32 v6, 1882; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v4, 16, v2883; GFX8-GISEL-NEXT:    v_add_u16_e32 v5, 1, v0884; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD885; GFX8-GISEL-NEXT:    v_add_u16_e32 v1, 1, v1886; GFX8-GISEL-NEXT:    v_mad_u16 v6, v5, v2, v5887; GFX8-GISEL-NEXT:    v_mad_u16 v7, v0, v4, v0888; GFX8-GISEL-NEXT:    v_mad_u16 v8, v1, v3, v1889; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v9, v6, v2890; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v10, v7, v4891; GFX8-GISEL-NEXT:    v_mad_u16 v5, v5, v2, 1892; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v4, 1893; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v11, v8, v3894; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v3, 1895; GFX8-GISEL-NEXT:    v_mad_u16 v2, v6, v2, 1896; GFX8-GISEL-NEXT:    v_mad_u16 v4, v7, v4, 1897; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v5, v9, v5898; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v10, v0899; GFX8-GISEL-NEXT:    v_mad_u16 v3, v8, v3, 1900; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v11, v1901; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v5, v2902; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD903; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v2, v0904; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v3905; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]906;907; GFX9-SDAG-LABEL: clpeak_imad_pat_v3i16:908; GFX9-SDAG:       ; %bb.0: ; %entry909; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)910; GFX9-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]911; GFX9-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1912; GFX9-SDAG-NEXT:    v_pk_mad_u16 v4, v1, v3, v1913; GFX9-SDAG-NEXT:    v_pk_mad_u16 v5, v0, v2, v0914; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v5, v2915; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v4, v3916; GFX9-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]917; GFX9-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1918; GFX9-SDAG-NEXT:    v_pk_mad_u16 v3, v4, v3, 1919; GFX9-SDAG-NEXT:    v_pk_mad_u16 v2, v5, v2, 1 op_sel_hi:[1,1,0]920; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v1921; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v0922; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v2923; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v3924; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]925;926; GFX9-GISEL-LABEL: clpeak_imad_pat_v3i16:927; GFX9-GISEL:       ; %bb.0: ; %entry928; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)929; GFX9-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]930; GFX9-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1931; GFX9-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v0932; GFX9-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v1933; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v2934; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v3935; GFX9-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]936; GFX9-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1937; GFX9-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]938; GFX9-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1939; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v0940; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v1941; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v2942; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v3943; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]944;945; GFX10-SDAG-LABEL: clpeak_imad_pat_v3i16:946; GFX10-SDAG:       ; %bb.0: ; %entry947; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)948; GFX10-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]949; GFX10-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1950; GFX10-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v0951; GFX10-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v1952; GFX10-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]953; GFX10-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1954; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v2955; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v3956; GFX10-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1957; GFX10-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]958; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v0959; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v1960; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v2961; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v3962; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]963;964; GFX10-GISEL-LABEL: clpeak_imad_pat_v3i16:965; GFX10-GISEL:       ; %bb.0: ; %entry966; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)967; GFX10-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]968; GFX10-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1969; GFX10-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v0970; GFX10-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v1971; GFX10-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]972; GFX10-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1973; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v2974; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v3975; GFX10-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]976; GFX10-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1977; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v0978; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v1979; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v2980; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v3981; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]982;983; GFX11-SDAG-LABEL: clpeak_imad_pat_v3i16:984; GFX11-SDAG:       ; %bb.0: ; %entry985; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)986; GFX11-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]987; GFX11-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1988; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)989; GFX11-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v0990; GFX11-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v1991; GFX11-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]992; GFX11-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1993; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)994; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v2995; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v3996; GFX11-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1997; GFX11-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]998; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)999; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01000; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11001; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1002; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21003; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31004; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]1005;1006; GFX11-GISEL-LABEL: clpeak_imad_pat_v3i16:1007; GFX11-GISEL:       ; %bb.0: ; %entry1008; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1009; GFX11-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1010; GFX11-GISEL-NEXT:    v_pk_add_u16 v1, v1, 11011; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1012; GFX11-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01013; GFX11-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11014; GFX11-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1015; GFX11-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 11016; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1017; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21018; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31019; GFX11-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1020; GFX11-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 11021; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1022; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01023; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11024; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1025; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21026; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31027; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]1028;1029; GFX1200-SDAG-LABEL: clpeak_imad_pat_v3i16:1030; GFX1200-SDAG:       ; %bb.0: ; %entry1031; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x01032; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x01033; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x01034; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x01035; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x01036; GFX1200-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1037; GFX1200-SDAG-NEXT:    v_pk_add_u16 v1, v1, 11038; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1039; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01040; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11041; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1042; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 11043; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1044; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21045; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31046; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 11047; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1048; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1049; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01050; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11051; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1052; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21053; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31054; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]1055;1056; GFX1200-GISEL-LABEL: clpeak_imad_pat_v3i16:1057; GFX1200-GISEL:       ; %bb.0: ; %entry1058; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x01059; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x01060; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x01061; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x01062; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x01063; GFX1200-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1064; GFX1200-GISEL-NEXT:    v_pk_add_u16 v1, v1, 11065; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1066; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01067; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11068; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1069; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 11070; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1071; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21072; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31073; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1074; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 11075; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1076; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01077; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11078; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1079; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21080; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31081; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]1082;1083; GFX1250-SDAG-LABEL: clpeak_imad_pat_v3i16:1084; GFX1250-SDAG:       ; %bb.0: ; %entry1085; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x01086; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x01087; GFX1250-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1088; GFX1250-SDAG-NEXT:    v_pk_add_u16 v1, v1, 11089; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1090; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01091; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11092; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1093; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 11094; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1095; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21096; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31097; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 11098; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1099; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1100; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01101; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11102; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1103; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21104; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31105; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]1106;1107; GFX1250-GISEL-LABEL: clpeak_imad_pat_v3i16:1108; GFX1250-GISEL:       ; %bb.0: ; %entry1109; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x01110; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x01111; GFX1250-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1112; GFX1250-GISEL-NEXT:    v_pk_add_u16 v1, v1, 11113; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1114; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01115; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11116; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1117; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 11118; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1119; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21120; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31121; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1122; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 11123; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1124; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01125; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11126; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1127; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21128; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31129; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]1130entry:1131  %y48 = add <3 x i16> %x, <i16 1, i16 1, i16 1>1132  %add = mul <3 x i16> %y48, %y1133  %mul1249 = add <3 x i16> %add, %y481134  %add15 = mul <3 x i16> %mul1249, %y1135  %add1550 = add <3 x i16> %add, <i16 1, i16 1, i16 1>1136  %add2452 = add <3 x i16> %add15, <i16 1, i16 1, i16 1>1137  %mul3051 = mul <3 x i16> %add15, %add15501138  %add33 = mul <3 x i16> %mul3051, %add24521139  ret <3 x i16> %add331140}1141 1142define <4 x i16> @clpeak_imad_pat_v4i16(<4 x i16> %x, <4 x i16> %y) {1143; GFX67-SDAG-LABEL: clpeak_imad_pat_v4i16:1144; GFX67-SDAG:       ; %bb.0: ; %entry1145; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1146; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, 1, v31147; GFX67-SDAG-NEXT:    v_and_b32_e32 v11, 0xffff, v31148; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v71149; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v21150; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v11, v7, v31151; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v01152; GFX67-SDAG-NEXT:    v_and_b32_e32 v9, 0xffff, v21153; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v11154; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v61155; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v31156; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v01157; GFX67-SDAG-NEXT:    v_and_b32_e32 v10, 0xffff, v11158; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v41159; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v51160; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v13, v11, v71161; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v71162; GFX67-SDAG-NEXT:    v_mad_u32_u24 v7, v9, v6, 11163; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v12, v10, v51164; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v9, v6, v21165; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v8, v4, v01166; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v10, v5, v11167; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v71168; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v131169; GFX67-SDAG-NEXT:    v_mad_u32_u24 v8, v8, v4, 11170; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01171; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v11172; GFX67-SDAG-NEXT:    v_or_b32_e32 v7, v9, v71173; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v81174; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v121175; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v21176; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v10, v0, v41177; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v51178; GFX67-SDAG-NEXT:    s_mov_b32 s4, 0x100001179; GFX67-SDAG-NEXT:    v_or_b32_e32 v8, v9, v81180; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v4, 11181; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v5, v2, v61182; GFX67-SDAG-NEXT:    v_add_i32_e32 v8, vcc, s4, v81183; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v2, v6, 11184; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01185; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v4, 16, v11186; GFX67-SDAG-NEXT:    v_add_i32_e32 v7, vcc, s4, v71187; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v21188; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v6, 16, v31189; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v4, v01190; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v81191; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v11192; GFX67-SDAG-NEXT:    v_or_b32_e32 v2, v6, v21193; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v71194; GFX67-SDAG-NEXT:    v_and_b32_e32 v9, 0xffff, v101195; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v81196; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v41197; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v51198; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v71199; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v31200; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, s4, v21201; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, s4, v01202; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v8, v9, v81203; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v4, v4, v51204; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v61205; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v01206; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v21207; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v81208; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01209; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v11210; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v41211; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v21212; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v31213; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v7, v01214; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v51215; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v21216; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v61217; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]1218;1219; GFX67-GISEL-LABEL: clpeak_imad_pat_v4i16:1220; GFX67-GISEL:       ; %bb.0: ; %entry1221; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1222; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v11223; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v01224; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v31225; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v11226; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v21227; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v01228; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v9, 16, v91229; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v31230; GFX67-GISEL-NEXT:    v_or_b32_e32 v8, v8, v91231; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v21232; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v101233; GFX67-GISEL-NEXT:    v_or_b32_e32 v9, v9, v101234; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v10, 16, v81235; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v51236; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v81237; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v41238; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v10, v5, v11239; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v11, 16, v91240; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v91241; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v61242; GFX67-GISEL-NEXT:    v_and_b32_e32 v7, 0xffff, v71243; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v8, v4, v01244; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11245; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v9, v6, v21246; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v11, v7, v31247; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01248; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v11249; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v11250; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v21251; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v31252; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v21253; GFX67-GISEL-NEXT:    v_or_b32_e32 v1, v1, v21254; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v2, 16, v01255; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01256; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v13, v2, v51257; GFX67-GISEL-NEXT:    v_mad_u32_u24 v10, v10, v5, 11258; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v2, v5, 11259; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v11260; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v12, v0, v41261; GFX67-GISEL-NEXT:    v_mad_u32_u24 v8, v8, v4, 11262; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v101263; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v4, 11264; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v21265; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11266; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v15, v3, v71267; GFX67-GISEL-NEXT:    v_mad_u32_u24 v11, v11, v7, 11268; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v81269; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v101270; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v3, v7, 11271; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01272; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v21273; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v14, v1, v61274; GFX67-GISEL-NEXT:    v_mad_u32_u24 v9, v9, v6, 11275; GFX67-GISEL-NEXT:    v_or_b32_e32 v8, v8, v101276; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v111277; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v6, 11278; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v21279; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v31280; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v91281; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v101282; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11283; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v21284; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v121285; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v81286; GFX67-GISEL-NEXT:    v_or_b32_e32 v9, v9, v101287; GFX67-GISEL-NEXT:    v_or_b32_e32 v2, v1, v21288; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v81289; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v4, v51290; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v131291; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v5, v11292; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v141293; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v91294; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v91295; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v5, v5, v61296; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v151297; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v6, v31298; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v6, 16, v01299; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v41300; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01301; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v21302; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v4, v01303; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11304; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v51305; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v21306; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v31307; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v61308; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v4, v21309; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v71310; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]1311;1312; GFX8-SDAG-LABEL: clpeak_imad_pat_v4i16:1313; GFX8-SDAG:       ; %bb.0: ; %entry1314; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1315; GFX8-SDAG-NEXT:    v_mov_b32_e32 v6, 11316; GFX8-SDAG-NEXT:    v_add_u16_e32 v5, 1, v01317; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1318; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v8, 16, v21319; GFX8-SDAG-NEXT:    v_add_u16_e32 v4, 1, v11320; GFX8-SDAG-NEXT:    v_add_u16_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1321; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v31322; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v9, v0, v81323; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v8, v01324; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v7, v1, v61325; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v10, v5, v21326; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v11, v4, v31327; GFX8-SDAG-NEXT:    v_mad_u16 v1, v1, v6, v11328; GFX8-SDAG-NEXT:    v_mad_u16 v4, v4, v3, v41329; GFX8-SDAG-NEXT:    v_mad_u16 v5, v5, v2, v51330; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v81331; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v61332; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v5, v21333; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v3, v4, v31334; GFX8-SDAG-NEXT:    v_mad_u16 v4, v0, v9, v01335; GFX8-SDAG-NEXT:    v_mad_u16 v5, v1, v7, v11336; GFX8-SDAG-NEXT:    v_mad_u16 v7, v2, v10, v21337; GFX8-SDAG-NEXT:    v_mad_u16 v0, v4, v0, v41338; GFX8-SDAG-NEXT:    v_mad_u16 v6, v3, v11, v31339; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, v51340; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v01341; GFX8-SDAG-NEXT:    v_mad_u16 v2, v7, v2, v71342; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v2, v01343; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v11344; GFX8-SDAG-NEXT:    v_mad_u16 v2, v6, v3, v61345; GFX8-SDAG-NEXT:    v_or_b32_e32 v1, v2, v11346; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]1347;1348; GFX8-GISEL-LABEL: clpeak_imad_pat_v4i16:1349; GFX8-GISEL:       ; %bb.0: ; %entry1350; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1351; GFX8-GISEL-NEXT:    v_mov_b32_e32 v5, 11352; GFX8-GISEL-NEXT:    v_add_u16_e32 v4, 1, v01353; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1354; GFX8-GISEL-NEXT:    v_add_u16_e32 v6, 1, v11355; GFX8-GISEL-NEXT:    v_add_u16_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1356; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v21357; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v31358; GFX8-GISEL-NEXT:    v_mad_u16 v8, v4, v2, v41359; GFX8-GISEL-NEXT:    v_mad_u16 v9, v0, v5, v01360; GFX8-GISEL-NEXT:    v_mad_u16 v10, v6, v3, v61361; GFX8-GISEL-NEXT:    v_mad_u16 v11, v1, v7, v11362; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v12, v8, v21363; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v13, v9, v51364; GFX8-GISEL-NEXT:    v_mad_u16 v4, v4, v2, 11365; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v5, 11366; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v14, v10, v31367; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v15, v11, v71368; GFX8-GISEL-NEXT:    v_mad_u16 v6, v6, v3, 11369; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v7, 11370; GFX8-GISEL-NEXT:    v_mad_u16 v2, v8, v2, 11371; GFX8-GISEL-NEXT:    v_mad_u16 v5, v9, v5, 11372; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v12, v41373; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v13, v01374; GFX8-GISEL-NEXT:    v_mad_u16 v3, v10, v3, 11375; GFX8-GISEL-NEXT:    v_mad_u16 v7, v11, v7, 11376; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v14, v61377; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v15, v11378; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v4, v21379; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1380; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v2, v01381; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v6, v31382; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1383; GFX8-GISEL-NEXT:    v_or_b32_e32 v1, v2, v11384; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]1385;1386; GFX9-SDAG-LABEL: clpeak_imad_pat_v4i16:1387; GFX9-SDAG:       ; %bb.0: ; %entry1388; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1389; GFX9-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1390; GFX9-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1391; GFX9-SDAG-NEXT:    v_pk_mad_u16 v4, v1, v3, v11392; GFX9-SDAG-NEXT:    v_pk_mad_u16 v5, v0, v2, v01393; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v5, v21394; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v4, v31395; GFX9-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1396; GFX9-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1397; GFX9-SDAG-NEXT:    v_pk_mad_u16 v3, v4, v3, 1 op_sel_hi:[1,1,0]1398; GFX9-SDAG-NEXT:    v_pk_mad_u16 v2, v5, v2, 1 op_sel_hi:[1,1,0]1399; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11400; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01401; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21402; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31403; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]1404;1405; GFX9-GISEL-LABEL: clpeak_imad_pat_v4i16:1406; GFX9-GISEL:       ; %bb.0: ; %entry1407; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1408; GFX9-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1409; GFX9-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1410; GFX9-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01411; GFX9-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11412; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21413; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31414; GFX9-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1415; GFX9-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1416; GFX9-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1417; GFX9-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1418; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01419; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11420; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21421; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31422; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]1423;1424; GFX10-SDAG-LABEL: clpeak_imad_pat_v4i16:1425; GFX10-SDAG:       ; %bb.0: ; %entry1426; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1427; GFX10-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1428; GFX10-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1429; GFX10-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01430; GFX10-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11431; GFX10-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1432; GFX10-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1433; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21434; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31435; GFX10-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1436; GFX10-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1437; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01438; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11439; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21440; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31441; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]1442;1443; GFX10-GISEL-LABEL: clpeak_imad_pat_v4i16:1444; GFX10-GISEL:       ; %bb.0: ; %entry1445; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1446; GFX10-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1447; GFX10-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1448; GFX10-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01449; GFX10-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11450; GFX10-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1451; GFX10-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1452; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21453; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31454; GFX10-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1455; GFX10-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1456; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01457; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11458; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21459; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31460; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]1461;1462; GFX11-SDAG-LABEL: clpeak_imad_pat_v4i16:1463; GFX11-SDAG:       ; %bb.0: ; %entry1464; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1465; GFX11-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1466; GFX11-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1467; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1468; GFX11-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01469; GFX11-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11470; GFX11-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1471; GFX11-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1472; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1473; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21474; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31475; GFX11-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1476; GFX11-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1477; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1478; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01479; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11480; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1481; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21482; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31483; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]1484;1485; GFX11-GISEL-LABEL: clpeak_imad_pat_v4i16:1486; GFX11-GISEL:       ; %bb.0: ; %entry1487; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1488; GFX11-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1489; GFX11-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1490; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1491; GFX11-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01492; GFX11-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11493; GFX11-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1494; GFX11-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1495; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1496; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21497; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31498; GFX11-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1499; GFX11-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1500; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1501; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01502; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11503; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1504; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21505; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31506; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]1507;1508; GFX1200-SDAG-LABEL: clpeak_imad_pat_v4i16:1509; GFX1200-SDAG:       ; %bb.0: ; %entry1510; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x01511; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x01512; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x01513; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x01514; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x01515; GFX1200-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1516; GFX1200-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1517; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1518; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01519; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11520; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1521; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1522; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1523; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21524; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31525; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1526; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1527; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1528; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01529; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11530; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1531; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21532; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31533; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]1534;1535; GFX1200-GISEL-LABEL: clpeak_imad_pat_v4i16:1536; GFX1200-GISEL:       ; %bb.0: ; %entry1537; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x01538; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x01539; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x01540; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x01541; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x01542; GFX1200-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1543; GFX1200-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1544; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1545; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01546; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11547; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1548; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1549; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1550; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21551; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31552; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1553; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1554; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1555; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01556; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11557; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1558; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21559; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31560; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]1561;1562; GFX1250-SDAG-LABEL: clpeak_imad_pat_v4i16:1563; GFX1250-SDAG:       ; %bb.0: ; %entry1564; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x01565; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x01566; GFX1250-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1567; GFX1250-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1568; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1569; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v01570; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v11571; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1572; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1573; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1574; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v21575; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v31576; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1577; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1578; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1579; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v01580; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v11581; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1582; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v21583; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v31584; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]1585;1586; GFX1250-GISEL-LABEL: clpeak_imad_pat_v4i16:1587; GFX1250-GISEL:       ; %bb.0: ; %entry1588; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x01589; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x01590; GFX1250-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]1591; GFX1250-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]1592; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1593; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v01594; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v11595; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]1596; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]1597; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1598; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v21599; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v31600; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]1601; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]1602; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1603; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v01604; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v11605; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1606; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v21607; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v31608; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]1609entry:1610  %y18 = add <4 x i16> %x, <i16 1, i16 1, i16 1, i16 1>1611  %add = mul <4 x i16> %y18, %y1612  %mul119 = add <4 x i16> %add, %y181613  %add2 = mul <4 x i16> %mul119, %y1614  %add220 = add <4 x i16> %add, <i16 1, i16 1, i16 1, i16 1>1615  %add422 = add <4 x i16> %add2, <i16 1, i16 1, i16 1, i16 1>1616  %mul521 = mul <4 x i16> %add2, %add2201617  %add6 = mul <4 x i16> %mul521, %add4221618  ret <4 x i16> %add61619}1620 1621define zeroext i16 @clpeak_umad_pat_i16(i16 zeroext %x, i16 zeroext %y) {1622; GFX67-LABEL: clpeak_umad_pat_i16:1623; GFX67:       ; %bb.0: ; %entry1624; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1625; GFX67-NEXT:    v_add_i32_e32 v0, vcc, 1, v01626; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v01627; GFX67-NEXT:    v_mul_u32_u24_e32 v2, v0, v11628; GFX67-NEXT:    v_add_i32_e32 v3, vcc, 1, v11629; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v31630; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v21631; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v3, v21632; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v1, 11633; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v01634; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v41635; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v11636; GFX67-NEXT:    v_mad_u32_u24 v1, v3, v2, 11637; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v01638; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v11639; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v11640; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v01641; GFX67-NEXT:    s_setpc_b64 s[30:31]1642;1643; GFX8-SDAG-LABEL: clpeak_umad_pat_i16:1644; GFX8-SDAG:       ; %bb.0: ; %entry1645; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1646; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11647; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v01648; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11649; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v01650; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]1651;1652; GFX8-GISEL-LABEL: clpeak_umad_pat_i16:1653; GFX8-GISEL:       ; %bb.0: ; %entry1654; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1655; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v01656; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v11657; GFX8-GISEL-NEXT:    v_add_u16_e32 v3, 1, v11658; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v21659; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 11660; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v41661; GFX8-GISEL-NEXT:    v_mad_u16 v1, v3, v2, 11662; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v11663; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]1664;1665; GFX9-SDAG-LABEL: clpeak_umad_pat_i16:1666; GFX9-SDAG:       ; %bb.0: ; %entry1667; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1668; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v11669; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v01670; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v11671; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v01672; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]1673;1674; GFX9-GISEL-LABEL: clpeak_umad_pat_i16:1675; GFX9-GISEL:       ; %bb.0: ; %entry1676; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1677; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v01678; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v11679; GFX9-GISEL-NEXT:    v_add_u16_e32 v3, 1, v11680; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v21681; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, 11682; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v41683; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v3, v2, 11684; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v11685; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]1686;1687; GFX10-SDAG-LABEL: clpeak_umad_pat_i16:1688; GFX10-SDAG:       ; %bb.0: ; %entry1689; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1690; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11691; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v01692; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11693; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v01694; GFX10-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01695; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]1696;1697; GFX10-GISEL-LABEL: clpeak_umad_pat_i16:1698; GFX10-GISEL:       ; %bb.0: ; %entry1699; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1700; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 11701; GFX10-GISEL-NEXT:    v_add_nc_u16 v2, v1, 11702; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v11703; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 11704; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v31705; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v11706; GFX10-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 11707; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v11708; GFX10-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01709; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]1710;1711; GFX11-SDAG-TRUE16-LABEL: clpeak_umad_pat_i16:1712; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry1713; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1714; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l1715; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1716; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l1717; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h1718; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1719; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l1720; GFX11-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 01721; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]1722;1723; GFX11-SDAG-FAKE16-LABEL: clpeak_umad_pat_i16:1724; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry1725; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1726; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v11727; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1728; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v01729; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v11730; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1731; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v01732; GFX11-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v01733; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]1734;1735; GFX11-GISEL-TRUE16-LABEL: clpeak_umad_pat_i16:1736; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry1737; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1738; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 11739; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 11740; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1741; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l1742; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 11743; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h1744; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 11745; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1746; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l1747; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h1748; GFX11-GISEL-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 01749; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]1750;1751; GFX11-GISEL-FAKE16-LABEL: clpeak_umad_pat_i16:1752; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry1753; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1754; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 11755; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 11756; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1757; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v11758; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 11759; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v31760; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1761; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v11762; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 11763; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v11764; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1765; GFX11-GISEL-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v01766; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]1767;1768; GFX1200-SDAG-TRUE16-LABEL: clpeak_umad_pat_i16:1769; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry1770; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x01771; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x01772; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x01773; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x01774; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x01775; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l1776; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1777; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l1778; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h1779; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1780; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l1781; GFX1200-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 01782; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]1783;1784; GFX1200-SDAG-FAKE16-LABEL: clpeak_umad_pat_i16:1785; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry1786; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x01787; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x01788; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x01789; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x01790; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x01791; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v11792; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1793; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v01794; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v11795; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1796; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v01797; GFX1200-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v01798; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]1799;1800; GFX1200-GISEL-TRUE16-LABEL: clpeak_umad_pat_i16:1801; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry1802; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x01803; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x01804; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x01805; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x01806; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x01807; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 11808; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 11809; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1810; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l1811; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 11812; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h1813; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 11814; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1815; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l1816; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h1817; GFX1200-GISEL-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 01818; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]1819;1820; GFX1200-GISEL-FAKE16-LABEL: clpeak_umad_pat_i16:1821; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry1822; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x01823; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x01824; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x01825; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x01826; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x01827; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 11828; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 11829; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1830; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v11831; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 11832; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v31833; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1834; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v11835; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 11836; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v11837; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1838; GFX1200-GISEL-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v01839; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]1840;1841; GFX1250-SDAG-LABEL: clpeak_umad_pat_i16:1842; GFX1250-SDAG:       ; %bb.0: ; %entry1843; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x01844; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x01845; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11846; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1847; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v01848; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v11849; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1850; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v01851; GFX1250-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01852; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]1853;1854; GFX1250-GISEL-LABEL: clpeak_umad_pat_i16:1855; GFX1250-GISEL:       ; %bb.0: ; %entry1856; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x01857; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x01858; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 11859; GFX1250-GISEL-NEXT:    v_add_nc_u16 v2, v1, 11860; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1861; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v11862; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 11863; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v31864; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1865; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v11866; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 11867; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v11868; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)1869; GFX1250-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01870; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]1871entry:1872  %conv33 = add i16 %x, 11873  %add = mul i16 %conv33, %y1874  %conv434 = add i16 %y, 11875  %add8 = mul i16 %conv434, %add1876  %conv1035 = add i16 %add, 11877  %add14 = mul i16 %conv1035, %add81878  %conv1636 = add i16 %add8, 11879  %add20 = mul i16 %add14, %conv16361880  ret i16 %add201881}1882 1883define <2 x i16> @clpeak_umad_pat_v2i16(<2 x i16> %x, <2 x i16> %y) {1884; GFX67-SDAG-LABEL: clpeak_umad_pat_v2i16:1885; GFX67-SDAG:       ; %bb.0: ; %entry1886; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1887; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v01888; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v01889; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v11890; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v21891; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v11892; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v31893; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v4, v2, v01894; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01895; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v5, v3, v11896; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v11897; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v6, v0, v21898; GFX67-SDAG-NEXT:    v_mad_u32_u24 v4, v4, v2, 11899; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v7, v1, v31900; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v41901; GFX67-SDAG-NEXT:    v_mad_u32_u24 v5, v5, v3, 11902; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v3, 11903; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v61904; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, 11905; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v51906; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v41907; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v71908; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v21909; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v01910; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v11911; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v31912; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v21913; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v3, v01914; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v2, v11915; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]1916;1917; GFX67-GISEL-LABEL: clpeak_umad_pat_v2i16:1918; GFX67-GISEL:       ; %bb.0: ; %entry1919; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1920; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v11921; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v01922; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v11923; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v01924; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v51925; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v51926; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v41927; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v31928; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v41929; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v21930; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v5, v3, v11931; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v4, v2, v01932; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11933; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01934; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v11935; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v11936; GFX67-GISEL-NEXT:    v_mad_u32_u24 v5, v5, v3, 11937; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v01938; GFX67-GISEL-NEXT:    v_mad_u32_u24 v4, v4, v2, 11939; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v51940; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01941; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v1, v31942; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v41943; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v51944; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, 11945; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v6, v0, v21946; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v51947; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, 11948; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11949; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01950; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v11951; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v61952; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v41953; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v11954; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v41955; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v31956; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v71957; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v11958; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v01959; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v21960; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v01961; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v11962; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v2, v01963; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v31964; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]1965;1966; GFX8-SDAG-LABEL: clpeak_umad_pat_v2i16:1967; GFX8-SDAG:       ; %bb.0: ; %entry1968; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1969; GFX8-SDAG-NEXT:    v_mov_b32_e32 v3, 11970; GFX8-SDAG-NEXT:    v_add_u16_e32 v2, 1, v01971; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1972; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v11973; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v0, v31974; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v3, v01975; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v2, v11976; GFX8-SDAG-NEXT:    v_mad_u16 v2, v2, v1, v21977; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v31978; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v2, v11979; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v4, v01980; GFX8-SDAG-NEXT:    v_mad_u16 v3, v1, v5, v11981; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v21982; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v01983; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v31984; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v1, v01985; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]1986;1987; GFX8-GISEL-LABEL: clpeak_umad_pat_v2i16:1988; GFX8-GISEL:       ; %bb.0: ; %entry1989; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1990; GFX8-GISEL-NEXT:    v_mov_b32_e32 v3, 11991; GFX8-GISEL-NEXT:    v_add_u16_e32 v2, 1, v01992; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1993; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v11994; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v21995; GFX8-GISEL-NEXT:    v_mad_u16 v5, v0, v3, v01996; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v11997; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v31998; GFX8-GISEL-NEXT:    v_mad_u16 v2, v2, v1, 11999; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 12000; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v1, 12001; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 12002; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v6, v22003; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v7, v02004; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v2, v12005; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2006; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v1, v02007; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]2008;2009; GFX9-LABEL: clpeak_umad_pat_v2i16:2010; GFX9:       ; %bb.0: ; %entry2011; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2012; GFX9-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2013; GFX9-NEXT:    v_pk_mad_u16 v2, v0, v1, v02014; GFX9-NEXT:    v_pk_mul_lo_u16 v3, v2, v12015; GFX9-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]2016; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]2017; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v3, v02018; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v0, v12019; GFX9-NEXT:    s_setpc_b64 s[30:31]2020;2021; GFX10-LABEL: clpeak_umad_pat_v2i16:2022; GFX10:       ; %bb.0: ; %entry2023; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2024; GFX10-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2025; GFX10-NEXT:    v_pk_mad_u16 v2, v0, v1, v02026; GFX10-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]2027; GFX10-NEXT:    v_pk_mul_lo_u16 v3, v2, v12028; GFX10-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]2029; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v3, v02030; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v0, v12031; GFX10-NEXT:    s_setpc_b64 s[30:31]2032;2033; GFX11-LABEL: clpeak_umad_pat_v2i16:2034; GFX11:       ; %bb.0: ; %entry2035; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2036; GFX11-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2037; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2038; GFX11-NEXT:    v_pk_mad_u16 v2, v0, v1, v02039; GFX11-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]2040; GFX11-NEXT:    v_pk_mul_lo_u16 v3, v2, v12041; GFX11-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]2042; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2043; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v3, v02044; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v0, v12045; GFX11-NEXT:    s_setpc_b64 s[30:31]2046;2047; GFX1200-LABEL: clpeak_umad_pat_v2i16:2048; GFX1200:       ; %bb.0: ; %entry2049; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x02050; GFX1200-NEXT:    s_wait_expcnt 0x02051; GFX1200-NEXT:    s_wait_samplecnt 0x02052; GFX1200-NEXT:    s_wait_bvhcnt 0x02053; GFX1200-NEXT:    s_wait_kmcnt 0x02054; GFX1200-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2055; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2056; GFX1200-NEXT:    v_pk_mad_u16 v2, v0, v1, v02057; GFX1200-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]2058; GFX1200-NEXT:    v_pk_mul_lo_u16 v3, v2, v12059; GFX1200-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]2060; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2061; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v3, v02062; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v0, v12063; GFX1200-NEXT:    s_setpc_b64 s[30:31]2064;2065; GFX1250-LABEL: clpeak_umad_pat_v2i16:2066; GFX1250:       ; %bb.0: ; %entry2067; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x02068; GFX1250-NEXT:    s_wait_kmcnt 0x02069; GFX1250-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2070; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2071; GFX1250-NEXT:    v_pk_mad_u16 v2, v0, v1, v02072; GFX1250-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]2073; GFX1250-NEXT:    v_pk_mul_lo_u16 v3, v2, v12074; GFX1250-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]2075; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2076; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v3, v02077; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v0, v12078; GFX1250-NEXT:    s_set_pc_i64 s[30:31]2079entry:2080  %y18 = add <2 x i16> %x, <i16 1, i16 1>2081  %add = mul <2 x i16> %y18, %y2082  %mul119 = add <2 x i16> %add, %y182083  %add2 = mul <2 x i16> %mul119, %y2084  %add220 = add <2 x i16> %add, <i16 1, i16 1>2085  %add422 = add <2 x i16> %add2, <i16 1, i16 1>2086  %mul521 = mul <2 x i16> %add2, %add2202087  %add6 = mul <2 x i16> %mul521, %add4222088  ret <2 x i16> %add62089}2090 2091define <3 x i16> @clpeak_umad_pat_v3i16(<3 x i16> %x, <3 x i16> %y) {2092; GFX67-SDAG-LABEL: clpeak_umad_pat_v3i16:2093; GFX67-SDAG:       ; %bb.0: ; %entry2094; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2095; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v02096; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v12097; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v02098; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v12099; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v32100; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v42101; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v22102; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v9, v8, v42103; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v6, v3, v02104; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v8, v4, v12105; GFX67-SDAG-NEXT:    v_mad_u32_u24 v6, v6, v3, 12106; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v22107; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v52108; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02109; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12110; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v62111; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v92112; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v7, v5, v22113; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v8, v0, v32114; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v42115; GFX67-SDAG-NEXT:    v_or_b32_e32 v6, v9, v62116; GFX67-SDAG-NEXT:    s_mov_b32 s4, 0x100002117; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v3, 12118; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v22119; GFX67-SDAG-NEXT:    v_add_i32_e32 v6, vcc, s4, v62120; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02121; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v3, 16, v12122; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v4, v2, v52123; GFX67-SDAG-NEXT:    v_mad_u32_u24 v7, v7, v5, 12124; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v3, v02125; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v62126; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12127; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v72128; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v2, v5, 12129; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v82130; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v62131; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v32132; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v42133; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, s4, v02134; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v5, v5, v62135; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v72136; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v22137; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v02138; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v52139; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02140; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12141; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v32142; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v5, v02143; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v42144; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v3, v22145; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]2146;2147; GFX67-GISEL-LABEL: clpeak_umad_pat_v3i16:2148; GFX67-GISEL:       ; %bb.0: ; %entry2149; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2150; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v02151; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v12152; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v02153; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v32154; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v22155; GFX67-GISEL-NEXT:    v_and_b32_e32 v7, 0xffff, v12156; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v42157; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v6, v3, v02158; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v22159; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v52160; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v7, v4, v12161; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02162; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v8, v5, v22163; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v9, v0, v32164; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12165; GFX67-GISEL-NEXT:    v_mad_u32_u24 v6, v6, v3, 12166; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v10, v1, v42167; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v22168; GFX67-GISEL-NEXT:    v_mad_u32_u24 v7, v7, v4, 12169; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v3, 12170; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v4, 12171; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v92172; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v62173; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v11, v2, v52174; GFX67-GISEL-NEXT:    v_mad_u32_u24 v8, v8, v5, 12175; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v2, v5, 12176; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v42177; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v102178; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v72179; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v4, v52180; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v112181; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v82182; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v32183; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02184; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v5, v5, v62185; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v3, v02186; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v42187; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12188; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v12189; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v52190; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v22191; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v3, v22192; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]2193;2194; GFX8-SDAG-LABEL: clpeak_umad_pat_v3i16:2195; GFX8-SDAG:       ; %bb.0: ; %entry2196; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2197; GFX8-SDAG-NEXT:    v_mov_b32_e32 v5, 12198; GFX8-SDAG-NEXT:    v_add_u16_e32 v4, 1, v02199; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2200; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v22201; GFX8-SDAG-NEXT:    v_add_u16_e32 v1, 1, v12202; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v6, v0, v52203; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v5, v02204; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v7, v1, v32205; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v8, v4, v22206; GFX8-SDAG-NEXT:    v_mad_u16 v4, v4, v2, v42207; GFX8-SDAG-NEXT:    v_mad_u16 v1, v1, v3, v12208; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v52209; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v32210; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v4, v22211; GFX8-SDAG-NEXT:    v_mad_u16 v3, v0, v6, v02212; GFX8-SDAG-NEXT:    v_mad_u16 v4, v2, v8, v22213; GFX8-SDAG-NEXT:    v_mad_u16 v0, v3, v0, v32214; GFX8-SDAG-NEXT:    v_mad_u16 v5, v1, v7, v12215; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v02216; GFX8-SDAG-NEXT:    v_mad_u16 v2, v4, v2, v42217; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, v52218; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v2, v02219; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]2220;2221; GFX8-GISEL-LABEL: clpeak_umad_pat_v3i16:2222; GFX8-GISEL:       ; %bb.0: ; %entry2223; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2224; GFX8-GISEL-NEXT:    v_mov_b32_e32 v6, 12225; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v4, 16, v22226; GFX8-GISEL-NEXT:    v_add_u16_e32 v5, 1, v02227; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2228; GFX8-GISEL-NEXT:    v_add_u16_e32 v1, 1, v12229; GFX8-GISEL-NEXT:    v_mad_u16 v6, v5, v2, v52230; GFX8-GISEL-NEXT:    v_mad_u16 v7, v0, v4, v02231; GFX8-GISEL-NEXT:    v_mad_u16 v8, v1, v3, v12232; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v9, v6, v22233; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v10, v7, v42234; GFX8-GISEL-NEXT:    v_mad_u16 v5, v5, v2, 12235; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v4, 12236; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v11, v8, v32237; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v3, 12238; GFX8-GISEL-NEXT:    v_mad_u16 v2, v6, v2, 12239; GFX8-GISEL-NEXT:    v_mad_u16 v4, v7, v4, 12240; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v5, v9, v52241; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v10, v02242; GFX8-GISEL-NEXT:    v_mad_u16 v3, v8, v3, 12243; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v11, v12244; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v5, v22245; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2246; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v2, v02247; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v32248; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]2249;2250; GFX9-SDAG-LABEL: clpeak_umad_pat_v3i16:2251; GFX9-SDAG:       ; %bb.0: ; %entry2252; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2253; GFX9-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2254; GFX9-SDAG-NEXT:    v_pk_add_u16 v1, v1, 12255; GFX9-SDAG-NEXT:    v_pk_mad_u16 v4, v1, v3, v12256; GFX9-SDAG-NEXT:    v_pk_mad_u16 v5, v0, v2, v02257; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v5, v22258; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v4, v32259; GFX9-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2260; GFX9-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 12261; GFX9-SDAG-NEXT:    v_pk_mad_u16 v3, v4, v3, 12262; GFX9-SDAG-NEXT:    v_pk_mad_u16 v2, v5, v2, 1 op_sel_hi:[1,1,0]2263; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12264; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02265; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22266; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32267; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]2268;2269; GFX9-GISEL-LABEL: clpeak_umad_pat_v3i16:2270; GFX9-GISEL:       ; %bb.0: ; %entry2271; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2272; GFX9-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2273; GFX9-GISEL-NEXT:    v_pk_add_u16 v1, v1, 12274; GFX9-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02275; GFX9-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12276; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22277; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32278; GFX9-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2279; GFX9-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 12280; GFX9-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2281; GFX9-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 12282; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02283; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12284; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22285; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32286; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]2287;2288; GFX10-SDAG-LABEL: clpeak_umad_pat_v3i16:2289; GFX10-SDAG:       ; %bb.0: ; %entry2290; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2291; GFX10-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2292; GFX10-SDAG-NEXT:    v_pk_add_u16 v1, v1, 12293; GFX10-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02294; GFX10-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12295; GFX10-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2296; GFX10-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 12297; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22298; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32299; GFX10-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 12300; GFX10-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2301; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02302; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12303; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22304; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32305; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]2306;2307; GFX10-GISEL-LABEL: clpeak_umad_pat_v3i16:2308; GFX10-GISEL:       ; %bb.0: ; %entry2309; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2310; GFX10-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2311; GFX10-GISEL-NEXT:    v_pk_add_u16 v1, v1, 12312; GFX10-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02313; GFX10-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12314; GFX10-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2315; GFX10-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 12316; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22317; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32318; GFX10-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2319; GFX10-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 12320; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02321; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12322; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22323; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32324; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]2325;2326; GFX11-SDAG-LABEL: clpeak_umad_pat_v3i16:2327; GFX11-SDAG:       ; %bb.0: ; %entry2328; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2329; GFX11-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2330; GFX11-SDAG-NEXT:    v_pk_add_u16 v1, v1, 12331; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2332; GFX11-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02333; GFX11-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12334; GFX11-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2335; GFX11-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 12336; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2337; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22338; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32339; GFX11-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 12340; GFX11-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2341; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2342; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02343; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12344; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2345; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22346; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32347; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]2348;2349; GFX11-GISEL-LABEL: clpeak_umad_pat_v3i16:2350; GFX11-GISEL:       ; %bb.0: ; %entry2351; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2352; GFX11-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2353; GFX11-GISEL-NEXT:    v_pk_add_u16 v1, v1, 12354; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2355; GFX11-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02356; GFX11-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12357; GFX11-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2358; GFX11-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 12359; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2360; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22361; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32362; GFX11-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2363; GFX11-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 12364; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2365; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02366; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12367; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2368; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22369; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32370; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]2371;2372; GFX1200-SDAG-LABEL: clpeak_umad_pat_v3i16:2373; GFX1200-SDAG:       ; %bb.0: ; %entry2374; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x02375; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x02376; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x02377; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x02378; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x02379; GFX1200-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2380; GFX1200-SDAG-NEXT:    v_pk_add_u16 v1, v1, 12381; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2382; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02383; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12384; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2385; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 12386; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2387; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22388; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32389; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 12390; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2391; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2392; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02393; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12394; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2395; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22396; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32397; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]2398;2399; GFX1200-GISEL-LABEL: clpeak_umad_pat_v3i16:2400; GFX1200-GISEL:       ; %bb.0: ; %entry2401; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x02402; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x02403; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x02404; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x02405; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x02406; GFX1200-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2407; GFX1200-GISEL-NEXT:    v_pk_add_u16 v1, v1, 12408; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2409; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02410; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12411; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2412; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 12413; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2414; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22415; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32416; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2417; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 12418; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2419; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02420; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12421; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2422; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22423; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32424; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]2425;2426; GFX1250-SDAG-LABEL: clpeak_umad_pat_v3i16:2427; GFX1250-SDAG:       ; %bb.0: ; %entry2428; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x02429; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x02430; GFX1250-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2431; GFX1250-SDAG-NEXT:    v_pk_add_u16 v1, v1, 12432; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2433; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02434; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12435; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2436; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 12437; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2438; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22439; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32440; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 12441; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2442; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2443; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02444; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12445; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2446; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22447; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32448; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]2449;2450; GFX1250-GISEL-LABEL: clpeak_umad_pat_v3i16:2451; GFX1250-GISEL:       ; %bb.0: ; %entry2452; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x02453; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x02454; GFX1250-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2455; GFX1250-GISEL-NEXT:    v_pk_add_u16 v1, v1, 12456; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2457; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02458; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12459; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2460; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 12461; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2462; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22463; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32464; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2465; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 12466; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2467; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02468; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12469; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2470; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22471; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32472; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]2473entry:2474  %y48 = add <3 x i16> %x, <i16 1, i16 1, i16 1>2475  %add = mul <3 x i16> %y48, %y2476  %mul1249 = add <3 x i16> %add, %y482477  %add15 = mul <3 x i16> %mul1249, %y2478  %add1550 = add <3 x i16> %add, <i16 1, i16 1, i16 1>2479  %add2452 = add <3 x i16> %add15, <i16 1, i16 1, i16 1>2480  %mul3051 = mul <3 x i16> %add15, %add15502481  %add33 = mul <3 x i16> %mul3051, %add24522482  ret <3 x i16> %add332483}2484 2485define <4 x i16> @clpeak_umad_pat_v4i16(<4 x i16> %x, <4 x i16> %y) {2486; GFX67-SDAG-LABEL: clpeak_umad_pat_v4i16:2487; GFX67-SDAG:       ; %bb.0: ; %entry2488; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2489; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, 1, v32490; GFX67-SDAG-NEXT:    v_and_b32_e32 v11, 0xffff, v32491; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v72492; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v22493; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v11, v7, v32494; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v02495; GFX67-SDAG-NEXT:    v_and_b32_e32 v9, 0xffff, v22496; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v12497; GFX67-SDAG-NEXT:    v_and_b32_e32 v6, 0xffff, v62498; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v32499; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v02500; GFX67-SDAG-NEXT:    v_and_b32_e32 v10, 0xffff, v12501; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v42502; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v52503; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v13, v11, v72504; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v72505; GFX67-SDAG-NEXT:    v_mad_u32_u24 v7, v9, v6, 12506; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v12, v10, v52507; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v9, v6, v22508; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v8, v4, v02509; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v10, v5, v12510; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v72511; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v132512; GFX67-SDAG-NEXT:    v_mad_u32_u24 v8, v8, v4, 12513; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02514; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12515; GFX67-SDAG-NEXT:    v_or_b32_e32 v7, v9, v72516; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v82517; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v9, 16, v122518; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v22519; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v10, v0, v42520; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v52521; GFX67-SDAG-NEXT:    s_mov_b32 s4, 0x100002522; GFX67-SDAG-NEXT:    v_or_b32_e32 v8, v9, v82523; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v4, 12524; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v5, v2, v62525; GFX67-SDAG-NEXT:    v_add_i32_e32 v8, vcc, s4, v82526; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v2, v6, 12527; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02528; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v4, 16, v12529; GFX67-SDAG-NEXT:    v_add_i32_e32 v7, vcc, s4, v72530; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v22531; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v6, 16, v32532; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v4, v02533; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v82534; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12535; GFX67-SDAG-NEXT:    v_or_b32_e32 v2, v6, v22536; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v72537; GFX67-SDAG-NEXT:    v_and_b32_e32 v9, 0xffff, v102538; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v82539; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v42540; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v52541; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v72542; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v32543; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, s4, v22544; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, s4, v02545; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v8, v9, v82546; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v4, v4, v52547; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v62548; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v02549; GFX67-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v22550; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v82551; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v02552; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v12553; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v42554; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v22555; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v32556; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v7, v02557; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v52558; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v22559; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v62560; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]2561;2562; GFX67-GISEL-LABEL: clpeak_umad_pat_v4i16:2563; GFX67-GISEL:       ; %bb.0: ; %entry2564; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2565; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v12566; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v02567; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v32568; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v12569; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v22570; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v02571; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v9, 16, v92572; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v32573; GFX67-GISEL-NEXT:    v_or_b32_e32 v8, v8, v92574; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v22575; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v102576; GFX67-GISEL-NEXT:    v_or_b32_e32 v9, v9, v102577; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v10, 16, v82578; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v52579; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v82580; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v42581; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v10, v5, v12582; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v11, 16, v92583; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v92584; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v62585; GFX67-GISEL-NEXT:    v_and_b32_e32 v7, 0xffff, v72586; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v8, v4, v02587; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12588; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v9, v6, v22589; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v11, v7, v32590; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02591; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v12592; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v12593; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v22594; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v32595; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v22596; GFX67-GISEL-NEXT:    v_or_b32_e32 v1, v1, v22597; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v2, 16, v02598; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02599; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v13, v2, v52600; GFX67-GISEL-NEXT:    v_mad_u32_u24 v10, v10, v5, 12601; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v2, v5, 12602; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v12603; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v12, v0, v42604; GFX67-GISEL-NEXT:    v_mad_u32_u24 v8, v8, v4, 12605; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v102606; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v4, 12607; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v22608; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12609; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v15, v3, v72610; GFX67-GISEL-NEXT:    v_mad_u32_u24 v11, v11, v7, 12611; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v82612; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v102613; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v3, v7, 12614; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02615; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v22616; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v14, v1, v62617; GFX67-GISEL-NEXT:    v_mad_u32_u24 v9, v9, v6, 12618; GFX67-GISEL-NEXT:    v_or_b32_e32 v8, v8, v102619; GFX67-GISEL-NEXT:    v_and_b32_e32 v10, 0xffff, v112620; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v6, 12621; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v22622; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v32623; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v92624; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v10, 16, v102625; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12626; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 16, v22627; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v122628; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v82629; GFX67-GISEL-NEXT:    v_or_b32_e32 v9, v9, v102630; GFX67-GISEL-NEXT:    v_or_b32_e32 v2, v1, v22631; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v82632; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v4, v52633; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v132634; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v5, v12635; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v142636; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v92637; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v92638; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v5, v5, v62639; GFX67-GISEL-NEXT:    v_and_b32_e32 v6, 0xffff, v152640; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v6, v32641; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v6, 16, v02642; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v42643; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v02644; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v22645; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v4, v02646; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v12647; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v52648; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v22649; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v32650; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v62651; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v4, v22652; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v72653; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]2654;2655; GFX8-SDAG-LABEL: clpeak_umad_pat_v4i16:2656; GFX8-SDAG:       ; %bb.0: ; %entry2657; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2658; GFX8-SDAG-NEXT:    v_mov_b32_e32 v6, 12659; GFX8-SDAG-NEXT:    v_add_u16_e32 v5, 1, v02660; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2661; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v8, 16, v22662; GFX8-SDAG-NEXT:    v_add_u16_e32 v4, 1, v12663; GFX8-SDAG-NEXT:    v_add_u16_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2664; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v32665; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v9, v0, v82666; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v8, v02667; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v7, v1, v62668; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v10, v5, v22669; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v11, v4, v32670; GFX8-SDAG-NEXT:    v_mad_u16 v1, v1, v6, v12671; GFX8-SDAG-NEXT:    v_mad_u16 v4, v4, v3, v42672; GFX8-SDAG-NEXT:    v_mad_u16 v5, v5, v2, v52673; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v82674; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v62675; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v5, v22676; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v3, v4, v32677; GFX8-SDAG-NEXT:    v_mad_u16 v4, v0, v9, v02678; GFX8-SDAG-NEXT:    v_mad_u16 v5, v1, v7, v12679; GFX8-SDAG-NEXT:    v_mad_u16 v7, v2, v10, v22680; GFX8-SDAG-NEXT:    v_mad_u16 v0, v4, v0, v42681; GFX8-SDAG-NEXT:    v_mad_u16 v6, v3, v11, v32682; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, v52683; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v02684; GFX8-SDAG-NEXT:    v_mad_u16 v2, v7, v2, v72685; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v2, v02686; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v12687; GFX8-SDAG-NEXT:    v_mad_u16 v2, v6, v3, v62688; GFX8-SDAG-NEXT:    v_or_b32_e32 v1, v2, v12689; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]2690;2691; GFX8-GISEL-LABEL: clpeak_umad_pat_v4i16:2692; GFX8-GISEL:       ; %bb.0: ; %entry2693; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2694; GFX8-GISEL-NEXT:    v_mov_b32_e32 v5, 12695; GFX8-GISEL-NEXT:    v_add_u16_e32 v4, 1, v02696; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2697; GFX8-GISEL-NEXT:    v_add_u16_e32 v6, 1, v12698; GFX8-GISEL-NEXT:    v_add_u16_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2699; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v22700; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v32701; GFX8-GISEL-NEXT:    v_mad_u16 v8, v4, v2, v42702; GFX8-GISEL-NEXT:    v_mad_u16 v9, v0, v5, v02703; GFX8-GISEL-NEXT:    v_mad_u16 v10, v6, v3, v62704; GFX8-GISEL-NEXT:    v_mad_u16 v11, v1, v7, v12705; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v12, v8, v22706; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v13, v9, v52707; GFX8-GISEL-NEXT:    v_mad_u16 v4, v4, v2, 12708; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v5, 12709; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v14, v10, v32710; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v15, v11, v72711; GFX8-GISEL-NEXT:    v_mad_u16 v6, v6, v3, 12712; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v7, 12713; GFX8-GISEL-NEXT:    v_mad_u16 v2, v8, v2, 12714; GFX8-GISEL-NEXT:    v_mad_u16 v5, v9, v5, 12715; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v12, v42716; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v13, v02717; GFX8-GISEL-NEXT:    v_mad_u16 v3, v10, v3, 12718; GFX8-GISEL-NEXT:    v_mad_u16 v7, v11, v7, 12719; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v14, v62720; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v15, v12721; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v4, v22722; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2723; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v2, v02724; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v6, v32725; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2726; GFX8-GISEL-NEXT:    v_or_b32_e32 v1, v2, v12727; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]2728;2729; GFX9-SDAG-LABEL: clpeak_umad_pat_v4i16:2730; GFX9-SDAG:       ; %bb.0: ; %entry2731; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2732; GFX9-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2733; GFX9-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2734; GFX9-SDAG-NEXT:    v_pk_mad_u16 v4, v1, v3, v12735; GFX9-SDAG-NEXT:    v_pk_mad_u16 v5, v0, v2, v02736; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v5, v22737; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v4, v32738; GFX9-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2739; GFX9-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2740; GFX9-SDAG-NEXT:    v_pk_mad_u16 v3, v4, v3, 1 op_sel_hi:[1,1,0]2741; GFX9-SDAG-NEXT:    v_pk_mad_u16 v2, v5, v2, 1 op_sel_hi:[1,1,0]2742; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12743; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02744; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22745; GFX9-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32746; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]2747;2748; GFX9-GISEL-LABEL: clpeak_umad_pat_v4i16:2749; GFX9-GISEL:       ; %bb.0: ; %entry2750; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2751; GFX9-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2752; GFX9-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2753; GFX9-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02754; GFX9-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12755; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22756; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32757; GFX9-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2758; GFX9-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2759; GFX9-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2760; GFX9-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2761; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02762; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12763; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22764; GFX9-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32765; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]2766;2767; GFX10-SDAG-LABEL: clpeak_umad_pat_v4i16:2768; GFX10-SDAG:       ; %bb.0: ; %entry2769; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2770; GFX10-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2771; GFX10-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2772; GFX10-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02773; GFX10-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12774; GFX10-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2775; GFX10-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2776; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22777; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32778; GFX10-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2779; GFX10-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2780; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02781; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12782; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22783; GFX10-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32784; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]2785;2786; GFX10-GISEL-LABEL: clpeak_umad_pat_v4i16:2787; GFX10-GISEL:       ; %bb.0: ; %entry2788; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2789; GFX10-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2790; GFX10-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2791; GFX10-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02792; GFX10-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12793; GFX10-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2794; GFX10-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2795; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22796; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32797; GFX10-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2798; GFX10-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2799; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02800; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12801; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22802; GFX10-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32803; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]2804;2805; GFX11-SDAG-LABEL: clpeak_umad_pat_v4i16:2806; GFX11-SDAG:       ; %bb.0: ; %entry2807; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2808; GFX11-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2809; GFX11-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2810; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2811; GFX11-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02812; GFX11-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12813; GFX11-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2814; GFX11-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2815; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2816; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22817; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32818; GFX11-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2819; GFX11-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2820; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2821; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02822; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12823; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2824; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22825; GFX11-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32826; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]2827;2828; GFX11-GISEL-LABEL: clpeak_umad_pat_v4i16:2829; GFX11-GISEL:       ; %bb.0: ; %entry2830; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2831; GFX11-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2832; GFX11-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2833; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2834; GFX11-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02835; GFX11-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12836; GFX11-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2837; GFX11-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2838; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2839; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22840; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32841; GFX11-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2842; GFX11-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2843; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2844; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02845; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12846; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2847; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22848; GFX11-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32849; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]2850;2851; GFX1200-SDAG-LABEL: clpeak_umad_pat_v4i16:2852; GFX1200-SDAG:       ; %bb.0: ; %entry2853; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x02854; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x02855; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x02856; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x02857; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x02858; GFX1200-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2859; GFX1200-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2860; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2861; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02862; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12863; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2864; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2865; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2866; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22867; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32868; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2869; GFX1200-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2870; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2871; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02872; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12873; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2874; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22875; GFX1200-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32876; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]2877;2878; GFX1200-GISEL-LABEL: clpeak_umad_pat_v4i16:2879; GFX1200-GISEL:       ; %bb.0: ; %entry2880; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x02881; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x02882; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x02883; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x02884; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x02885; GFX1200-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2886; GFX1200-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2887; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2888; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02889; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12890; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2891; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2892; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2893; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22894; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32895; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2896; GFX1200-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2897; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2898; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02899; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12900; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2901; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22902; GFX1200-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32903; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]2904;2905; GFX1250-SDAG-LABEL: clpeak_umad_pat_v4i16:2906; GFX1250-SDAG:       ; %bb.0: ; %entry2907; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x02908; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x02909; GFX1250-SDAG-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2910; GFX1250-SDAG-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2911; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2912; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v4, v0, v2, v02913; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v5, v1, v3, v12914; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2915; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2916; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2917; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v6, v4, v22918; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v7, v5, v32919; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2920; GFX1250-SDAG-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2921; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2922; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v6, v02923; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v7, v12924; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2925; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v0, v0, v22926; GFX1250-SDAG-NEXT:    v_pk_mul_lo_u16 v1, v1, v32927; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]2928;2929; GFX1250-GISEL-LABEL: clpeak_umad_pat_v4i16:2930; GFX1250-GISEL:       ; %bb.0: ; %entry2931; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x02932; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x02933; GFX1250-GISEL-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]2934; GFX1250-GISEL-NEXT:    v_pk_add_u16 v1, v1, 1 op_sel_hi:[1,0]2935; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2936; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v4, v0, v2, v02937; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v5, v1, v3, v12938; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v0, v0, v2, 1 op_sel_hi:[1,1,0]2939; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v1, v1, v3, 1 op_sel_hi:[1,1,0]2940; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2941; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v6, v4, v22942; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v7, v5, v32943; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v2, v4, v2, 1 op_sel_hi:[1,1,0]2944; GFX1250-GISEL-NEXT:    v_pk_mad_u16 v3, v5, v3, 1 op_sel_hi:[1,1,0]2945; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2946; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v6, v02947; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v7, v12948; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2949; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v0, v0, v22950; GFX1250-GISEL-NEXT:    v_pk_mul_lo_u16 v1, v1, v32951; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]2952entry:2953  %y18 = add <4 x i16> %x, <i16 1, i16 1, i16 1, i16 1>2954  %add = mul <4 x i16> %y18, %y2955  %mul119 = add <4 x i16> %add, %y182956  %add2 = mul <4 x i16> %mul119, %y2957  %add220 = add <4 x i16> %add, <i16 1, i16 1, i16 1, i16 1>2958  %add422 = add <4 x i16> %add2, <i16 1, i16 1, i16 1, i16 1>2959  %mul521 = mul <4 x i16> %add2, %add2202960  %add6 = mul <4 x i16> %mul521, %add4222961  ret <4 x i16> %add62962}2963 2964define <2 x i32> @clpeak_imad_pat_v2i32(<2 x i32> %x, <2 x i32> %y) {2965; GFX67-SDAG-LABEL: clpeak_imad_pat_v2i32:2966; GFX67-SDAG:       ; %bb.0: ; %entry2967; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2968; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v02969; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v12970; GFX67-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v22971; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v32972; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v4, v02973; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v5, v12974; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v22975; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v32976; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v42977; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v52978; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v02979; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v12980; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v02981; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v12982; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v22983; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v32984; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]2985;2986; GFX67-GISEL-LABEL: clpeak_imad_pat_v2i32:2987; GFX67-GISEL:       ; %bb.0: ; %entry2988; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2989; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v02990; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v12991; GFX67-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v22992; GFX67-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v32993; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v4, v02994; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v5, v12995; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v22996; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v32997; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v42998; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v52999; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v03000; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23001; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v33002; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v13003; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43004; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v2, v13005; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]3006;3007; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i32:3008; GFX8-SDAG:       ; %bb.0: ; %entry3009; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3010; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v03011; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v13012; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v23013; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v33014; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v4, v03015; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v5, v13016; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23017; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v33018; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v43019; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v53020; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v2, v03021; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v13022; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v03023; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v13024; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v23025; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v33026; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]3027;3028; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i32:3029; GFX8-GISEL:       ; %bb.0: ; %entry3030; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3031; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v03032; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v13033; GFX8-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23034; GFX8-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33035; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v4, v03036; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v5, v13037; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23038; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33039; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v43040; GFX8-GISEL-NEXT:    v_add_u32_e32 v3, vcc, 1, v53041; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v03042; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23043; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v33044; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v13045; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43046; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v2, v13047; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]3048;3049; GFX900-SDAG-LABEL: clpeak_imad_pat_v2i32:3050; GFX900-SDAG:       ; %bb.0: ; %entry3051; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3052; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v03053; GFX900-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v23054; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v13055; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v33056; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v4, v03057; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23058; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v5, v13059; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v33060; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v0, v4, v[0:1]3061; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v5, v[2:3]3062; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v3, v0, v[3:4]3063; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v4, v2, v[4:5]3064; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]3065;3066; GFX900-GISEL-LABEL: clpeak_imad_pat_v2i32:3067; GFX900-GISEL:       ; %bb.0: ; %entry3068; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3069; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v03070; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v13071; GFX900-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23072; GFX900-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33073; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v4, v03074; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, v5, v13075; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23076; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33077; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v43078; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, 1, v53079; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v23080; GFX900-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v33081; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v03082; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v13083; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v03084; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v13085; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]3086;3087; GFX90A-SDAG-LABEL: clpeak_imad_pat_v2i32:3088; GFX90A-SDAG:       ; %bb.0: ; %entry3089; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3090; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v13091; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v03092; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v23093; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v33094; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v4, v13095; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v6, v03096; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23097; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v33098; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v4, v[2:3]3099; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v0, v6, v[0:1]3100; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v6, v0, v[6:7]3101; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v2, v[4:5]3102; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v1, v23103; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]3104;3105; GFX90A-GISEL-LABEL: clpeak_imad_pat_v2i32:3106; GFX90A-GISEL:       ; %bb.0: ; %entry3107; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3108; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v03109; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v13110; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23111; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33112; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v4, v03113; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v5, v13114; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23115; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33116; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v43117; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, 1, v53118; GFX90A-GISEL-NEXT:    v_add_u32_e32 v4, 1, v03119; GFX90A-GISEL-NEXT:    v_add_u32_e32 v5, 1, v13120; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23121; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33122; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43123; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v53124; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]3125;3126; GFX10-SDAG-LABEL: clpeak_imad_pat_v2i32:3127; GFX10-SDAG:       ; %bb.0: ; %entry3128; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3129; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03130; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13131; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v23132; GFX10-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v33133; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v4, v03134; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v13135; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23136; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v33137; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v0, v4, v[0:1]3138; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[4:5], null, v2, v5, v[2:3]3139; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v0, v[3:4]3140; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v4, v2, v[4:5]3141; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]3142;3143; GFX10-GISEL-LABEL: clpeak_imad_pat_v2i32:3144; GFX10-GISEL:       ; %bb.0: ; %entry3145; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3146; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03147; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13148; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23149; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33150; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v03151; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v13152; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23153; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33154; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v43155; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v53156; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v23157; GFX10-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v33158; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03159; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13160; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v03161; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v13162; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]3163;3164; GFX11-SDAG-LABEL: clpeak_imad_pat_v2i32:3165; GFX11-SDAG:       ; %bb.0: ; %entry3166; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3167; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03168; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13169; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3170; GFX11-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v23171; GFX11-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v33172; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3173; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v6, v03174; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v7, v13175; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3176; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v23177; GFX11-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v33178; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3179; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[4:5], null, v2, v6, v[2:3]3180; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v3, v7, v[3:4]3181; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)3182; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v2, v[4:5]3183; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v5, v3, v[5:6]3184; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]3185;3186; GFX11-GISEL-LABEL: clpeak_imad_pat_v2i32:3187; GFX11-GISEL:       ; %bb.0: ; %entry3188; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3189; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03190; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13191; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3192; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23193; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33194; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3195; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v03196; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v13197; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3198; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23199; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33200; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v43201; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v53202; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3203; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v23204; GFX11-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v33205; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03206; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13207; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3208; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v03209; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v13210; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]3211;3212; GFX1200-SDAG-LABEL: clpeak_imad_pat_v2i32:3213; GFX1200-SDAG:       ; %bb.0: ; %entry3214; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x03215; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x03216; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x03217; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x03218; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x03219; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03220; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13221; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3222; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v23223; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v33224; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3225; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v4, v03226; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v13227; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3228; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23229; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v33230; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3231; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[3:4], null, v0, v4, v[0:1]3232; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[4:5], null, v2, v5, v[2:3]3233; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)3234; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v3, v0, v[3:4]3235; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v4, v2, v[4:5]3236; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]3237;3238; GFX1200-GISEL-LABEL: clpeak_imad_pat_v2i32:3239; GFX1200-GISEL:       ; %bb.0: ; %entry3240; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x03241; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x03242; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x03243; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x03244; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x03245; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03246; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13247; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3248; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23249; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33250; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3251; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v03252; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v13253; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3254; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23255; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33256; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v43257; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v53258; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3259; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v23260; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v33261; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03262; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13263; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3264; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v03265; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v13266; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]3267;3268; GFX1250-SDAG-LABEL: clpeak_imad_pat_v2i32:3269; GFX1250-SDAG:       ; %bb.0: ; %entry3270; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x03271; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x03272; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v13273; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)3274; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v23275; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v33276; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3277; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, v4, v0 :: v_dual_add_nc_u32 v1, v5, v13278; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v23279; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3280; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v33281; GFX1250-SDAG-NEXT:    v_mad_u32 v2, v0, v4, v03282; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3283; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v1, v5, v13284; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v2, v0, v23285; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)3286; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v3, v1, v33287; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]3288;3289; GFX1250-GISEL-LABEL: clpeak_imad_pat_v2i32:3290; GFX1250-GISEL:       ; %bb.0: ; %entry3291; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x03292; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x03293; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v13294; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)3295; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v23296; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v33297; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3298; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, v4, v0 :: v_dual_add_nc_u32 v1, v5, v13299; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v23300; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)3301; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v33302; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v53303; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v23304; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)3305; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v33306; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v13307; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v03308; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)3309; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v13310; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]3311entry:3312  %y18 = add <2 x i32> %x, <i32 1, i32 1>3313  %add = mul <2 x i32> %y18, %y3314  %mul119 = add <2 x i32> %add, %y183315  %add2 = mul <2 x i32> %mul119, %y3316  %add220 = add <2 x i32> %add, <i32 1, i32 1>3317  %add422 = add <2 x i32> %add2, <i32 1, i32 1>3318  %mul521 = mul <2 x i32> %add2, %add2203319  %add6 = mul <2 x i32> %mul521, %add4223320  ret <2 x i32> %add63321}3322 3323define <3 x i32> @clpeak_imad_pat_v3i32(<3 x i32> %x, <3 x i32> %y) {3324; GFX67-SDAG-LABEL: clpeak_imad_pat_v3i32:3325; GFX67-SDAG:       ; %bb.0: ; %entry3326; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3327; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v23328; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v13329; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v03330; GFX67-SDAG-NEXT:    v_mul_lo_u32 v6, v2, v53331; GFX67-SDAG-NEXT:    v_mul_lo_u32 v7, v0, v33332; GFX67-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v43333; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v6, v23334; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v7, v03335; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v8, v13336; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v53337; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33338; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v43339; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v2, v63340; GFX67-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v73341; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v83342; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v23343; GFX67-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v4, v03344; GFX67-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v5, v13345; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v4, v03346; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v5, v13347; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v23348; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v43349; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v53350; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v33351; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]3352;3353; GFX67-GISEL-LABEL: clpeak_imad_pat_v3i32:3354; GFX67-GISEL:       ; %bb.0: ; %entry3355; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3356; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v03357; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v13358; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v23359; GFX67-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33360; GFX67-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43361; GFX67-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53362; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v6, v03363; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v7, v13364; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v8, v23365; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33366; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43367; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53368; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v63369; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v73370; GFX67-GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v83371; GFX67-GISEL-NEXT:    v_add_i32_e32 v6, vcc, 1, v03372; GFX67-GISEL-NEXT:    v_add_i32_e32 v7, vcc, 1, v13373; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33374; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43375; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v2, v53376; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v23377; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v63378; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v73379; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v3, v23380; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]3381;3382; GFX8-SDAG-LABEL: clpeak_imad_pat_v3i32:3383; GFX8-SDAG:       ; %bb.0: ; %entry3384; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3385; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, 1, v23386; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v13387; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v03388; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v2, v53389; GFX8-SDAG-NEXT:    v_mul_lo_u32 v7, v0, v33390; GFX8-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v43391; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v6, v23392; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v7, v03393; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v8, v13394; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v53395; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33396; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v43397; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v2, v63398; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v73399; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v83400; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v23401; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v4, v03402; GFX8-SDAG-NEXT:    v_add_u32_e32 v5, vcc, v5, v13403; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v4, v03404; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v5, v13405; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v23406; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v43407; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v53408; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v2, v33409; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]3410;3411; GFX8-GISEL-LABEL: clpeak_imad_pat_v3i32:3412; GFX8-GISEL:       ; %bb.0: ; %entry3413; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3414; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v03415; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v13416; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v23417; GFX8-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33418; GFX8-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43419; GFX8-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53420; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v6, v03421; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v7, v13422; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, v8, v23423; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33424; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43425; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53426; GFX8-GISEL-NEXT:    v_add_u32_e32 v3, vcc, 1, v63427; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v73428; GFX8-GISEL-NEXT:    v_add_u32_e32 v5, vcc, 1, v83429; GFX8-GISEL-NEXT:    v_add_u32_e32 v6, vcc, 1, v03430; GFX8-GISEL-NEXT:    v_add_u32_e32 v7, vcc, 1, v13431; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33432; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43433; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v2, v53434; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v23435; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v63436; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v73437; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v3, v23438; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]3439;3440; GFX900-SDAG-LABEL: clpeak_imad_pat_v3i32:3441; GFX900-SDAG:       ; %bb.0: ; %entry3442; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3443; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, 1, v23444; GFX900-SDAG-NEXT:    v_mul_lo_u32 v6, v2, v53445; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v03446; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v13447; GFX900-SDAG-NEXT:    v_mul_lo_u32 v7, v0, v33448; GFX900-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v43449; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, v6, v23450; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v53451; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v7, v03452; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v8, v13453; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33454; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v43455; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v5, v6, v[5:6]3456; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v0, v7, v[0:1]3457; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v2, v8, v[2:3]3458; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v6, v0, v[6:7]3459; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v7, v2, v[7:8]3460; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v3, v5, v[3:4]3461; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]3462;3463; GFX900-GISEL-LABEL: clpeak_imad_pat_v3i32:3464; GFX900-GISEL:       ; %bb.0: ; %entry3465; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3466; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v03467; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v13468; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v23469; GFX900-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33470; GFX900-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43471; GFX900-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53472; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v6, v03473; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, v7, v13474; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, v8, v23475; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33476; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43477; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53478; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, 1, v63479; GFX900-GISEL-NEXT:    v_add_u32_e32 v4, 1, v73480; GFX900-GISEL-NEXT:    v_add_u32_e32 v5, 1, v83481; GFX900-GISEL-NEXT:    v_add_u32_e32 v6, 1, v03482; GFX900-GISEL-NEXT:    v_add_u32_e32 v7, 1, v13483; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33484; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43485; GFX900-GISEL-NEXT:    v_mul_lo_u32 v3, v2, v53486; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v23487; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v63488; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v73489; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v3, v23490; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]3491;3492; GFX90A-SDAG-LABEL: clpeak_imad_pat_v3i32:3493; GFX90A-SDAG:       ; %bb.0: ; %entry3494; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3495; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v13496; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v03497; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, 1, v23498; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v10, v0, v33499; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v43500; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v2, v53501; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v8, v13502; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v10, v03503; GFX90A-SDAG-NEXT:    v_add_u32_e32 v7, v6, v23504; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33505; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v43506; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v7, v53507; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v2, v8, v[2:3]3508; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v0, v10, v[0:1]3509; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v4, v6, v[4:5]3510; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v10, v0, v[10:11]3511; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v8, v2, v[8:9]3512; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, v4, v[6:7]3513; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v1, v83514; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]3515;3516; GFX90A-GISEL-LABEL: clpeak_imad_pat_v3i32:3517; GFX90A-GISEL:       ; %bb.0: ; %entry3518; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3519; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v03520; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v13521; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v23522; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33523; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43524; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53525; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v6, v03526; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v7, v13527; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, v8, v23528; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33529; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43530; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53531; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, 1, v63532; GFX90A-GISEL-NEXT:    v_add_u32_e32 v4, 1, v73533; GFX90A-GISEL-NEXT:    v_add_u32_e32 v5, 1, v83534; GFX90A-GISEL-NEXT:    v_add_u32_e32 v6, 1, v03535; GFX90A-GISEL-NEXT:    v_add_u32_e32 v7, 1, v13536; GFX90A-GISEL-NEXT:    v_add_u32_e32 v8, 1, v23537; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33538; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43539; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53540; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v63541; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v73542; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v83543; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]3544;3545; GFX10-SDAG-LABEL: clpeak_imad_pat_v3i32:3546; GFX10-SDAG:       ; %bb.0: ; %entry3547; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3548; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03549; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13550; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v23551; GFX10-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v33552; GFX10-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v43553; GFX10-SDAG-NEXT:    v_mul_lo_u32 v8, v2, v53554; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v6, v03555; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v7, v13556; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v9, v8, v23557; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33558; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v43559; GFX10-SDAG-NEXT:    v_mul_lo_u32 v3, v9, v53560; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[4:5], null, v0, v6, v[0:1]3561; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v2, v7, v[2:3]3562; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[6:7], null, v3, v8, v[3:4]3563; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v0, v[4:5]3564; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v5, v2, v[5:6]3565; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v6, v3, v[6:7]3566; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]3567;3568; GFX10-GISEL-LABEL: clpeak_imad_pat_v3i32:3569; GFX10-GISEL:       ; %bb.0: ; %entry3570; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3571; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03572; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13573; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23574; GFX10-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33575; GFX10-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43576; GFX10-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53577; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v6, v03578; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v7, v13579; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, v8, v23580; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33581; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43582; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53583; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v63584; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v73585; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v83586; GFX10-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v33587; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v43588; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v53589; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03590; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13591; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23592; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v3, v03593; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v13594; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v23595; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]3596;3597; GFX11-SDAG-LABEL: clpeak_imad_pat_v3i32:3598; GFX11-SDAG:       ; %bb.0: ; %entry3599; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3600; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03601; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13602; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v23603; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3604; GFX11-SDAG-NEXT:    v_mul_lo_u32 v7, v0, v33605; GFX11-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v43606; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3607; GFX11-SDAG-NEXT:    v_mul_lo_u32 v9, v2, v53608; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v7, v03609; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3610; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v8, v13611; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v6, v9, v23612; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3613; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v33614; GFX11-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v43615; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)3616; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v6, v53617; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v2, v7, v[2:3]3618; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3619; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[6:7], null, v3, v8, v[3:4]3620; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[7:8], null, v4, v9, v[4:5]3621; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3622; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v2, v[5:6]3623; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v6, v3, v[6:7]3624; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3)3625; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v7, v4, v[7:8]3626; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]3627;3628; GFX11-GISEL-LABEL: clpeak_imad_pat_v3i32:3629; GFX11-GISEL:       ; %bb.0: ; %entry3630; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3631; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03632; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13633; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23634; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3635; GFX11-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33636; GFX11-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43637; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3638; GFX11-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53639; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v6, v03640; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3641; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v7, v13642; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, v8, v23643; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3644; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33645; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43646; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)3647; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53648; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v63649; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v73650; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v83651; GFX11-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v33652; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3653; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v43654; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v53655; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03656; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13657; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23658; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3659; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v3, v03660; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v13661; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3)3662; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v23663; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]3664;3665; GFX1200-SDAG-LABEL: clpeak_imad_pat_v3i32:3666; GFX1200-SDAG:       ; %bb.0: ; %entry3667; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x03668; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x03669; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x03670; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x03671; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x03672; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v03673; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v13674; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v23675; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3676; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v33677; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v43678; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3679; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v8, v2, v53680; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v6, v03681; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3682; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v7, v13683; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v9, v8, v23684; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3685; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33686; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v43687; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3688; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v3, v9, v53689; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[4:5], null, v0, v6, v[0:1]3690; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3691; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[5:6], null, v2, v7, v[2:3]3692; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[6:7], null, v3, v8, v[3:4]3693; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3694; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v4, v0, v[4:5]3695; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v5, v2, v[5:6]3696; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3)3697; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[2:3], null, v6, v3, v[6:7]3698; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]3699;3700; GFX1200-GISEL-LABEL: clpeak_imad_pat_v3i32:3701; GFX1200-GISEL:       ; %bb.0: ; %entry3702; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x03703; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x03704; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x03705; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x03706; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x03707; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03708; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13709; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23710; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3711; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33712; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43713; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3714; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53715; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v6, v03716; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3717; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v7, v13718; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, v8, v23719; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3720; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33721; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43722; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)3723; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53724; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v63725; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v73726; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v83727; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v33728; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3729; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v43730; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v53731; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03732; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13733; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23734; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3735; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v3, v03736; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v13737; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3)3738; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v23739; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]3740;3741; GFX1250-SDAG-LABEL: clpeak_imad_pat_v3i32:3742; GFX1250-SDAG:       ; %bb.0: ; %entry3743; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x03744; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x03745; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v13746; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)3747; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v33748; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v23749; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v43750; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3751; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v6, v03752; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v8, v2, v53753; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3754; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, v7, v13755; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v33756; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3757; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v2, v8, v23758; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v43759; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3760; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v0, v6, v03761; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v53762; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3763; GFX1250-SDAG-NEXT:    v_mad_u32 v4, v1, v7, v13764; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v3, v0, v33765; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3766; GFX1250-SDAG-NEXT:    v_mad_u32 v5, v2, v8, v23767; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v4, v1, v43768; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)3769; GFX1250-SDAG-NEXT:    v_mad_u32 v2, v5, v2, v53770; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]3771;3772; GFX1250-GISEL-LABEL: clpeak_imad_pat_v3i32:3773; GFX1250-GISEL:       ; %bb.0: ; %entry3774; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x03775; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x03776; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v13777; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)3778; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v33779; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23780; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v7, v1, v43781; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3782; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v6, v03783; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v8, v2, v53784; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3785; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, v7, v13786; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v33787; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v63788; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3789; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v2, v8, v23790; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v43791; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v73792; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3793; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v33794; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v53795; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v83796; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v03797; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v43798; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v13799; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)3800; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v53801; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v23802; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v3, v03803; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v13804; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3)3805; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v23806; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]3807entry:3808  %y48 = add <3 x i32> %x, <i32 1, i32 1, i32 1>3809  %add = mul <3 x i32> %y48, %y3810  %mul1249 = add <3 x i32> %add, %y483811  %add15 = mul <3 x i32> %mul1249, %y3812  %add1550 = add <3 x i32> %add, <i32 1, i32 1, i32 1>3813  %add2452 = add <3 x i32> %add15, <i32 1, i32 1, i32 1>3814  %mul3051 = mul <3 x i32> %add15, %add15503815  %add33 = mul <3 x i32> %mul3051, %add24523816  ret <3 x i32> %add333817}3818 3819define <4 x i32> @clpeak_imad_pat_v4i32(<4 x i32> %x, <4 x i32> %y) {3820; GFX67-SDAG-LABEL: clpeak_imad_pat_v4i32:3821; GFX67-SDAG:       ; %bb.0: ; %entry3822; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3823; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, 1, v33824; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v23825; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v13826; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v03827; GFX67-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v43828; GFX67-SDAG-NEXT:    v_mul_lo_u32 v9, v3, v73829; GFX67-SDAG-NEXT:    v_mul_lo_u32 v10, v1, v53830; GFX67-SDAG-NEXT:    v_mul_lo_u32 v11, v2, v63831; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v8, v03832; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v9, v33833; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v11, v23834; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v10, v13835; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v3, v73836; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v63837; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v43838; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v53839; GFX67-SDAG-NEXT:    v_mul_lo_u32 v4, v3, v93840; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v113841; GFX67-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v83842; GFX67-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v103843; GFX67-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v4, v33844; GFX67-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v5, v23845; GFX67-SDAG-NEXT:    v_add_i32_e32 v6, vcc, v6, v03846; GFX67-SDAG-NEXT:    v_add_i32_e32 v7, vcc, v7, v13847; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v6, v03848; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v7, v13849; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v23850; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v4, v33851; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v63852; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v73853; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v53854; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v43855; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]3856;3857; GFX67-GISEL-LABEL: clpeak_imad_pat_v4i32:3858; GFX67-GISEL:       ; %bb.0: ; %entry3859; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3860; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v03861; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v13862; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v23863; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v33864; GFX67-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v43865; GFX67-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v53866; GFX67-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v63867; GFX67-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v73868; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v8, v03869; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v9, v13870; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v10, v23871; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, v11, v33872; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43873; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v53874; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v63875; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v73876; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v83877; GFX67-GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v93878; GFX67-GISEL-NEXT:    v_add_i32_e32 v6, vcc, 1, v103879; GFX67-GISEL-NEXT:    v_add_i32_e32 v7, vcc, 1, v113880; GFX67-GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v03881; GFX67-GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v13882; GFX67-GISEL-NEXT:    v_add_i32_e32 v10, vcc, 1, v23883; GFX67-GISEL-NEXT:    v_add_i32_e32 v11, vcc, 1, v33884; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43885; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v53886; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v63887; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v73888; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v83889; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v93890; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v103891; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v113892; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]3893;3894; GFX8-SDAG-LABEL: clpeak_imad_pat_v4i32:3895; GFX8-SDAG:       ; %bb.0: ; %entry3896; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3897; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, 1, v33898; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, 1, v23899; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v13900; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v03901; GFX8-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v43902; GFX8-SDAG-NEXT:    v_mul_lo_u32 v9, v3, v73903; GFX8-SDAG-NEXT:    v_mul_lo_u32 v10, v1, v53904; GFX8-SDAG-NEXT:    v_mul_lo_u32 v11, v2, v63905; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v8, v03906; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v9, v33907; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v11, v23908; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v10, v13909; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v3, v73910; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v63911; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v43912; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v53913; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v3, v93914; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v113915; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v83916; GFX8-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v103917; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v4, v33918; GFX8-SDAG-NEXT:    v_add_u32_e32 v5, vcc, v5, v23919; GFX8-SDAG-NEXT:    v_add_u32_e32 v6, vcc, v6, v03920; GFX8-SDAG-NEXT:    v_add_u32_e32 v7, vcc, v7, v13921; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v6, v03922; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v7, v13923; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v23924; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v4, v33925; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v63926; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v73927; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v2, v53928; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v43929; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]3930;3931; GFX8-GISEL-LABEL: clpeak_imad_pat_v4i32:3932; GFX8-GISEL:       ; %bb.0: ; %entry3933; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3934; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v03935; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v13936; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v23937; GFX8-GISEL-NEXT:    v_add_u32_e32 v3, vcc, 1, v33938; GFX8-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v43939; GFX8-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v53940; GFX8-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v63941; GFX8-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v73942; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v8, v03943; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v9, v13944; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, v10, v23945; GFX8-GISEL-NEXT:    v_add_u32_e32 v3, vcc, v11, v33946; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43947; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v53948; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v63949; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v73950; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v83951; GFX8-GISEL-NEXT:    v_add_u32_e32 v5, vcc, 1, v93952; GFX8-GISEL-NEXT:    v_add_u32_e32 v6, vcc, 1, v103953; GFX8-GISEL-NEXT:    v_add_u32_e32 v7, vcc, 1, v113954; GFX8-GISEL-NEXT:    v_add_u32_e32 v8, vcc, 1, v03955; GFX8-GISEL-NEXT:    v_add_u32_e32 v9, vcc, 1, v13956; GFX8-GISEL-NEXT:    v_add_u32_e32 v10, vcc, 1, v23957; GFX8-GISEL-NEXT:    v_add_u32_e32 v11, vcc, 1, v33958; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v43959; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v53960; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v63961; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v73962; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v83963; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v93964; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v103965; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v113966; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]3967;3968; GFX900-SDAG-LABEL: clpeak_imad_pat_v4i32:3969; GFX900-SDAG:       ; %bb.0: ; %entry3970; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3971; GFX900-SDAG-NEXT:    v_add_u32_e32 v3, 1, v33972; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v03973; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, 1, v23974; GFX900-SDAG-NEXT:    v_mul_lo_u32 v8, v3, v73975; GFX900-SDAG-NEXT:    v_mul_lo_u32 v11, v0, v43976; GFX900-SDAG-NEXT:    v_mul_lo_u32 v9, v2, v63977; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v13978; GFX900-SDAG-NEXT:    v_mul_lo_u32 v10, v1, v53979; GFX900-SDAG-NEXT:    v_add_u32_e32 v3, v8, v33980; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v11, v03981; GFX900-SDAG-NEXT:    v_add_u32_e32 v12, v9, v23982; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v43983; GFX900-SDAG-NEXT:    v_mul_lo_u32 v4, v3, v73984; GFX900-SDAG-NEXT:    v_mul_lo_u32 v3, v12, v63985; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v10, v13986; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v53987; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v4, v8, v[4:5]3988; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v3, v9, v[3:4]3989; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v0, v11, v[0:1]3990; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v2, v10, v[2:3]3991; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v7, v0, v[7:8]3992; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v8, v2, v[8:9]3993; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, v3, v[6:7]3994; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v5, v4, v[5:6]3995; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]3996;3997; GFX9-GISEL-LABEL: clpeak_imad_pat_v4i32:3998; GFX9-GISEL:       ; %bb.0: ; %entry3999; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4000; GFX9-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04001; GFX9-GISEL-NEXT:    v_add_u32_e32 v1, 1, v14002; GFX9-GISEL-NEXT:    v_add_u32_e32 v2, 1, v24003; GFX9-GISEL-NEXT:    v_add_u32_e32 v3, 1, v34004; GFX9-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v44005; GFX9-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v54006; GFX9-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v64007; GFX9-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v74008; GFX9-GISEL-NEXT:    v_add_u32_e32 v0, v8, v04009; GFX9-GISEL-NEXT:    v_add_u32_e32 v1, v9, v14010; GFX9-GISEL-NEXT:    v_add_u32_e32 v2, v10, v24011; GFX9-GISEL-NEXT:    v_add_u32_e32 v3, v11, v34012; GFX9-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44013; GFX9-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54014; GFX9-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64015; GFX9-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74016; GFX9-GISEL-NEXT:    v_add_u32_e32 v4, 1, v84017; GFX9-GISEL-NEXT:    v_add_u32_e32 v5, 1, v94018; GFX9-GISEL-NEXT:    v_add_u32_e32 v6, 1, v104019; GFX9-GISEL-NEXT:    v_add_u32_e32 v7, 1, v114020; GFX9-GISEL-NEXT:    v_add_u32_e32 v8, 1, v04021; GFX9-GISEL-NEXT:    v_add_u32_e32 v9, 1, v14022; GFX9-GISEL-NEXT:    v_add_u32_e32 v10, 1, v24023; GFX9-GISEL-NEXT:    v_add_u32_e32 v11, 1, v34024; GFX9-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44025; GFX9-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54026; GFX9-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64027; GFX9-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74028; GFX9-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v84029; GFX9-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v94030; GFX9-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v104031; GFX9-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v114032; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]4033;4034; GFX90A-SDAG-LABEL: clpeak_imad_pat_v4i32:4035; GFX90A-SDAG:       ; %bb.0: ; %entry4036; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4037; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, 1, v34038; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, 1, v24039; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v14040; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v04041; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v14, v0, v44042; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v12, v1, v54043; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v64044; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v8, v3, v74045; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, v8, v34046; GFX90A-SDAG-NEXT:    v_add_u32_e32 v9, v10, v24047; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v12, v14048; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v14, v04049; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v44050; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v54051; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v9, v64052; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v3, v74053; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v6, v8, v[6:7]4054; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v4, v10, v[4:5]4055; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[12:13], s[4:5], v2, v12, v[2:3]4056; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[14:15], s[4:5], v0, v14, v[0:1]4057; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v14, v0, v[14:15]4058; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[12:13], s[4:5], v12, v2, v[12:13]4059; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v10, v4, v[10:11]4060; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v6, v[8:9]4061; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v1, v124062; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v3, v44063; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]4064;4065; GFX10-SDAG-LABEL: clpeak_imad_pat_v4i32:4066; GFX10-SDAG:       ; %bb.0: ; %entry4067; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4068; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04069; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v14070; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v24071; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v34072; GFX10-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v44073; GFX10-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v54074; GFX10-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v64075; GFX10-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v74076; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v8, v04077; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v9, v14078; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v12, v10, v24079; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v44080; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v4, v11, v34081; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v54082; GFX10-SDAG-NEXT:    v_mul_lo_u32 v3, v12, v64083; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v4, v74084; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v0, v8, v[0:1]4085; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[6:7], null, v2, v9, v[2:3]4086; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[7:8], null, v3, v10, v[3:4]4087; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[8:9], null, v4, v11, v[4:5]4088; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v0, v[5:6]4089; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v6, v2, v[6:7]4090; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v7, v3, v[7:8]4091; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v8, v4, v[8:9]4092; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]4093;4094; GFX10-GISEL-LABEL: clpeak_imad_pat_v4i32:4095; GFX10-GISEL:       ; %bb.0: ; %entry4096; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4097; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04098; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14099; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24100; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34101; GFX10-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v44102; GFX10-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v54103; GFX10-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v64104; GFX10-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v74105; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v8, v04106; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v9, v14107; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, v10, v24108; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, v11, v34109; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44110; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54111; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64112; GFX10-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74113; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v84114; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v94115; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v6, 1, v104116; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v7, 1, v114117; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v8, 1, v04118; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44119; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v54120; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v64121; GFX10-GISEL-NEXT:    v_mul_lo_u32 v6, v3, v74122; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14123; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24124; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34125; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v84126; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v14127; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v24128; GFX10-GISEL-NEXT:    v_mul_lo_u32 v3, v6, v34129; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]4130;4131; GFX11-SDAG-LABEL: clpeak_imad_pat_v4i32:4132; GFX11-SDAG:       ; %bb.0: ; %entry4133; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4134; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04135; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v14136; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v24137; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v34138; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4139; GFX11-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v44140; GFX11-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v54141; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4142; GFX11-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v64143; GFX11-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v74144; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4145; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v8, v04146; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v9, v14147; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)4148; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v12, v10, v24149; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v44150; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v11, v34151; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4152; GFX11-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v54153; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v12, v64154; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4155; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v74156; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[6:7], null, v2, v8, v[2:3]4157; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4158; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[7:8], null, v3, v9, v[3:4]4159; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[8:9], null, v4, v10, v[4:5]4160; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4161; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[9:10], null, v5, v11, v[5:6]4162; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v6, v2, v[6:7]4163; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4164; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v7, v3, v[7:8]4165; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v8, v4, v[8:9]4166; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4)4167; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v9, v5, v[9:10]4168; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]4169;4170; GFX11-GISEL-LABEL: clpeak_imad_pat_v4i32:4171; GFX11-GISEL:       ; %bb.0: ; %entry4172; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4173; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04174; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14175; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24176; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34177; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4178; GFX11-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v44179; GFX11-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v54180; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4181; GFX11-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v64182; GFX11-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v74183; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4184; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v8, v04185; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v9, v14186; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4187; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, v10, v24188; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, v11, v34189; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4190; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44191; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54192; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4193; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64194; GFX11-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74195; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v84196; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v94197; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v6, 1, v104198; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v7, 1, v114199; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v8, 1, v04200; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44201; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v54202; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v64203; GFX11-GISEL-NEXT:    v_mul_lo_u32 v6, v3, v74204; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14205; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24206; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34207; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v84208; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4209; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v14210; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v24211; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4)4212; GFX11-GISEL-NEXT:    v_mul_lo_u32 v3, v6, v34213; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]4214;4215; GFX1200-SDAG-LABEL: clpeak_imad_pat_v4i32:4216; GFX1200-SDAG:       ; %bb.0: ; %entry4217; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04218; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x04219; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x04220; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x04221; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x04222; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04223; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v14224; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v24225; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v34226; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4227; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v44228; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v54229; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4230; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v64231; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v74232; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4233; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v8, v04234; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v9, v14235; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)4236; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v12, v10, v24237; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v44238; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v4, v11, v34239; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4240; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v54241; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v3, v12, v64242; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)4243; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v4, v74244; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[5:6], null, v0, v8, v[0:1]4245; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[6:7], null, v2, v9, v[2:3]4246; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4247; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[7:8], null, v3, v10, v[3:4]4248; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[8:9], null, v4, v11, v[4:5]4249; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)4250; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v5, v0, v[5:6]4251; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v6, v2, v[6:7]4252; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4253; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[2:3], null, v7, v3, v[7:8]4254; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[3:4], null, v8, v4, v[8:9]4255; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]4256;4257; GFX1200-GISEL-LABEL: clpeak_imad_pat_v4i32:4258; GFX1200-GISEL:       ; %bb.0: ; %entry4259; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04260; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x04261; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x04262; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x04263; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x04264; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04265; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14266; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24267; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34268; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4269; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v44270; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v54271; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4272; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v64273; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v74274; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4275; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v8, v04276; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v9, v14277; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4278; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, v10, v24279; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, v11, v34280; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4281; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44282; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54283; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4284; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64285; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74286; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v4, 1, v84287; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v5, 1, v94288; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v6, 1, v104289; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v7, 1, v114290; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v8, 1, v04291; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44292; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v54293; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v2, v64294; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v6, v3, v74295; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v14296; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v24297; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v34298; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v84299; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4300; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v14301; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v24302; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4)4303; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v3, v6, v34304; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]4305;4306; GFX1250-SDAG-LABEL: clpeak_imad_pat_v4i32:4307; GFX1250-SDAG:       ; %bb.0: ; %entry4308; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04309; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x04310; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v14311; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, 1, v2 :: v_dual_add_nc_u32 v3, 1, v34312; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4313; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v44314; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v54315; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4316; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v64317; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v74318; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)4319; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, v8, v0 :: v_dual_add_nc_u32 v1, v9, v14320; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, v10, v2 :: v_dual_add_nc_u32 v3, v11, v34321; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4322; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v44323; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v54324; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4325; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v64326; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v3, v3, v74327; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4328; GFX1250-SDAG-NEXT:    v_mad_u32 v4, v0, v8, v04329; GFX1250-SDAG-NEXT:    v_mad_u32 v5, v1, v9, v14330; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4331; GFX1250-SDAG-NEXT:    v_mad_u32 v6, v2, v10, v24332; GFX1250-SDAG-NEXT:    v_mad_u32 v7, v3, v11, v34333; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4334; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v4, v0, v44335; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v5, v1, v54336; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)4337; GFX1250-SDAG-NEXT:    v_mad_u32 v2, v6, v2, v64338; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v7, v3, v74339; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]4340;4341; GFX1250-GISEL-LABEL: clpeak_imad_pat_v4i32:4342; GFX1250-GISEL:       ; %bb.0: ; %entry4343; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04344; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x04345; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v14346; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v2 :: v_dual_add_nc_u32 v3, 1, v34347; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4348; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v8, v0, v44349; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v9, v1, v54350; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4351; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v10, v2, v64352; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v11, v3, v74353; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)4354; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, v8, v0 :: v_dual_add_nc_u32 v1, v9, v14355; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, v10, v2 :: v_dual_add_nc_u32 v3, v11, v34356; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4357; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v44358; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v54359; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4360; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v2, v64361; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v3, v3, v74362; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v4, 1, v8 :: v_dual_add_nc_u32 v5, 1, v94363; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v6, 1, v10 :: v_dual_add_nc_u32 v7, 1, v114364; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4365; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v44366; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v54367; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4368; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v6, v2, v64369; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v7, v3, v74370; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v14371; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v2 :: v_dual_add_nc_u32 v3, 1, v34372; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)4373; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v4, v04374; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v5, v14375; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)4376; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v6, v24377; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v3, v7, v34378; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]4379entry:4380  %y18 = add <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>4381  %add = mul <4 x i32> %y18, %y4382  %mul119 = add <4 x i32> %add, %y184383  %add2 = mul <4 x i32> %mul119, %y4384  %add220 = add <4 x i32> %add, <i32 1, i32 1, i32 1, i32 1>4385  %add422 = add <4 x i32> %add2, <i32 1, i32 1, i32 1, i32 1>4386  %mul521 = mul <4 x i32> %add2, %add2204387  %add6 = mul <4 x i32> %mul521, %add4224388  ret <4 x i32> %add64389}4390 4391define i32 @clpeak_imad_pat_i24(i32 %x, i32 %y) {4392; GFX67-SDAG-LABEL: clpeak_imad_pat_i24:4393; GFX67-SDAG:       ; %bb.0: ; %entry4394; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4395; GFX67-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244396; GFX67-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244397; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v04398; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04399; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v04400; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14401; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v24402; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v04403; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v04404; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v14405; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]4406;4407; GFX67-GISEL-LABEL: clpeak_imad_pat_i24:4408; GFX67-GISEL:       ; %bb.0: ; %entry4409; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4410; GFX67-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244411; GFX67-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244412; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v04413; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04414; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v04415; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14416; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v24417; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14418; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v04419; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04420; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]4421;4422; GFX8-SDAG-LABEL: clpeak_imad_pat_i24:4423; GFX8-SDAG:       ; %bb.0: ; %entry4424; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4425; GFX8-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244426; GFX8-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244427; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v04428; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04429; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v2, v04430; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14431; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v24432; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v04433; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v04434; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v14435; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]4436;4437; GFX8-GISEL-LABEL: clpeak_imad_pat_i24:4438; GFX8-GISEL:       ; %bb.0: ; %entry4439; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4440; GFX8-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244441; GFX8-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244442; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v04443; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04444; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v2, v04445; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14446; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v24447; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14448; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v04449; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04450; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]4451;4452; GFX900-SDAG-LABEL: clpeak_imad_pat_i24:4453; GFX900-SDAG:       ; %bb.0: ; %entry4454; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4455; GFX900-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244456; GFX900-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244457; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v04458; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04459; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v04460; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14461; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v0, v2, v[0:1]4462; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v1, v0, v[1:2]4463; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]4464;4465; GFX900-GISEL-LABEL: clpeak_imad_pat_i24:4466; GFX900-GISEL:       ; %bb.0: ; %entry4467; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4468; GFX900-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244469; GFX900-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244470; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04471; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04472; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v04473; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14474; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v24475; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14476; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04477; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04478; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]4479;4480; GFX90A-SDAG-LABEL: clpeak_imad_pat_i24:4481; GFX90A-SDAG:       ; %bb.0: ; %entry4482; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4483; GFX90A-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244484; GFX90A-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244485; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v04486; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04487; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v04488; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14489; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v2, v[0:1]4490; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v0, v[2:3]4491; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]4492;4493; GFX90A-GISEL-LABEL: clpeak_imad_pat_i24:4494; GFX90A-GISEL:       ; %bb.0: ; %entry4495; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4496; GFX90A-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244497; GFX90A-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244498; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04499; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04500; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v2, v04501; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14502; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v24503; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v04504; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14505; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v24506; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]4507;4508; GFX10-SDAG-LABEL: clpeak_imad_pat_i24:4509; GFX10-SDAG:       ; %bb.0: ; %entry4510; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4511; GFX10-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244512; GFX10-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244513; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04514; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04515; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04516; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14517; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v0, v2, v[0:1]4518; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v1, v0, v[1:2]4519; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]4520;4521; GFX10-GISEL-LABEL: clpeak_imad_pat_i24:4522; GFX10-GISEL:       ; %bb.0: ; %entry4523; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4524; GFX10-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244525; GFX10-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244526; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04527; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04528; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04529; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14530; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24531; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14532; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04533; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04534; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]4535;4536; GFX11-SDAG-LABEL: clpeak_imad_pat_i24:4537; GFX11-SDAG:       ; %bb.0: ; %entry4538; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4539; GFX11-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244540; GFX11-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244541; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4542; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04543; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v04544; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4545; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v5, v04546; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v14547; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4548; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v2, v5, v[2:3]4549; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v2, v[3:4]4550; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]4551;4552; GFX11-GISEL-LABEL: clpeak_imad_pat_i24:4553; GFX11-GISEL:       ; %bb.0: ; %entry4554; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4555; GFX11-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244556; GFX11-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244557; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4558; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04559; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04560; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4561; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04562; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14563; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24564; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4565; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14566; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04567; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04568; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]4569;4570; GFX1200-SDAG-LABEL: clpeak_imad_pat_i24:4571; GFX1200-SDAG:       ; %bb.0: ; %entry4572; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04573; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x04574; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x04575; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x04576; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x04577; GFX1200-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244578; GFX1200-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244579; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4580; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04581; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04582; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4583; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04584; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14585; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4586; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v0, v2, v[0:1]4587; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v1, v0, v[1:2]4588; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]4589;4590; GFX1200-GISEL-LABEL: clpeak_imad_pat_i24:4591; GFX1200-GISEL:       ; %bb.0: ; %entry4592; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04593; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x04594; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x04595; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x04596; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x04597; GFX1200-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244598; GFX1200-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244599; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4600; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04601; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04602; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4603; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04604; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14605; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24606; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4607; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14608; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04609; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04610; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]4611;4612; GFX1250-SDAG-LABEL: clpeak_imad_pat_i24:4613; GFX1250-SDAG:       ; %bb.0: ; %entry4614; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04615; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x04616; GFX1250-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 244617; GFX1250-SDAG-NEXT:    v_bfe_i32 v1, v1, 0, 244618; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4619; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04620; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04621; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4622; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04623; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14624; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4625; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v0, v2, v04626; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v1, v0, v14627; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]4628;4629; GFX1250-GISEL-LABEL: clpeak_imad_pat_i24:4630; GFX1250-GISEL:       ; %bb.0: ; %entry4631; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04632; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x04633; GFX1250-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 244634; GFX1250-GISEL-NEXT:    v_bfe_i32 v1, v1, 0, 244635; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4636; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04637; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04638; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4639; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04640; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14641; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24642; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4643; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14644; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04645; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04646; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]4647entry:4648  %shl = shl i32 %x, 84649  %shr = ashr exact i32 %shl, 84650  %shl1 = shl i32 %y, 84651  %shr2 = ashr exact i32 %shl1, 84652  %shr222 = add nsw i32 %shr, 14653  %add = mul i32 %shr2, %shr2224654  %mul323 = add i32 %add, %shr2224655  %add4 = mul i32 %mul323, %shr24656  %add424 = add i32 %add, 14657  %add626 = add i32 %add4, 14658  %mul725 = mul i32 %add4, %add4244659  %add8 = mul i32 %mul725, %add6264660  ret i32 %add84661}4662 4663define i32 @clpeak_imad_pat_u24(i32 %x, i32 %y) {4664; GFX67-SDAG-LABEL: clpeak_imad_pat_u24:4665; GFX67-SDAG:       ; %bb.0: ; %entry4666; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4667; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04668; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14669; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v04670; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04671; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v04672; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14673; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v24674; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v04675; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v04676; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v14677; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]4678;4679; GFX67-GISEL-LABEL: clpeak_imad_pat_u24:4680; GFX67-GISEL:       ; %bb.0: ; %entry4681; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4682; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04683; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14684; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v04685; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04686; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v04687; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14688; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v24689; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14690; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v04691; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04692; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]4693;4694; GFX8-SDAG-LABEL: clpeak_imad_pat_u24:4695; GFX8-SDAG:       ; %bb.0: ; %entry4696; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4697; GFX8-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04698; GFX8-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14699; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v04700; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04701; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v2, v04702; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14703; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v24704; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v04705; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v04706; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v14707; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]4708;4709; GFX8-GISEL-LABEL: clpeak_imad_pat_u24:4710; GFX8-GISEL:       ; %bb.0: ; %entry4711; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4712; GFX8-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04713; GFX8-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14714; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v04715; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04716; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v2, v04717; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14718; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v24719; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14720; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v04721; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04722; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]4723;4724; GFX900-SDAG-LABEL: clpeak_imad_pat_u24:4725; GFX900-SDAG:       ; %bb.0: ; %entry4726; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4727; GFX900-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04728; GFX900-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14729; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v04730; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04731; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v04732; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14733; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v0, v2, v[0:1]4734; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v1, v0, v[1:2]4735; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]4736;4737; GFX900-GISEL-LABEL: clpeak_imad_pat_u24:4738; GFX900-GISEL:       ; %bb.0: ; %entry4739; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4740; GFX900-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04741; GFX900-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14742; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04743; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04744; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v04745; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14746; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v24747; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14748; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04749; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04750; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]4751;4752; GFX90A-SDAG-LABEL: clpeak_imad_pat_u24:4753; GFX90A-SDAG:       ; %bb.0: ; %entry4754; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4755; GFX90A-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04756; GFX90A-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14757; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v04758; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04759; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v04760; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14761; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v2, v[0:1]4762; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v0, v[2:3]4763; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]4764;4765; GFX90A-GISEL-LABEL: clpeak_imad_pat_u24:4766; GFX90A-GISEL:       ; %bb.0: ; %entry4767; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4768; GFX90A-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04769; GFX90A-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14770; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v04771; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04772; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v2, v04773; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14774; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v24775; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v04776; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14777; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v24778; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]4779;4780; GFX10-SDAG-LABEL: clpeak_imad_pat_u24:4781; GFX10-SDAG:       ; %bb.0: ; %entry4782; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4783; GFX10-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04784; GFX10-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14785; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04786; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04787; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04788; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14789; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v0, v2, v[0:1]4790; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v1, v0, v[1:2]4791; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]4792;4793; GFX10-GISEL-LABEL: clpeak_imad_pat_u24:4794; GFX10-GISEL:       ; %bb.0: ; %entry4795; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4796; GFX10-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04797; GFX10-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14798; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04799; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04800; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04801; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14802; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24803; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14804; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04805; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04806; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]4807;4808; GFX11-SDAG-LABEL: clpeak_imad_pat_u24:4809; GFX11-SDAG:       ; %bb.0: ; %entry4810; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4811; GFX11-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04812; GFX11-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14813; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4814; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04815; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v04816; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4817; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v5, v04818; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v14819; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4820; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v2, v5, v[2:3]4821; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v2, v[3:4]4822; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]4823;4824; GFX11-GISEL-LABEL: clpeak_imad_pat_u24:4825; GFX11-GISEL:       ; %bb.0: ; %entry4826; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4827; GFX11-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04828; GFX11-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14829; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4830; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04831; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04832; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4833; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04834; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14835; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24836; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4837; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14838; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04839; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04840; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]4841;4842; GFX1200-SDAG-LABEL: clpeak_imad_pat_u24:4843; GFX1200-SDAG:       ; %bb.0: ; %entry4844; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04845; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x04846; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x04847; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x04848; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x04849; GFX1200-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04850; GFX1200-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14851; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4852; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04853; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04854; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4855; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04856; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14857; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4858; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v0, v2, v[0:1]4859; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v1, v0, v[1:2]4860; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]4861;4862; GFX1200-GISEL-LABEL: clpeak_imad_pat_u24:4863; GFX1200-GISEL:       ; %bb.0: ; %entry4864; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04865; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x04866; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x04867; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x04868; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x04869; GFX1200-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04870; GFX1200-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14871; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4872; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04873; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04874; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4875; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04876; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14877; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24878; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4879; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14880; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04881; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04882; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]4883;4884; GFX1250-SDAG-LABEL: clpeak_imad_pat_u24:4885; GFX1250-SDAG:       ; %bb.0: ; %entry4886; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x04887; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x04888; GFX1250-SDAG-NEXT:    v_and_b32_e32 v0, 0xffffff, v04889; GFX1250-SDAG-NEXT:    v_and_b32_e32 v1, 0xffffff, v14890; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4891; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v04892; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v04893; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4894; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v04895; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v14896; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4897; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v0, v2, v04898; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v1, v0, v14899; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]4900;4901; GFX1250-GISEL-LABEL: clpeak_imad_pat_u24:4902; GFX1250-GISEL:       ; %bb.0: ; %entry4903; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x04904; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x04905; GFX1250-GISEL-NEXT:    v_and_b32_e32 v0, 0xffffff, v04906; GFX1250-GISEL-NEXT:    v_and_b32_e32 v1, 0xffffff, v14907; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4908; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04909; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v04910; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4911; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v04912; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v14913; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v24914; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4915; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v14916; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v04917; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v04918; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]4919entry:4920  %shl = and i32 %x, 167772154921  %shl1 = and i32 %y, 167772154922  %shl122 = add nuw nsw i32 %shl, 14923  %add = mul i32 %shl1, %shl1224924  %mul323 = add i32 %add, %shl1224925  %add4 = mul i32 %mul323, %shl14926  %add424 = add i32 %add, 14927  %add626 = add i32 %add4, 14928  %mul725 = mul i32 %add4, %add4244929  %add8 = mul i32 %mul725, %add6264930  ret i32 %add84931}4932 4933define signext i8 @clpeak_imad_pat_i8(i8 signext %x, i8 signext %y) {4934; GFX67-LABEL: clpeak_imad_pat_i8:4935; GFX67:       ; %bb.0: ; %entry4936; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4937; GFX67-NEXT:    v_add_i32_e32 v0, vcc, 1, v04938; GFX67-NEXT:    v_and_b32_e32 v0, 0xff, v04939; GFX67-NEXT:    v_and_b32_e32 v2, 0xff, v14940; GFX67-NEXT:    v_mul_u32_u24_e32 v3, v0, v24941; GFX67-NEXT:    v_add_i32_e32 v1, vcc, 1, v14942; GFX67-NEXT:    v_and_b32_e32 v1, 0xff, v14943; GFX67-NEXT:    v_and_b32_e32 v3, 0xff, v34944; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v1, v34945; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v2, 14946; GFX67-NEXT:    v_and_b32_e32 v0, 0xff, v04947; GFX67-NEXT:    v_and_b32_e32 v2, 0xff, v44948; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v24949; GFX67-NEXT:    v_mad_u32_u24 v1, v1, v3, 14950; GFX67-NEXT:    v_and_b32_e32 v0, 0xff, v04951; GFX67-NEXT:    v_and_b32_e32 v1, 0xff, v14952; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v14953; GFX67-NEXT:    v_bfe_i32 v0, v0, 0, 84954; GFX67-NEXT:    s_setpc_b64 s[30:31]4955;4956; GFX8-SDAG-LABEL: clpeak_imad_pat_i8:4957; GFX8-SDAG:       ; %bb.0: ; %entry4958; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4959; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v14960; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v04961; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v14962; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v04963; GFX8-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 84964; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]4965;4966; GFX8-GISEL-LABEL: clpeak_imad_pat_i8:4967; GFX8-GISEL:       ; %bb.0: ; %entry4968; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4969; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v04970; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v14971; GFX8-GISEL-NEXT:    v_add_u16_e32 v3, 1, v14972; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v24973; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 14974; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v44975; GFX8-GISEL-NEXT:    v_mad_u16 v1, v3, v2, 14976; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v14977; GFX8-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 84978; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]4979;4980; GFX9-SDAG-LABEL: clpeak_imad_pat_i8:4981; GFX9-SDAG:       ; %bb.0: ; %entry4982; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4983; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v14984; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v04985; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v14986; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v04987; GFX9-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 84988; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]4989;4990; GFX9-GISEL-LABEL: clpeak_imad_pat_i8:4991; GFX9-GISEL:       ; %bb.0: ; %entry4992; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4993; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v04994; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v14995; GFX9-GISEL-NEXT:    v_add_u16_e32 v3, 1, v14996; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v24997; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, 14998; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v44999; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v3, v2, 15000; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v15001; GFX9-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 85002; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]5003;5004; GFX10-SDAG-LABEL: clpeak_imad_pat_i8:5005; GFX10-SDAG:       ; %bb.0: ; %entry5006; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5007; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v15008; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v05009; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v15010; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v05011; GFX10-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 85012; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]5013;5014; GFX10-GISEL-LABEL: clpeak_imad_pat_i8:5015; GFX10-GISEL:       ; %bb.0: ; %entry5016; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5017; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 15018; GFX10-GISEL-NEXT:    v_add_nc_u16 v2, v1, 15019; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v15020; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 15021; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v35022; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v15023; GFX10-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 15024; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v15025; GFX10-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 85026; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]5027;5028; GFX11-SDAG-TRUE16-LABEL: clpeak_imad_pat_i8:5029; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry5030; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5031; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l5032; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5033; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l5034; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h5035; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5036; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l5037; GFX11-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 85038; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]5039;5040; GFX11-SDAG-FAKE16-LABEL: clpeak_imad_pat_i8:5041; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry5042; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5043; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v15044; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5045; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v05046; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v15047; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5048; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v05049; GFX11-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 85050; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]5051;5052; GFX11-GISEL-TRUE16-LABEL: clpeak_imad_pat_i8:5053; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry5054; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5055; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15056; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15057; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5058; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l5059; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 15060; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h5061; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 15062; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5063; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l5064; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h5065; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5066; GFX11-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 85067; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]5068;5069; GFX11-GISEL-FAKE16-LABEL: clpeak_imad_pat_i8:5070; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry5071; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5072; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15073; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 15074; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5075; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v15076; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 15077; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v35078; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)5079; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v15080; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 15081; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v15082; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5083; GFX11-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 85084; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]5085;5086; GFX1200-SDAG-TRUE16-LABEL: clpeak_imad_pat_i8:5087; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry5088; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x05089; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x05090; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x05091; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x05092; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x05093; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l5094; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5095; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l5096; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h5097; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5098; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l5099; GFX1200-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 85100; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]5101;5102; GFX1200-SDAG-FAKE16-LABEL: clpeak_imad_pat_i8:5103; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry5104; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x05105; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x05106; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x05107; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x05108; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x05109; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v15110; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5111; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v05112; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v15113; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5114; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v05115; GFX1200-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 85116; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]5117;5118; GFX1200-GISEL-TRUE16-LABEL: clpeak_imad_pat_i8:5119; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry5120; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x05121; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x05122; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x05123; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x05124; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x05125; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15126; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15127; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5128; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l5129; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 15130; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h5131; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 15132; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5133; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l5134; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h5135; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5136; GFX1200-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 85137; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]5138;5139; GFX1200-GISEL-FAKE16-LABEL: clpeak_imad_pat_i8:5140; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry5141; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x05142; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x05143; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x05144; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x05145; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x05146; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15147; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 15148; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5149; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v15150; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 15151; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v35152; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)5153; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v15154; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 15155; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v15156; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5157; GFX1200-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 85158; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]5159;5160; GFX1250-SDAG-LABEL: clpeak_imad_pat_i8:5161; GFX1250-SDAG:       ; %bb.0: ; %entry5162; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x05163; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x05164; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v15165; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5166; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v05167; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v15168; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5169; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v05170; GFX1250-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 85171; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]5172;5173; GFX1250-GISEL-LABEL: clpeak_imad_pat_i8:5174; GFX1250-GISEL:       ; %bb.0: ; %entry5175; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x05176; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x05177; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 15178; GFX1250-GISEL-NEXT:    v_add_nc_u16 v2, v1, 15179; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5180; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v15181; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 15182; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v35183; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)5184; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v15185; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 15186; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v15187; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)5188; GFX1250-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 85189; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]5190entry:5191  %conv33 = add i8 %x, 15192  %add = mul i8 %conv33, %y5193  %conv434 = add i8 %y, 15194  %add8 = mul i8 %conv434, %add5195  %conv1035 = add i8 %add, 15196  %add14 = mul i8 %conv1035, %add85197  %conv1636 = add i8 %add8, 15198  %add20 = mul i8 %add14, %conv16365199  ret i8 %add205200}5201 5202define <2 x i8> @clpeak_imad_pat_v2i8(<2 x i8> %x, <2 x i8> %y) {5203; GFX67-SDAG-LABEL: clpeak_imad_pat_v2i8:5204; GFX67-SDAG:       ; %bb.0: ; %entry5205; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5206; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v15207; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xff, v15208; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xff, v35209; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v05210; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v5, v3, v15211; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xff, v05212; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xff, v25213; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15214; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v6, v5, v35215; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v4, v2, v05216; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v35217; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v4, v2, 15218; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xff, v05219; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xff, v35220; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v4, 8, v65221; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v5, v0, v25222; GFX67-SDAG-NEXT:    v_or_b32_e32 v3, v4, v35223; GFX67-SDAG-NEXT:    s_movk_i32 s4, 0x1005224; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, 15225; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, s4, v35226; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xff, v05227; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 8, v15228; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v2, v05229; GFX67-SDAG-NEXT:    v_bfe_u32 v2, v3, 8, 85230; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xff, v55231; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xff, v35232; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15233; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 0x100, v05234; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v4, v35235; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v25236; GFX67-SDAG-NEXT:    v_bfe_u32 v2, v0, 8, 85237; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xff, v35238; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xff, v05239; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15240; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v3, v05241; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v25242; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]5243;5244; GFX67-GISEL-LABEL: clpeak_imad_pat_v2i8:5245; GFX67-GISEL:       ; %bb.0: ; %entry5246; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5247; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v05248; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v15249; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xff, v05250; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xff, v25251; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xff, v15252; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xff, v35253; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v4, v2, v05254; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v5, v3, v15255; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xff, v05256; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v6, v0, v25257; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xff, v15258; GFX67-GISEL-NEXT:    v_mad_u32_u24 v4, v4, v2, 15259; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v1, v35260; GFX67-GISEL-NEXT:    v_mad_u32_u24 v5, v5, v3, 15261; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, 15262; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, 15263; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xff, v65264; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xff, v45265; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v35266; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xff, v75267; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xff, v55268; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v45269; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xff, v25270; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xff, v05271; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v2, v05272; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xff, v35273; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xff, v15274; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v2, v15275; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]5276;5277; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i8:5278; GFX8-SDAG:       ; %bb.0: ; %entry5279; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5280; GFX8-SDAG-NEXT:    v_add_u16_e32 v1, 1, v15281; GFX8-SDAG-NEXT:    v_add_u16_e32 v0, 1, v05282; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v1, v35283; GFX8-SDAG-NEXT:    v_mad_u16 v1, v1, v3, v15284; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v0, v25285; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v2, v05286; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v35287; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v25288; GFX8-SDAG-NEXT:    v_mad_u16 v3, v1, v4, v15289; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v5, v05290; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v35291; GFX8-SDAG-NEXT:    v_lshlrev_b16_e32 v3, 8, v15292; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v25293; GFX8-SDAG-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD5294; GFX8-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15295; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]5296;5297; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i8:5298; GFX8-GISEL:       ; %bb.0: ; %entry5299; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5300; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v05301; GFX8-GISEL-NEXT:    v_add_u16_e32 v1, 1, v15302; GFX8-GISEL-NEXT:    v_mad_u16 v4, v0, v2, v05303; GFX8-GISEL-NEXT:    v_mad_u16 v5, v1, v3, v15304; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v25305; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v35306; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v2, 15307; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v3, 15308; GFX8-GISEL-NEXT:    v_mad_u16 v2, v4, v2, 15309; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 15310; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v6, v05311; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v7, v15312; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v25313; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v35314; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]5315;5316; GFX9-SDAG-LABEL: clpeak_imad_pat_v2i8:5317; GFX9-SDAG:       ; %bb.0: ; %entry5318; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5319; GFX9-SDAG-NEXT:    v_add_u16_e32 v1, 1, v15320; GFX9-SDAG-NEXT:    v_add_u16_e32 v0, 1, v05321; GFX9-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v1, v35322; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v1, v3, v15323; GFX9-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v0, v25324; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v2, v05325; GFX9-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v35326; GFX9-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v25327; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v3, v1, v4, v15328; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v2, v0, v5, v05329; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v3, v1, v35330; GFX9-SDAG-NEXT:    v_lshlrev_b16_e32 v3, 8, v15331; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v2, v0, v25332; GFX9-SDAG-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD5333; GFX9-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15334; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]5335;5336; GFX9-GISEL-LABEL: clpeak_imad_pat_v2i8:5337; GFX9-GISEL:       ; %bb.0: ; %entry5338; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5339; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v05340; GFX9-GISEL-NEXT:    v_add_u16_e32 v1, 1, v15341; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v4, v0, v2, v05342; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v5, v1, v3, v15343; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v25344; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v35345; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v2, 15346; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v1, v3, 15347; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v2, v4, v2, 15348; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v3, v5, v3, 15349; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v6, v05350; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v7, v15351; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v25352; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v35353; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]5354;5355; GFX10-SDAG-LABEL: clpeak_imad_pat_v2i8:5356; GFX10-SDAG:       ; %bb.0: ; %entry5357; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5358; GFX10-SDAG-NEXT:    v_add_nc_u16 v1, v1, 15359; GFX10-SDAG-NEXT:    v_add_nc_u16 v0, v0, 15360; GFX10-SDAG-NEXT:    v_mad_u16 v4, v1, v3, v15361; GFX10-SDAG-NEXT:    v_mul_lo_u16 v1, v1, v35362; GFX10-SDAG-NEXT:    v_mad_u16 v5, v0, v2, v05363; GFX10-SDAG-NEXT:    v_mul_lo_u16 v0, v0, v25364; GFX10-SDAG-NEXT:    v_mul_lo_u16 v3, v4, v35365; GFX10-SDAG-NEXT:    v_mul_lo_u16 v2, v5, v25366; GFX10-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v35367; GFX10-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v25368; GFX10-SDAG-NEXT:    v_mad_u16 v1, v1, v3, v15369; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v2, v05370; GFX10-SDAG-NEXT:    v_lshlrev_b16 v2, 8, v15371; GFX10-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15372; GFX10-SDAG-NEXT:    v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD5373; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]5374;5375; GFX10-GISEL-LABEL: clpeak_imad_pat_v2i8:5376; GFX10-GISEL:       ; %bb.0: ; %entry5377; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5378; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 15379; GFX10-GISEL-NEXT:    v_add_nc_u16 v1, v1, 15380; GFX10-GISEL-NEXT:    v_mad_u16 v4, v0, v2, v05381; GFX10-GISEL-NEXT:    v_mad_u16 v5, v1, v3, v15382; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v2, 15383; GFX10-GISEL-NEXT:    v_mad_u16 v1, v1, v3, 15384; GFX10-GISEL-NEXT:    v_mul_lo_u16 v6, v4, v25385; GFX10-GISEL-NEXT:    v_mul_lo_u16 v7, v5, v35386; GFX10-GISEL-NEXT:    v_mad_u16 v2, v4, v2, 15387; GFX10-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 15388; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v6, v05389; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v7, v15390; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v25391; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v1, v35392; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]5393;5394; GFX11-SDAG-TRUE16-LABEL: clpeak_imad_pat_v2i8:5395; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry5396; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5397; GFX11-SDAG-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15398; GFX11-SDAG-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15399; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5400; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v1.l, v0.h, v3.l, v0.h5401; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v1.h, v0.l, v2.l, v0.l5402; GFX11-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.h, v3.l5403; GFX11-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v2.l5404; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5405; GFX11-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v1.l, v3.l5406; GFX11-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v1.h, v2.l5407; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5408; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v1.l, v0.h, v1.l5409; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.h, v0.l, v1.h5410; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5411; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.l, v0.h5412; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.h, v0.l5413; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5414; GFX11-SDAG-TRUE16-NEXT:    v_lshlrev_b16 v1.l, 8, v0.h5415; GFX11-SDAG-TRUE16-NEXT:    v_and_b16 v0.l, 0xff, v0.l5416; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5417; GFX11-SDAG-TRUE16-NEXT:    v_or_b16 v0.l, v0.l, v1.l5418; GFX11-SDAG-TRUE16-NEXT:    v_and_b16 v1.l, 0xff, v0.h5419; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]5420;5421; GFX11-SDAG-FAKE16-LABEL: clpeak_imad_pat_v2i8:5422; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry5423; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5424; GFX11-SDAG-FAKE16-NEXT:    v_add_nc_u16 v1, v1, 15425; GFX11-SDAG-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15426; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5427; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v4, v1, v3, v15428; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v5, v0, v2, v05429; GFX11-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v1, v1, v35430; GFX11-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v25431; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5432; GFX11-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v3, v4, v35433; GFX11-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v2, v5, v25434; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5435; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v3, v1, v35436; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v2, v0, v25437; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5438; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v1, v3, v15439; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v2, v05440; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5441; GFX11-SDAG-FAKE16-NEXT:    v_lshlrev_b16 v2, 8, v15442; GFX11-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xff, v05443; GFX11-SDAG-FAKE16-NEXT:    v_and_b32_e32 v1, 0xff, v15444; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)5445; GFX11-SDAG-FAKE16-NEXT:    v_or_b32_e32 v0, v0, v25446; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]5447;5448; GFX11-GISEL-TRUE16-LABEL: clpeak_imad_pat_v2i8:5449; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry5450; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5451; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15452; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15453; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5454; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v1.l, v0.l, v2.l, v0.l5455; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v1.h, v0.h, v3.l, v0.h5456; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v2.l, 15457; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v3.l, 15458; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5459; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v2.h, v1.l, v2.l5460; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v3.h, v1.h, v3.l5461; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v1.l, v1.l, v2.l, 15462; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v1.h, v1.h, v3.l, 15463; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5464; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v2.h, v0.l5465; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v3.h, v0.h5466; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5467; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l5468; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h5469; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]5470;5471; GFX11-GISEL-FAKE16-LABEL: clpeak_imad_pat_v2i8:5472; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry5473; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5474; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15475; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v1, v1, 15476; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5477; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v4, v0, v2, v05478; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v5, v1, v3, v15479; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v2, 15480; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v1, v3, 15481; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5482; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v6, v4, v25483; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v7, v5, v35484; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v4, v2, 15485; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v3, v5, v3, 15486; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5487; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v6, v05488; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v7, v15489; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5490; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v25491; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v1, v35492; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]5493;5494; GFX1200-SDAG-TRUE16-LABEL: clpeak_imad_pat_v2i8:5495; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry5496; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x05497; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x05498; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x05499; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x05500; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x05501; GFX1200-SDAG-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15502; GFX1200-SDAG-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15503; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5504; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v1.l, v0.h, v3.l, v0.h5505; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v1.h, v0.l, v2.l, v0.l5506; GFX1200-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.h, v3.l5507; GFX1200-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v2.l5508; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5509; GFX1200-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v1.l, v3.l5510; GFX1200-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v1.h, v2.l5511; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5512; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v1.l, v0.h, v1.l5513; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.h, v0.l, v1.h5514; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5515; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.l, v0.h5516; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.h, v0.l5517; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5518; GFX1200-SDAG-TRUE16-NEXT:    v_lshlrev_b16 v1.l, 8, v0.h5519; GFX1200-SDAG-TRUE16-NEXT:    v_and_b16 v0.l, 0xff, v0.l5520; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)5521; GFX1200-SDAG-TRUE16-NEXT:    v_or_b16 v0.l, v0.l, v1.l5522; GFX1200-SDAG-TRUE16-NEXT:    v_and_b16 v1.l, 0xff, v0.h5523; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]5524;5525; GFX1200-SDAG-FAKE16-LABEL: clpeak_imad_pat_v2i8:5526; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry5527; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x05528; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x05529; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x05530; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x05531; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x05532; GFX1200-SDAG-FAKE16-NEXT:    v_add_nc_u16 v1, v1, 15533; GFX1200-SDAG-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15534; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5535; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v4, v1, v3, v15536; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v5, v0, v2, v05537; GFX1200-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v1, v1, v35538; GFX1200-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v25539; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5540; GFX1200-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v3, v4, v35541; GFX1200-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v2, v5, v25542; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5543; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v3, v1, v35544; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v2, v0, v25545; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5546; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v1, v3, v15547; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v2, v05548; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5549; GFX1200-SDAG-FAKE16-NEXT:    v_lshlrev_b16 v2, 8, v15550; GFX1200-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xff, v05551; GFX1200-SDAG-FAKE16-NEXT:    v_and_b32_e32 v1, 0xff, v15552; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)5553; GFX1200-SDAG-FAKE16-NEXT:    v_or_b32_e32 v0, v0, v25554; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]5555;5556; GFX1200-GISEL-TRUE16-LABEL: clpeak_imad_pat_v2i8:5557; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry5558; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x05559; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x05560; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x05561; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x05562; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x05563; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 15564; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 15565; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5566; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v1.l, v0.l, v2.l, v0.l5567; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v1.h, v0.h, v3.l, v0.h5568; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v2.l, 15569; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v3.l, 15570; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5571; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v2.h, v1.l, v2.l5572; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v3.h, v1.h, v3.l5573; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v1.l, v1.l, v2.l, 15574; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v1.h, v1.h, v3.l, 15575; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5576; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v2.h, v0.l5577; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v3.h, v0.h5578; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5579; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l5580; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h5581; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]5582;5583; GFX1200-GISEL-FAKE16-LABEL: clpeak_imad_pat_v2i8:5584; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry5585; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x05586; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x05587; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x05588; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x05589; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x05590; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 15591; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v1, v1, 15592; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5593; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v4, v0, v2, v05594; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v5, v1, v3, v15595; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v2, 15596; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v1, v3, 15597; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5598; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v6, v4, v25599; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v7, v5, v35600; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v4, v2, 15601; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v3, v5, v3, 15602; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5603; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v6, v05604; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v7, v15605; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5606; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v25607; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v1, v35608; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]5609;5610; GFX1250-SDAG-LABEL: clpeak_imad_pat_v2i8:5611; GFX1250-SDAG:       ; %bb.0: ; %entry5612; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x05613; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x05614; GFX1250-SDAG-NEXT:    v_add_nc_u16 v1, v1, 15615; GFX1250-SDAG-NEXT:    v_add_nc_u16 v0, v0, 15616; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)5617; GFX1250-SDAG-NEXT:    v_mad_u16 v4, v1, v3, v15618; GFX1250-SDAG-NEXT:    v_mul_lo_u16 v1, v1, v35619; GFX1250-SDAG-NEXT:    v_mad_u16 v5, v0, v2, v05620; GFX1250-SDAG-NEXT:    v_mul_lo_u16 v0, v0, v25621; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)5622; GFX1250-SDAG-NEXT:    v_mul_lo_u16 v3, v4, v35623; GFX1250-SDAG-NEXT:    v_mul_lo_u16 v2, v5, v25624; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5625; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v35626; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v25627; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5628; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v1, v3, v15629; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v2, v05630; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)5631; GFX1250-SDAG-NEXT:    v_lshlrev_b16 v2, 8, v15632; GFX1250-SDAG-NEXT:    v_and_b32_e32 v1, 0xff, v15633; GFX1250-SDAG-NEXT:    v_bitop3_b16 v0, v0, v2, 0xff bitop3:0xec5634; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]5635;5636; GFX1250-GISEL-LABEL: clpeak_imad_pat_v2i8:5637; GFX1250-GISEL:       ; %bb.0: ; %entry5638; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x05639; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x05640; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 15641; GFX1250-GISEL-NEXT:    v_add_nc_u16 v1, v1, 15642; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5643; GFX1250-GISEL-NEXT:    v_mad_u16 v4, v0, v2, v05644; GFX1250-GISEL-NEXT:    v_mad_u16 v5, v1, v3, v15645; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v2, 15646; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v1, v3, 15647; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5648; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v6, v4, v25649; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v7, v5, v35650; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v4, v2, 15651; GFX1250-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 15652; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5653; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v6, v05654; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v7, v15655; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5656; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v25657; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v1, v35658; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]5659entry:5660  %y18 = add <2 x i8> %x, <i8 1, i8 1>5661  %add = mul <2 x i8> %y18, %y5662  %mul119 = add <2 x i8> %add, %y185663  %add2 = mul <2 x i8> %mul119, %y5664  %add220 = add <2 x i8> %add, <i8 1, i8 1>5665  %add422 = add <2 x i8> %add2, <i8 1, i8 1>5666  %mul521 = mul <2 x i8> %add2, %add2205667  %add6 = mul <2 x i8> %mul521, %add4225668  ret <2 x i8> %add65669}5670 5671define i64 @clpeak_imad_pat_i64(i64 %x, i64 %y) {5672; GFX6-SDAG-LABEL: clpeak_imad_pat_i64:5673; GFX6-SDAG:       ; %bb.0: ; %entry5674; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5675; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v05676; GFX6-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v35677; GFX6-SDAG-NEXT:    v_mul_hi_u32 v5, v0, v25678; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc5679; GFX6-SDAG-NEXT:    v_mul_lo_u32 v6, v1, v25680; GFX6-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v5, v45681; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v25682; GFX6-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v4, v65683; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v5, v05684; GFX6-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v35685; GFX6-SDAG-NEXT:    v_mul_hi_u32 v6, v0, v25686; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v25687; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, v4, v1, vcc5688; GFX6-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v25689; GFX6-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v45690; GFX6-SDAG-NEXT:    v_mul_hi_u32 v4, v0, v55691; GFX6-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v6, v35692; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v3, v15693; GFX6-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v55694; GFX6-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v4, v25695; GFX6-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v55696; GFX6-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v35697; GFX6-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v4, v05698; GFX6-SDAG-NEXT:    v_addc_u32_e32 v2, vcc, v2, v1, vcc5699; GFX6-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v15700; GFX6-SDAG-NEXT:    v_mul_hi_u32 v4, v3, v05701; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v05702; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v3, v05703; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v4, v15704; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v55705; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v35706; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, v1, v2, vcc5707; GFX6-SDAG-NEXT:    s_setpc_b64 s[30:31]5708;5709; GFX6-GISEL-LABEL: clpeak_imad_pat_i64:5710; GFX6-GISEL:       ; %bb.0: ; %entry5711; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5712; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v05713; GFX6-GISEL-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc5714; GFX6-GISEL-NEXT:    v_mul_lo_u32 v4, v1, v25715; GFX6-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v35716; GFX6-GISEL-NEXT:    v_mul_hi_u32 v7, v0, v25717; GFX6-GISEL-NEXT:    v_mul_lo_u32 v6, v0, v25718; GFX6-GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v55719; GFX6-GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v75720; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v6, v05721; GFX6-GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v4, v1, vcc5722; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v25723; GFX6-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v35724; GFX6-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v25725; GFX6-GISEL-NEXT:    v_mul_hi_u32 v0, v0, v25726; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v35727; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v1, v05728; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v65729; GFX6-GISEL-NEXT:    v_addc_u32_e32 v2, vcc, 0, v4, vcc5730; GFX6-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v55731; GFX6-GISEL-NEXT:    v_addc_u32_e32 v4, vcc, 0, v0, vcc5732; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v15733; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v5, v25734; GFX6-GISEL-NEXT:    v_mul_lo_u32 v6, v5, v15735; GFX6-GISEL-NEXT:    v_mul_hi_u32 v1, v5, v15736; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v25737; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v15738; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v35739; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v6, v45740; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v6, v35741; GFX6-GISEL-NEXT:    v_mul_hi_u32 v3, v6, v35742; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v25743; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v35744; GFX6-GISEL-NEXT:    s_setpc_b64 s[30:31]5745;5746; GFX7-SDAG-LABEL: clpeak_imad_pat_i64:5747; GFX7-SDAG:       ; %bb.0: ; %entry5748; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5749; GFX7-SDAG-NEXT:    v_add_i32_e32 v4, vcc, 1, v05750; GFX7-SDAG-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc5751; GFX7-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v35752; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v4, v2, 05753; GFX7-SDAG-NEXT:    v_mul_lo_u32 v7, v5, v25754; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v65755; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v75756; GFX7-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v0, v45757; GFX7-SDAG-NEXT:    v_addc_u32_e32 v5, vcc, v1, v5, vcc5758; GFX7-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v35759; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v4, v2, 05760; GFX7-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v25761; GFX7-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v4, v65762; GFX7-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v4, v25763; GFX7-SDAG-NEXT:    v_mul_lo_u32 v2, v4, v05764; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v3, v0, v[3:4]5765; GFX7-SDAG-NEXT:    v_mul_lo_u32 v0, v3, v15766; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v2, v65767; GFX7-SDAG-NEXT:    v_add_i32_e32 v6, vcc, v0, v15768; GFX7-SDAG-NEXT:    v_mul_lo_u32 v2, v6, v35769; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v5, v3, v[5:6]5770; GFX7-SDAG-NEXT:    v_mul_lo_u32 v3, v5, v45771; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v2, v15772; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v3, v15773; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]5774;5775; GFX7-GISEL-LABEL: clpeak_imad_pat_i64:5776; GFX7-GISEL:       ; %bb.0: ; %entry5777; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5778; GFX7-GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v05779; GFX7-GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc5780; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v2, 05781; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v3, v[1:2]5782; GFX7-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v0, v85783; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v2, v[4:5]5784; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v1, v2, 05785; GFX7-GISEL-NEXT:    v_addc_u32_e32 v11, vcc, v6, v9, vcc5786; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v1, v3, v[5:6]5787; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v11, v2, v[7:8]5788; GFX7-GISEL-NEXT:    v_add_i32_e32 v7, vcc, 1, v05789; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, 05790; GFX7-GISEL-NEXT:    v_addc_u32_e32 v0, vcc, 0, v6, vcc5791; GFX7-GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v45792; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v4, v0, v[3:4]5793; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v8, 05794; GFX7-GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc5795; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v9, v7, v[5:6]5796; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, v[1:2]5797; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v3, v8, v[4:5]5798; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]5799;5800; GFX8-SDAG-LABEL: clpeak_imad_pat_i64:5801; GFX8-SDAG:       ; %bb.0: ; %entry5802; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5803; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, 1, v05804; GFX8-SDAG-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc5805; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v35806; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v4, v2, 05807; GFX8-SDAG-NEXT:    v_mul_lo_u32 v7, v5, v25808; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v65809; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v75810; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v0, v45811; GFX8-SDAG-NEXT:    v_addc_u32_e32 v5, vcc, v1, v5, vcc5812; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v35813; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v4, v2, 05814; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v25815; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v4, v65816; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v4, v25817; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v4, v05818; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v3, v0, v[3:4]5819; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v3, v15820; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v2, v65821; GFX8-SDAG-NEXT:    v_add_u32_e32 v6, vcc, v0, v15822; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v6, v35823; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v5, v3, v[5:6]5824; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v5, v45825; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v2, v15826; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v3, v15827; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]5828;5829; GFX8-GISEL-LABEL: clpeak_imad_pat_i64:5830; GFX8-GISEL:       ; %bb.0: ; %entry5831; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5832; GFX8-GISEL-NEXT:    v_add_u32_e32 v8, vcc, 1, v05833; GFX8-GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc5834; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v2, 05835; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v3, v[1:2]5836; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v0, v85837; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v2, v[4:5]5838; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v1, v2, 05839; GFX8-GISEL-NEXT:    v_addc_u32_e32 v11, vcc, v6, v9, vcc5840; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v1, v3, v[5:6]5841; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v11, v2, v[7:8]5842; GFX8-GISEL-NEXT:    v_add_u32_e32 v7, vcc, 1, v05843; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, 05844; GFX8-GISEL-NEXT:    v_addc_u32_e32 v0, vcc, 0, v6, vcc5845; GFX8-GISEL-NEXT:    v_add_u32_e32 v8, vcc, 1, v45846; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v4, v0, v[3:4]5847; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v8, 05848; GFX8-GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc5849; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v9, v7, v[5:6]5850; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, v[1:2]5851; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v3, v8, v[4:5]5852; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]5853;5854; GFX900-SDAG-LABEL: clpeak_imad_pat_i64:5855; GFX900-SDAG:       ; %bb.0: ; %entry5856; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5857; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v4, vcc, 1, v05858; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v1, vcc5859; GFX900-SDAG-NEXT:    v_mul_lo_u32 v6, v5, v25860; GFX900-SDAG-NEXT:    v_mul_lo_u32 v7, v4, v35861; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v4, v2, 05862; GFX900-SDAG-NEXT:    v_add3_u32 v6, v1, v7, v65863; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v1, vcc, v0, v45864; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v4, vcc, v6, v5, vcc5865; GFX900-SDAG-NEXT:    v_mul_lo_u32 v4, v4, v25866; GFX900-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v35867; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v1, v2, 05868; GFX900-SDAG-NEXT:    v_add3_u32 v2, v2, v3, v45869; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v05870; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v1, v0, v[1:2]5871; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v65872; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v25873; GFX900-SDAG-NEXT:    v_add3_u32 v4, v5, v4, v05874; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v4, v15875; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v3, v1, v[3:4]5876; GFX900-SDAG-NEXT:    v_add3_u32 v1, v5, v1, v25877; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]5878;5879; GFX900-GISEL-LABEL: clpeak_imad_pat_i64:5880; GFX900-GISEL:       ; %bb.0: ; %entry5881; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5882; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v8, vcc, 1, v05883; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v1, vcc5884; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v2, 05885; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v3, v[1:2]5886; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v1, vcc, v0, v85887; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v2, v[4:5]5888; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v1, v2, 05889; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v11, vcc, v6, v9, vcc5890; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v1, v3, v[5:6]5891; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v11, v2, v[7:8]5892; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v7, vcc, 1, v05893; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, 05894; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v0, vcc, 0, v6, vcc5895; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v8, vcc, 1, v45896; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v4, v0, v[3:4]5897; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v8, 05898; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v10, vcc, 0, v9, vcc5899; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v9, v7, v[5:6]5900; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, v[1:2]5901; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v3, v8, v[4:5]5902; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]5903;5904; GFX90A-SDAG-LABEL: clpeak_imad_pat_i64:5905; GFX90A-SDAG:       ; %bb.0: ; %entry5906; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5907; GFX90A-SDAG-NEXT:    v_add_co_u32_e32 v0, vcc, 1, v05908; GFX90A-SDAG-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc5909; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v1, v25910; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v7, v0, v35911; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v0, v2, 05912; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v2, v[0:1]5913; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v6, v1, v75914; GFX90A-SDAG-NEXT:    v_add3_u32 v5, v5, v7, v65915; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v35916; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v1, v25917; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v2, 05918; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v1, v3, v65919; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v1, v45920; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v4, v[0:1]5921; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v55922; GFX90A-SDAG-NEXT:    v_add3_u32 v3, v6, v3, v45923; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v2, v15924; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v5, v3, v05925; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v0, v[2:3]5926; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v5, v1, v45927; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]5928;5929; GFX90A-GISEL-LABEL: clpeak_imad_pat_i64:5930; GFX90A-GISEL:       ; %bb.0: ; %entry5931; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5932; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v8, vcc, 1, v05933; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v1, vcc5934; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v3, 05935; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v2, 05936; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v2, v[4:5]5937; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v1, v65938; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v8, vcc, v0, v85939; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v10, vcc, v1, v9, vcc5940; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v8, v3, 05941; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v8, v2, 05942; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v10, v2, v[6:7]5943; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v7, vcc, 1, v05944; GFX90A-GISEL-NEXT:    v_add_u32_e32 v6, v5, v85945; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v1, vcc5946; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v8, vcc, 1, v45947; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v4, v5, 05948; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v6, vcc5949; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, 05950; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v6, v7, v[0:1]5951; GFX90A-GISEL-NEXT:    v_add_u32_e32 v6, v3, v45952; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v9, 05953; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v8, 05954; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, v8, v[4:5]5955; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v1, v25956; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]5957;5958; GFX10-SDAG-LABEL: clpeak_imad_pat_i64:5959; GFX10-SDAG:       ; %bb.0: ; %entry5960; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5961; GFX10-SDAG-NEXT:    v_add_co_u32 v4, vcc_lo, v0, 15962; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo5963; GFX10-SDAG-NEXT:    v_mul_lo_u32 v7, v4, v35964; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v2, 05965; GFX10-SDAG-NEXT:    v_mul_lo_u32 v6, v5, v25966; GFX10-SDAG-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v45967; GFX10-SDAG-NEXT:    v_add3_u32 v1, v1, v7, v65968; GFX10-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v35969; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v4, v2, 05970; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, v1, v5, vcc_lo5971; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v25972; GFX10-SDAG-NEXT:    v_add3_u32 v4, v4, v6, v25973; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v15974; GFX10-SDAG-NEXT:    v_mul_lo_u32 v5, v4, v05975; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v0, v[3:4]5976; GFX10-SDAG-NEXT:    v_add3_u32 v1, v5, v1, v25977; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v45978; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v35979; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v0, v3, v[0:1]5980; GFX10-SDAG-NEXT:    v_add3_u32 v1, v4, v1, v25981; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]5982;5983; GFX10-GISEL-LABEL: clpeak_imad_pat_i64:5984; GFX10-GISEL:       ; %bb.0: ; %entry5985; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5986; GFX10-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 15987; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v1, vcc_lo5988; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v8, v2, 05989; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v8, v3, v[1:2]5990; GFX10-GISEL-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v85991; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[6:7], null, v9, v2, v[4:5]5992; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v1, v2, 05993; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v9, null, v6, v9, vcc_lo5994; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[7:8], null, v1, v3, v[5:6]5995; GFX10-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 15996; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v0, null, 0, v6, vcc_lo5997; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[5:6], null, v4, v8, 05998; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v9, v2, v[7:8]5999; GFX10-GISEL-NEXT:    v_add_co_u32 v7, vcc_lo, v4, 16000; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[3:4], null, v4, v0, v[6:7]6001; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v4, null, 0, v2, vcc_lo6002; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v7, 06003; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v2, v8, v[3:4]6004; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[3:4], null, v5, v4, v[1:2]6005; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[1:2], null, v2, v7, v[3:4]6006; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]6007;6008; GFX11-SDAG-LABEL: clpeak_imad_pat_i64:6009; GFX11-SDAG:       ; %bb.0: ; %entry6010; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6011; GFX11-SDAG-NEXT:    v_add_co_u32 v4, vcc_lo, v0, 16012; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6013; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo6014; GFX11-SDAG-NEXT:    v_mul_lo_u32 v7, v4, v36015; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v2, 06016; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)6017; GFX11-SDAG-NEXT:    v_mul_lo_u32 v6, v5, v26018; GFX11-SDAG-NEXT:    v_add3_u32 v1, v1, v7, v66019; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)6020; GFX11-SDAG-NEXT:    v_add_co_u32 v6, vcc_lo, v0, v46021; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, v1, v5, vcc_lo6022; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)6023; GFX11-SDAG-NEXT:    v_mul_lo_u32 v7, v6, v36024; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v6, v2, 06025; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v26026; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6027; GFX11-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v16028; GFX11-SDAG-NEXT:    v_add3_u32 v4, v4, v7, v26029; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6030; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v4, v06031; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v3, v0, v[3:4]6032; GFX11-SDAG-NEXT:    v_add3_u32 v6, v2, v6, v16033; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6034; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v46035; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v6, v36036; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v3, v[5:6]6037; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)6038; GFX11-SDAG-NEXT:    v_add3_u32 v1, v4, v1, v26039; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]6040;6041; GFX11-GISEL-LABEL: clpeak_imad_pat_i64:6042; GFX11-GISEL:       ; %bb.0: ; %entry6043; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6044; GFX11-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 16045; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6046; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v1, vcc_lo6047; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v8, v2, 06048; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6049; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v8, v3, v[1:2]6050; GFX11-GISEL-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v86051; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6052; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[6:7], null, v9, v2, v[4:5]6053; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v1, v2, 06054; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6055; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v10, null, v6, v9, vcc_lo6056; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[7:8], null, v1, v3, v[5:6]6057; GFX11-GISEL-NEXT:    v_add_co_u32 v11, vcc_lo, v0, 16058; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6059; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v0, null, 0, v6, vcc_lo6060; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[5:6], null, v4, v11, 06061; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)6062; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v10, v2, v[7:8]6063; GFX11-GISEL-NEXT:    v_add_co_u32 v9, vcc_lo, v4, 16064; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v4, v0, v[6:7]6065; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)6066; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v9, 06067; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v10, null, 0, v8, vcc_lo6068; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)6069; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[3:4], null, v8, v11, v[2:3]6070; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[6:7], null, v5, v10, v[1:2]6071; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)6072; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[1:2], null, v3, v9, v[6:7]6073; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]6074;6075; GFX1200-SDAG-LABEL: clpeak_imad_pat_i64:6076; GFX1200-SDAG:       ; %bb.0: ; %entry6077; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x06078; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x06079; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x06080; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x06081; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x06082; GFX1200-SDAG-NEXT:    v_add_co_u32 v4, vcc_lo, v0, 16083; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6084; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo6085; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)6086; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v7, v4, v36087; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v4, v2, 06088; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v6, v5, v26089; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6090; GFX1200-SDAG-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v46091; GFX1200-SDAG-NEXT:    v_add3_u32 v1, v1, v7, v66092; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)6093; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v36094; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[3:4], null, v4, v2, 06095; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6096; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v5, null, v1, v5, vcc_lo6097; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6098; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v26099; GFX1200-SDAG-NEXT:    v_add3_u32 v4, v4, v6, v26100; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)6101; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v16102; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v5, v4, v06103; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v3, v0, v[3:4]6104; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6105; GFX1200-SDAG-NEXT:    v_add3_u32 v1, v5, v1, v26106; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v46107; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)6108; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v36109; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v0, v3, v[0:1]6110; GFX1200-SDAG-NEXT:    v_add3_u32 v1, v4, v1, v26111; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]6112;6113; GFX1200-GISEL-LABEL: clpeak_imad_pat_i64:6114; GFX1200-GISEL:       ; %bb.0: ; %entry6115; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x06116; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x06117; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x06118; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x06119; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x06120; GFX1200-GISEL-NEXT:    v_add_co_u32 v4, vcc_lo, v0, 16121; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)6122; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo6123; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)6124; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v4, v26125; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v6, v4, v26126; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[0:1], null, v4, v3, v[0:1]6127; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)6128; GFX1200-GISEL-NEXT:    v_add_co_u32 v4, vcc_lo, v6, v46129; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v7, v4, v26130; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)6131; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[0:1], null, v5, v2, v[0:1]6132; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v1, v4, v26133; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)6134; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v5, null, v0, v5, vcc_lo6135; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)6136; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[3:4], null, v4, v3, v[1:2]6137; GFX1200-GISEL-NEXT:    v_add_co_u32 v4, vcc_lo, v6, 16138; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)6139; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v6, null, 0, v0, vcc_lo6140; GFX1200-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v7, 16141; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v7, v46142; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v5, v2, v[3:4]6143; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v7, v46144; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)6145; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[2:3], null, v7, v6, v[0:1]6146; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)6147; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v1, vcc_lo6148; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v5, v86149; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)6150; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v1, v4, v[2:3]6151; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[2:3], null, v5, v3, v[0:1]6152; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v5, v86153; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)6154; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v1, v8, v[2:3]6155; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]6156;6157; GFX1250-SDAG-LABEL: clpeak_imad_pat_i64:6158; GFX1250-SDAG:       ; %bb.0: ; %entry6159; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x06160; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x06161; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]6162; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6163; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[4:5], v[0:1], v[2:3]6164; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[0:1], v[4:5], v[0:1]6165; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6166; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[2:3], v[0:1], v[2:3]6167; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[6:7], v2, v4, v[2:3]6168; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6169; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v3, v4, v76170; GFX1250-SDAG-NEXT:    v_mad_u32 v7, v2, v5, v06171; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6172; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[0:1], v6, v2, v[6:7]6173; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v7, v2, v16174; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)6175; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v6, v3, v16176; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]6177;6178; GFX1250-GISEL-LABEL: clpeak_imad_pat_i64:6179; GFX1250-GISEL:       ; %bb.0: ; %entry6180; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x06181; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x06182; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]6183; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6184; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[4:5], v[0:1], v[2:3]6185; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], v[4:5], v[0:1]6186; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6187; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[0:1], v[0:1], v[2:3]6188; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[2:3], 1, v[4:5]6189; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[2:3], v[0:1], v[2:3]6190; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]6191; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)6192; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[0:1], v[2:3], v[0:1]6193; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]6194entry:6195  %y18 = add i64 %x, 16196  %add = mul i64 %y18, %y6197  %mul119 = add i64 %add, %y186198  %add2 = mul i64 %mul119, %y6199  %add220 = add i64 %add, 16200  %add422 = add i64 %add2, 16201  %mul521 = mul i64 %add2, %add2206202  %add6 = mul i64 %mul521, %add4226203  ret i64 %add66204}6205 6206define <2 x i64> @clpeak_imad_pat_v2i64(<2 x i64> %x, <2 x i64> %y) {6207; GFX6-SDAG-LABEL: clpeak_imad_pat_v2i64:6208; GFX6-SDAG:       ; %bb.0: ; %entry6209; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6210; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v06211; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc6212; GFX6-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v56213; GFX6-SDAG-NEXT:    v_mul_hi_u32 v9, v0, v46214; GFX6-SDAG-NEXT:    v_mul_lo_u32 v10, v1, v46215; GFX6-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v26216; GFX6-SDAG-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc6217; GFX6-SDAG-NEXT:    v_add_i32_e32 v8, vcc, v9, v86218; GFX6-SDAG-NEXT:    v_add_i32_e32 v8, vcc, v8, v106219; GFX6-SDAG-NEXT:    v_mul_lo_u32 v9, v2, v76220; GFX6-SDAG-NEXT:    v_mul_hi_u32 v10, v2, v66221; GFX6-SDAG-NEXT:    v_mul_lo_u32 v12, v3, v66222; GFX6-SDAG-NEXT:    v_mul_lo_u32 v11, v0, v46223; GFX6-SDAG-NEXT:    v_add_i32_e32 v9, vcc, v10, v96224; GFX6-SDAG-NEXT:    v_add_i32_e32 v9, vcc, v9, v126225; GFX6-SDAG-NEXT:    v_mul_lo_u32 v10, v2, v66226; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v11, v06227; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, v8, v1, vcc6228; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v56229; GFX6-SDAG-NEXT:    v_mul_hi_u32 v12, v0, v46230; GFX6-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v46231; GFX6-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v10, v26232; GFX6-SDAG-NEXT:    v_addc_u32_e32 v3, vcc, v9, v3, vcc6233; GFX6-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v12, v56234; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v5, v16235; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v76236; GFX6-SDAG-NEXT:    v_mul_hi_u32 v7, v2, v66237; GFX6-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v66238; GFX6-SDAG-NEXT:    v_mul_lo_u32 v3, v3, v66239; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v46240; GFX6-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v7, v56241; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v96242; GFX6-SDAG-NEXT:    v_mul_hi_u32 v6, v2, v106243; GFX6-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v4, v36244; GFX6-SDAG-NEXT:    v_mul_lo_u32 v4, v3, v106245; GFX6-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v6, v56246; GFX6-SDAG-NEXT:    v_mul_hi_u32 v6, v0, v116247; GFX6-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v5, v46248; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v86249; GFX6-SDAG-NEXT:    v_mul_lo_u32 v8, v1, v116250; GFX6-SDAG-NEXT:    v_mul_lo_u32 v7, v2, v106251; GFX6-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v6, v56252; GFX6-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v116253; GFX6-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v5, v86254; GFX6-SDAG-NEXT:    v_add_i32_e32 v6, vcc, v6, v06255; GFX6-SDAG-NEXT:    v_addc_u32_e32 v5, vcc, v5, v1, vcc6256; GFX6-SDAG-NEXT:    v_mul_lo_u32 v1, v6, v16257; GFX6-SDAG-NEXT:    v_mul_hi_u32 v8, v6, v06258; GFX6-SDAG-NEXT:    v_mul_lo_u32 v9, v5, v06259; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v6, v06260; GFX6-SDAG-NEXT:    v_add_i32_e32 v7, vcc, v7, v26261; GFX6-SDAG-NEXT:    v_addc_u32_e32 v4, vcc, v4, v3, vcc6262; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v8, v16263; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v96264; GFX6-SDAG-NEXT:    v_mul_lo_u32 v3, v7, v36265; GFX6-SDAG-NEXT:    v_mul_hi_u32 v8, v7, v26266; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v66267; GFX6-SDAG-NEXT:    v_addc_u32_e32 v1, vcc, v1, v5, vcc6268; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v4, v26269; GFX6-SDAG-NEXT:    v_mul_lo_u32 v2, v7, v26270; GFX6-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v8, v36271; GFX6-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v56272; GFX6-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v76273; GFX6-SDAG-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc6274; GFX6-SDAG-NEXT:    s_setpc_b64 s[30:31]6275;6276; GFX6-GISEL-LABEL: clpeak_imad_pat_v2i64:6277; GFX6-GISEL:       ; %bb.0: ; %entry6278; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6279; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v06280; GFX6-GISEL-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc6281; GFX6-GISEL-NEXT:    v_mul_lo_u32 v8, v1, v46282; GFX6-GISEL-NEXT:    v_mul_lo_u32 v9, v0, v56283; GFX6-GISEL-NEXT:    v_mul_hi_u32 v11, v0, v46284; GFX6-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v26285; GFX6-GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc6286; GFX6-GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v96287; GFX6-GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v116288; GFX6-GISEL-NEXT:    v_mul_lo_u32 v9, v3, v66289; GFX6-GISEL-NEXT:    v_mul_lo_u32 v11, v2, v76290; GFX6-GISEL-NEXT:    v_mul_hi_u32 v13, v2, v66291; GFX6-GISEL-NEXT:    v_mul_lo_u32 v10, v0, v46292; GFX6-GISEL-NEXT:    v_mul_lo_u32 v12, v2, v66293; GFX6-GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v116294; GFX6-GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v136295; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v10, v06296; GFX6-GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v8, v1, vcc6297; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v46298; GFX6-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v56299; GFX6-GISEL-NEXT:    v_mul_lo_u32 v11, v0, v46300; GFX6-GISEL-NEXT:    v_mul_hi_u32 v0, v0, v46301; GFX6-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v12, v26302; GFX6-GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v9, v3, vcc6303; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v56304; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v1, v06305; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v66306; GFX6-GISEL-NEXT:    v_mul_lo_u32 v3, v2, v76307; GFX6-GISEL-NEXT:    v_mul_lo_u32 v4, v2, v66308; GFX6-GISEL-NEXT:    v_mul_hi_u32 v2, v2, v66309; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v36310; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v26311; GFX6-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v106312; GFX6-GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v8, vcc6313; GFX6-GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v126314; GFX6-GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v9, vcc6315; GFX6-GISEL-NEXT:    v_add_i32_e32 v7, vcc, 1, v116316; GFX6-GISEL-NEXT:    v_addc_u32_e32 v8, vcc, 0, v0, vcc6317; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v26318; GFX6-GISEL-NEXT:    v_mul_lo_u32 v3, v11, v36319; GFX6-GISEL-NEXT:    v_mul_lo_u32 v12, v11, v26320; GFX6-GISEL-NEXT:    v_mul_hi_u32 v2, v11, v26321; GFX6-GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v46322; GFX6-GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v1, vcc6323; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v36324; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v26325; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v56326; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v4, v66327; GFX6-GISEL-NEXT:    v_mul_lo_u32 v3, v4, v56328; GFX6-GISEL-NEXT:    v_mul_hi_u32 v4, v4, v56329; GFX6-GISEL-NEXT:    v_mul_hi_u32 v5, v12, v76330; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v26331; GFX6-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v1, v46332; GFX6-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v76333; GFX6-GISEL-NEXT:    v_mul_lo_u32 v4, v12, v86334; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v12, v76335; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v46336; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v1, v56337; GFX6-GISEL-NEXT:    v_mul_lo_u32 v4, v2, v96338; GFX6-GISEL-NEXT:    v_mul_lo_u32 v5, v3, v106339; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v3, v96340; GFX6-GISEL-NEXT:    v_mul_hi_u32 v3, v3, v96341; GFX6-GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v56342; GFX6-GISEL-NEXT:    v_add_i32_e32 v3, vcc, v4, v36343; GFX6-GISEL-NEXT:    s_setpc_b64 s[30:31]6344;6345; GFX7-SDAG-LABEL: clpeak_imad_pat_v2i64:6346; GFX7-SDAG:       ; %bb.0: ; %entry6347; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6348; GFX7-SDAG-NEXT:    v_add_i32_e32 v8, vcc, 1, v06349; GFX7-SDAG-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc6350; GFX7-SDAG-NEXT:    v_mul_lo_u32 v10, v8, v56351; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v4, 06352; GFX7-SDAG-NEXT:    v_add_i32_e32 v11, vcc, 1, v26353; GFX7-SDAG-NEXT:    v_addc_u32_e32 v12, vcc, 0, v3, vcc6354; GFX7-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v1, v106355; GFX7-SDAG-NEXT:    v_mul_lo_u32 v10, v9, v46356; GFX7-SDAG-NEXT:    v_mul_lo_u32 v13, v11, v76357; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v11, v6, 06358; GFX7-SDAG-NEXT:    v_add_i32_e32 v14, vcc, v3, v106359; GFX7-SDAG-NEXT:    v_mul_lo_u32 v3, v12, v66360; GFX7-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v136361; GFX7-SDAG-NEXT:    v_add_i32_e32 v13, vcc, v2, v36362; GFX7-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v0, v86363; GFX7-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v56364; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v2, v4, 06365; GFX7-SDAG-NEXT:    v_addc_u32_e32 v9, vcc, v14, v9, vcc6366; GFX7-SDAG-NEXT:    v_add_i32_e32 v8, vcc, v1, v116367; GFX7-SDAG-NEXT:    v_addc_u32_e32 v10, vcc, v13, v12, vcc6368; GFX7-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v56369; GFX7-SDAG-NEXT:    v_mul_lo_u32 v5, v8, v76370; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v8, v6, 06371; GFX7-SDAG-NEXT:    v_mul_lo_u32 v9, v9, v46372; GFX7-SDAG-NEXT:    v_mul_lo_u32 v4, v10, v66373; GFX7-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v8, v56374; GFX7-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v96375; GFX7-SDAG-NEXT:    v_add_i32_e32 v8, vcc, v5, v46376; GFX7-SDAG-NEXT:    v_mul_lo_u32 v6, v8, v16377; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v7, v1, v[7:8]6378; GFX7-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v06379; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v2, v0, v[2:3]6380; GFX7-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v6, v56381; GFX7-SDAG-NEXT:    v_mul_lo_u32 v6, v7, v136382; GFX7-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v146383; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v106384; GFX7-SDAG-NEXT:    v_add_i32_e32 v5, vcc, v6, v56385; GFX7-SDAG-NEXT:    v_add_i32_e32 v10, vcc, v0, v16386; GFX7-SDAG-NEXT:    v_mul_lo_u32 v11, v10, v26387; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v9, v2, v[9:10]6388; GFX7-SDAG-NEXT:    v_mul_lo_u32 v6, v9, v36389; GFX7-SDAG-NEXT:    v_mul_lo_u32 v9, v5, v76390; GFX7-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, v[4:5]6391; GFX7-SDAG-NEXT:    v_mul_lo_u32 v4, v4, v86392; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v11, v16393; GFX7-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v9, v36394; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v6, v16395; GFX7-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v4, v36396; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]6397;6398; GFX7-GISEL-LABEL: clpeak_imad_pat_v2i64:6399; GFX7-GISEL:       ; %bb.0: ; %entry6400; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6401; GFX7-GISEL-NEXT:    v_add_i32_e32 v12, vcc, 1, v06402; GFX7-GISEL-NEXT:    v_addc_u32_e32 v13, vcc, 0, v1, vcc6403; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 06404; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2]6405; GFX7-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v0, v126406; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9]6407; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 06408; GFX7-GISEL-NEXT:    v_addc_u32_e32 v15, vcc, v10, v13, vcc6409; GFX7-GISEL-NEXT:    v_add_i32_e32 v16, vcc, 1, v26410; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10]6411; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 06412; GFX7-GISEL-NEXT:    v_addc_u32_e32 v17, vcc, 0, v3, vcc6413; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12]6414; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3]6415; GFX7-GISEL-NEXT:    v_add_i32_e32 v9, vcc, v1, v166416; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4]6417; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 06418; GFX7-GISEL-NEXT:    v_addc_u32_e32 v12, vcc, v11, v17, vcc6419; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4]6420; GFX7-GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v06421; GFX7-GISEL-NEXT:    v_addc_u32_e32 v7, vcc, 0, v10, vcc6422; GFX7-GISEL-NEXT:    v_add_i32_e32 v10, vcc, 1, v16423; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5]6424; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, 06425; GFX7-GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v11, vcc6426; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v3, v[5:6]6427; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v8, v9, 06428; GFX7-GISEL-NEXT:    v_add_i32_e32 v15, vcc, 1, v26429; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v7, v[6:7]6430; GFX7-GISEL-NEXT:    v_add_i32_e64 v16, s[4:5], 1, v86431; GFX7-GISEL-NEXT:    v_addc_u32_e64 v6, s[4:5], 0, v13, s[4:5]6432; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v13, v9, v[2:3]6433; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v14, v10, v[0:1]6434; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 06435; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 06436; GFX7-GISEL-NEXT:    v_addc_u32_e32 v17, vcc, 0, v14, vcc6437; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v5, v6, v[1:2]6438; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v4, v17, v[3:4]6439; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[9:10]6440; GFX7-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v8, v15, v[11:12]6441; GFX7-GISEL-NEXT:    v_mov_b32_e32 v1, v56442; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]6443;6444; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i64:6445; GFX8-SDAG:       ; %bb.0: ; %entry6446; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6447; GFX8-SDAG-NEXT:    v_add_u32_e32 v8, vcc, 1, v06448; GFX8-SDAG-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc6449; GFX8-SDAG-NEXT:    v_mul_lo_u32 v10, v8, v56450; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v4, 06451; GFX8-SDAG-NEXT:    v_add_u32_e32 v11, vcc, 1, v26452; GFX8-SDAG-NEXT:    v_addc_u32_e32 v12, vcc, 0, v3, vcc6453; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v1, v106454; GFX8-SDAG-NEXT:    v_mul_lo_u32 v10, v9, v46455; GFX8-SDAG-NEXT:    v_mul_lo_u32 v13, v11, v76456; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v11, v6, 06457; GFX8-SDAG-NEXT:    v_add_u32_e32 v14, vcc, v3, v106458; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v12, v66459; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v2, v136460; GFX8-SDAG-NEXT:    v_add_u32_e32 v13, vcc, v2, v36461; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v0, v86462; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v2, v56463; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v2, v4, 06464; GFX8-SDAG-NEXT:    v_addc_u32_e32 v9, vcc, v14, v9, vcc6465; GFX8-SDAG-NEXT:    v_add_u32_e32 v8, vcc, v1, v116466; GFX8-SDAG-NEXT:    v_addc_u32_e32 v10, vcc, v13, v12, vcc6467; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v56468; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v8, v76469; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v8, v6, 06470; GFX8-SDAG-NEXT:    v_mul_lo_u32 v9, v9, v46471; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v10, v66472; GFX8-SDAG-NEXT:    v_add_u32_e32 v5, vcc, v8, v56473; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v96474; GFX8-SDAG-NEXT:    v_add_u32_e32 v8, vcc, v5, v46475; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v8, v16476; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v7, v1, v[7:8]6477; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v06478; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v2, v0, v[2:3]6479; GFX8-SDAG-NEXT:    v_add_u32_e32 v5, vcc, v6, v56480; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v7, v136481; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v146482; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v106483; GFX8-SDAG-NEXT:    v_add_u32_e32 v5, vcc, v6, v56484; GFX8-SDAG-NEXT:    v_add_u32_e32 v10, vcc, v0, v16485; GFX8-SDAG-NEXT:    v_mul_lo_u32 v11, v10, v26486; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v9, v2, v[9:10]6487; GFX8-SDAG-NEXT:    v_mul_lo_u32 v6, v9, v36488; GFX8-SDAG-NEXT:    v_mul_lo_u32 v9, v5, v76489; GFX8-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v7, v[4:5]6490; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v4, v86491; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v11, v16492; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v9, v36493; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v6, v16494; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v4, v36495; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]6496;6497; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i64:6498; GFX8-GISEL:       ; %bb.0: ; %entry6499; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6500; GFX8-GISEL-NEXT:    v_add_u32_e32 v12, vcc, 1, v06501; GFX8-GISEL-NEXT:    v_addc_u32_e32 v13, vcc, 0, v1, vcc6502; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 06503; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2]6504; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v0, v126505; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9]6506; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 06507; GFX8-GISEL-NEXT:    v_addc_u32_e32 v15, vcc, v10, v13, vcc6508; GFX8-GISEL-NEXT:    v_add_u32_e32 v16, vcc, 1, v26509; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10]6510; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 06511; GFX8-GISEL-NEXT:    v_addc_u32_e32 v17, vcc, 0, v3, vcc6512; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12]6513; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3]6514; GFX8-GISEL-NEXT:    v_add_u32_e32 v9, vcc, v1, v166515; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4]6516; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 06517; GFX8-GISEL-NEXT:    v_addc_u32_e32 v12, vcc, v11, v17, vcc6518; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4]6519; GFX8-GISEL-NEXT:    v_add_u32_e32 v9, vcc, 1, v06520; GFX8-GISEL-NEXT:    v_addc_u32_e32 v7, vcc, 0, v10, vcc6521; GFX8-GISEL-NEXT:    v_add_u32_e32 v10, vcc, 1, v16522; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5]6523; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, 06524; GFX8-GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v11, vcc6525; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v3, v[5:6]6526; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v8, v9, 06527; GFX8-GISEL-NEXT:    v_add_u32_e32 v15, vcc, 1, v26528; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v7, v[6:7]6529; GFX8-GISEL-NEXT:    v_add_u32_e64 v16, s[4:5], 1, v86530; GFX8-GISEL-NEXT:    v_addc_u32_e64 v6, s[4:5], 0, v13, s[4:5]6531; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v13, v9, v[2:3]6532; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v14, v10, v[0:1]6533; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 06534; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 06535; GFX8-GISEL-NEXT:    v_addc_u32_e32 v17, vcc, 0, v14, vcc6536; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v5, v6, v[1:2]6537; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v4, v17, v[3:4]6538; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[9:10]6539; GFX8-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v8, v15, v[11:12]6540; GFX8-GISEL-NEXT:    v_mov_b32_e32 v1, v56541; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]6542;6543; GFX900-SDAG-LABEL: clpeak_imad_pat_v2i64:6544; GFX900-SDAG:       ; %bb.0: ; %entry6545; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6546; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v8, vcc, 1, v26547; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v3, vcc6548; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v10, vcc, 1, v06549; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v1, vcc6550; GFX900-SDAG-NEXT:    v_mul_lo_u32 v12, v11, v46551; GFX900-SDAG-NEXT:    v_mul_lo_u32 v13, v10, v56552; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v10, v4, 06553; GFX900-SDAG-NEXT:    v_mul_lo_u32 v14, v9, v66554; GFX900-SDAG-NEXT:    v_mul_lo_u32 v15, v8, v76555; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v6, 06556; GFX900-SDAG-NEXT:    v_add3_u32 v12, v1, v13, v126557; GFX900-SDAG-NEXT:    v_add3_u32 v1, v3, v15, v146558; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v8, vcc, v2, v86559; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v9, vcc, v1, v9, vcc6560; GFX900-SDAG-NEXT:    v_add_co_u32_e32 v3, vcc, v0, v106561; GFX900-SDAG-NEXT:    v_addc_co_u32_e32 v10, vcc, v12, v11, vcc6562; GFX900-SDAG-NEXT:    v_mul_lo_u32 v10, v10, v46563; GFX900-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v56564; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v3, v4, 06565; GFX900-SDAG-NEXT:    v_mul_lo_u32 v9, v9, v66566; GFX900-SDAG-NEXT:    v_mul_lo_u32 v7, v8, v76567; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v8, v6, 06568; GFX900-SDAG-NEXT:    v_add3_u32 v4, v4, v11, v106569; GFX900-SDAG-NEXT:    v_mul_lo_u32 v10, v4, v06570; GFX900-SDAG-NEXT:    v_add3_u32 v6, v6, v7, v96571; GFX900-SDAG-NEXT:    v_mul_lo_u32 v9, v6, v26572; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v5, v2, v[5:6]6573; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v16574; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v3, v0, v[3:4]6575; GFX900-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v126576; GFX900-SDAG-NEXT:    v_add3_u32 v8, v9, v8, v26577; GFX900-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v46578; GFX900-SDAG-NEXT:    v_mul_lo_u32 v6, v7, v66579; GFX900-SDAG-NEXT:    v_add3_u32 v1, v10, v1, v116580; GFX900-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v36581; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v3, v[0:1]6582; GFX900-SDAG-NEXT:    v_mul_lo_u32 v10, v8, v56583; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v7, v5, v[7:8]6584; GFX900-SDAG-NEXT:    v_add3_u32 v1, v9, v1, v46585; GFX900-SDAG-NEXT:    v_add3_u32 v3, v10, v3, v66586; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]6587;6588; GFX900-GISEL-LABEL: clpeak_imad_pat_v2i64:6589; GFX900-GISEL:       ; %bb.0: ; %entry6590; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6591; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v12, vcc, 1, v06592; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v1, vcc6593; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 06594; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2]6595; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v1, vcc, v0, v126596; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9]6597; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 06598; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v15, vcc, v10, v13, vcc6599; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v16, vcc, 1, v26600; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10]6601; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 06602; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v3, vcc6603; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12]6604; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3]6605; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v9, vcc, v1, v166606; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4]6607; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 06608; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v12, vcc, v11, v17, vcc6609; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4]6610; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v9, vcc, 1, v06611; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v10, vcc6612; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v10, vcc, 1, v16613; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5]6614; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, 06615; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v11, vcc6616; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v3, v[5:6]6617; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v8, v9, 06618; GFX900-GISEL-NEXT:    v_add_co_u32_e32 v15, vcc, 1, v26619; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v7, v[6:7]6620; GFX900-GISEL-NEXT:    v_add_co_u32_e64 v16, s[4:5], 1, v86621; GFX900-GISEL-NEXT:    v_addc_co_u32_e64 v6, s[4:5], 0, v13, s[4:5]6622; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[7:8], s[4:5], v13, v9, v[2:3]6623; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v14, v10, v[0:1]6624; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 06625; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 06626; GFX900-GISEL-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v14, vcc6627; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[9:10], s[4:5], v5, v6, v[1:2]6628; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[11:12], s[4:5], v4, v17, v[3:4]6629; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[9:10]6630; GFX900-GISEL-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v8, v15, v[11:12]6631; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, v56632; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]6633;6634; GFX90A-SDAG-LABEL: clpeak_imad_pat_v2i64:6635; GFX90A-SDAG:       ; %bb.0: ; %entry6636; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6637; GFX90A-SDAG-NEXT:    v_add_co_u32_e32 v2, vcc, 1, v26638; GFX90A-SDAG-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc6639; GFX90A-SDAG-NEXT:    v_add_co_u32_e32 v0, vcc, 1, v06640; GFX90A-SDAG-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc6641; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v12, v1, v46642; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v13, v0, v56643; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v0, v4, 06644; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v4, v[0:1]6645; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v14, v3, v66646; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v15, v2, v76647; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v2, v6, 06648; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v2, v6, v[2:3]6649; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v12, v1, v136650; GFX90A-SDAG-NEXT:    v_add3_u32 v9, v9, v13, v126651; GFX90A-SDAG-NEXT:    v_add3_u32 v3, v14, v3, v156652; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v56653; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v12, v1, v46654; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v4, 06655; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v1, v5, v126656; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v2, v76657; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v5, v3, v66658; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v2, v6, 06659; GFX90A-SDAG-NEXT:    v_add3_u32 v11, v11, v15, v146660; GFX90A-SDAG-NEXT:    v_add3_u32 v3, v3, v4, v56661; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v3, v106662; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v10, v[2:3]6663; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v7, v2, v116664; GFX90A-SDAG-NEXT:    v_add3_u32 v5, v6, v5, v76665; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v10, v1, v86666; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v0, v8, v[0:1]6667; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v8, v0, v96668; GFX90A-SDAG-NEXT:    v_add3_u32 v7, v10, v7, v86669; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v8, v6, v16670; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v9, v7, v06671; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v6, v0, v[6:7]6672; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v4, v36673; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v7, v5, v26674; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v2, v[4:5]6675; GFX90A-SDAG-NEXT:    v_add3_u32 v1, v9, v1, v86676; GFX90A-SDAG-NEXT:    v_add3_u32 v3, v7, v3, v66677; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]6678;6679; GFX90A-GISEL-LABEL: clpeak_imad_pat_v2i64:6680; GFX90A-GISEL:       ; %bb.0: ; %entry6681; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6682; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v12, vcc, 1, v06683; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v1, vcc6684; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v14, vcc, 1, v26685; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v3, vcc6686; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v12, v5, 06687; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 06688; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v13, v4, v[2:3]6689; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v1, v86690; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v14, v7, 06691; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v12, vcc, v0, v126692; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v14, v6, 06693; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v15, v6, v[8:9]6694; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v16, vcc, v1, v13, vcc6695; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, v3, v106696; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v14, vcc, v2, v146697; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v12, v5, 06698; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v15, vcc, v3, v15, vcc6699; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[8:9], s[4:5], v12, v4, 06700; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[12:13], s[4:5], v16, v4, v[10:11]6701; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[10:11], s[4:5], v14, v7, 06702; GFX90A-GISEL-NEXT:    v_add_u32_e32 v9, v9, v126703; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v14, v6, 06704; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[12:13], s[4:5], v15, v6, v[10:11]6705; GFX90A-GISEL-NEXT:    v_add_u32_e32 v10, v5, v126706; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v5, vcc, 1, v06707; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v6, vcc, 0, v1, vcc6708; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v11, vcc, 1, v26709; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v12, vcc, 0, v3, vcc6710; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v13, vcc, 1, v86711; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v8, v6, 06712; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v14, vcc, 0, v9, vcc6713; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v5, 06714; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v5, v[0:1]6715; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v4, v12, 06716; GFX90A-GISEL-NEXT:    v_add_co_u32_e32 v15, vcc, 1, v46717; GFX90A-GISEL-NEXT:    v_add_u32_e32 v8, v3, v66718; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v4, v11, 06719; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v10, v11, v[0:1]6720; GFX90A-GISEL-NEXT:    v_addc_co_u32_e32 v16, vcc, 0, v10, vcc6721; GFX90A-GISEL-NEXT:    v_add_u32_e32 v9, v7, v46722; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v14, 06723; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v13, 06724; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v8, v13, v[4:5]6725; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v6, v16, 06726; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v1, v26727; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, v15, 06728; GFX90A-GISEL-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v9, v15, v[4:5]6729; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, v3, v66730; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]6731;6732; GFX10-SDAG-LABEL: clpeak_imad_pat_v2i64:6733; GFX10-SDAG:       ; %bb.0: ; %entry6734; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6735; GFX10-SDAG-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 16736; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v1, vcc_lo6737; GFX10-SDAG-NEXT:    v_add_co_u32 v10, vcc_lo, v2, 16738; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v3, vcc_lo6739; GFX10-SDAG-NEXT:    v_mul_lo_u32 v12, v9, v46740; GFX10-SDAG-NEXT:    v_mul_lo_u32 v13, v8, v56741; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v8, v4, 06742; GFX10-SDAG-NEXT:    v_mul_lo_u32 v14, v11, v66743; GFX10-SDAG-NEXT:    v_mul_lo_u32 v15, v10, v76744; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v10, v6, 06745; GFX10-SDAG-NEXT:    v_add3_u32 v12, v1, v13, v126746; GFX10-SDAG-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v86747; GFX10-SDAG-NEXT:    v_add3_u32 v13, v3, v15, v146748; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v3, null, v12, v9, vcc_lo6749; GFX10-SDAG-NEXT:    v_add_co_u32 v8, vcc_lo, v2, v106750; GFX10-SDAG-NEXT:    v_add_co_ci_u32_e64 v9, null, v13, v11, vcc_lo6751; GFX10-SDAG-NEXT:    v_mul_lo_u32 v10, v3, v46752; GFX10-SDAG-NEXT:    v_mul_lo_u32 v11, v1, v56753; GFX10-SDAG-NEXT:    v_mul_lo_u32 v7, v8, v76754; GFX10-SDAG-NEXT:    v_mul_lo_u32 v9, v9, v66755; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v8, v6, 06756; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v1, v4, 06757; GFX10-SDAG-NEXT:    v_add3_u32 v6, v6, v7, v96758; GFX10-SDAG-NEXT:    v_add3_u32 v4, v4, v11, v106759; GFX10-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v126760; GFX10-SDAG-NEXT:    v_mul_lo_u32 v9, v6, v26761; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[7:8], null, v5, v2, v[5:6]6762; GFX10-SDAG-NEXT:    v_mul_lo_u32 v10, v4, v06763; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v0, v[3:4]6764; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v136765; GFX10-SDAG-NEXT:    v_mul_lo_u32 v6, v7, v66766; GFX10-SDAG-NEXT:    v_add3_u32 v1, v10, v1, v116767; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v46768; GFX10-SDAG-NEXT:    v_add3_u32 v8, v9, v8, v26769; GFX10-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v36770; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v0, v3, v[0:1]6771; GFX10-SDAG-NEXT:    v_mul_lo_u32 v10, v8, v56772; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v7, v5, v[7:8]6773; GFX10-SDAG-NEXT:    v_add3_u32 v1, v9, v1, v46774; GFX10-SDAG-NEXT:    v_add3_u32 v3, v10, v3, v66775; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]6776;6777; GFX10-GISEL-LABEL: clpeak_imad_pat_v2i64:6778; GFX10-GISEL:       ; %bb.0: ; %entry6779; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6780; GFX10-GISEL-NEXT:    v_add_co_u32 v11, vcc_lo, v0, 16781; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v1, vcc_lo6782; GFX10-GISEL-NEXT:    v_add_co_u32 v16, vcc_lo, v2, 16783; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v11, v4, 06784; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v3, vcc_lo6785; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v16, v6, 06786; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v11, v5, v[1:2]6787; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[9:10], null, v16, v7, v[3:4]6788; GFX10-GISEL-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v116789; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[12:13], null, v15, v4, v[8:9]6790; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[13:14], null, v17, v6, v[9:10]6791; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v1, v4, 06792; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v3, null, v12, v15, vcc_lo6793; GFX10-GISEL-NEXT:    v_add_co_u32 v16, vcc_lo, v2, v166794; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v18, null, v13, v17, vcc_lo6795; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[10:11], null, v16, v6, 06796; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[14:15], null, v1, v5, v[9:10]6797; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[15:16], null, v16, v7, v[11:12]6798; GFX10-GISEL-NEXT:    v_add_co_u32 v11, vcc_lo, v0, 16799; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v0, null, 0, v12, vcc_lo6800; GFX10-GISEL-NEXT:    v_add_co_u32 v12, vcc_lo, v2, 16801; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[16:17], null, v3, v4, v[14:15]6802; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v8, v11, 06803; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v13, vcc_lo6804; GFX10-GISEL-NEXT:    v_add_co_u32 v13, vcc_lo, v8, 16805; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[14:15], null, v18, v6, v[15:16]6806; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[6:7], null, v10, v12, 06807; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v16, vcc_lo6808; GFX10-GISEL-NEXT:    v_add_co_u32 v17, vcc_lo, v10, 16809; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v18, null, 0, v14, vcc_lo6810; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v8, v0, v[5:6]6811; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v6, v17, 06812; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[9:10], null, v10, v1, v[7:8]6813; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v13, 06814; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[7:8], null, v16, v11, v[8:9]6815; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v4, v15, v[1:2]6816; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v14, v12, v[9:10]6817; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[9:10], null, v6, v18, v[3:4]6818; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[5:6], null, v7, v13, v[4:5]6819; GFX10-GISEL-NEXT:    v_mad_u64_u32 v[3:4], null, v8, v17, v[9:10]6820; GFX10-GISEL-NEXT:    v_mov_b32_e32 v1, v56821; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]6822;6823; GFX11-SDAG-LABEL: clpeak_imad_pat_v2i64:6824; GFX11-SDAG:       ; %bb.0: ; %entry6825; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6826; GFX11-SDAG-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 16827; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6828; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v1, vcc_lo6829; GFX11-SDAG-NEXT:    v_add_co_u32 v10, vcc_lo, v2, 16830; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v3, vcc_lo6831; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)6832; GFX11-SDAG-NEXT:    v_mul_lo_u32 v12, v9, v46833; GFX11-SDAG-NEXT:    v_mul_lo_u32 v13, v8, v56834; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v8, v4, 06835; GFX11-SDAG-NEXT:    v_mul_lo_u32 v14, v11, v66836; GFX11-SDAG-NEXT:    v_mul_lo_u32 v15, v10, v76837; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v10, v6, 06838; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)6839; GFX11-SDAG-NEXT:    v_add3_u32 v1, v1, v13, v126840; GFX11-SDAG-NEXT:    v_add3_u32 v12, v3, v15, v146841; GFX11-SDAG-NEXT:    v_add_co_u32 v3, vcc_lo, v0, v86842; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6843; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v8, null, v1, v9, vcc_lo6844; GFX11-SDAG-NEXT:    v_add_co_u32 v9, vcc_lo, v2, v106845; GFX11-SDAG-NEXT:    v_add_co_ci_u32_e64 v10, null, v12, v11, vcc_lo6846; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)6847; GFX11-SDAG-NEXT:    v_mul_lo_u32 v11, v8, v46848; GFX11-SDAG-NEXT:    v_mul_lo_u32 v13, v3, v56849; GFX11-SDAG-NEXT:    v_mul_lo_u32 v14, v9, v76850; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)6851; GFX11-SDAG-NEXT:    v_mul_lo_u32 v10, v10, v66852; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[7:8], null, v9, v6, 06853; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v3, v4, 06854; GFX11-SDAG-NEXT:    v_add3_u32 v8, v8, v14, v106855; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6856; GFX11-SDAG-NEXT:    v_add3_u32 v6, v6, v13, v116857; GFX11-SDAG-NEXT:    v_mul_lo_u32 v11, v8, v26858; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[9:10], null, v7, v2, v[7:8]6859; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)6860; GFX11-SDAG-NEXT:    v_mul_lo_u32 v13, v6, v06861; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v5, v0, v[5:6]6862; GFX11-SDAG-NEXT:    v_mul_lo_u32 v0, v5, v16863; GFX11-SDAG-NEXT:    v_mul_lo_u32 v1, v7, v126864; GFX11-SDAG-NEXT:    v_mul_lo_u32 v6, v3, v66865; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)6866; GFX11-SDAG-NEXT:    v_add3_u32 v4, v13, v4, v06867; GFX11-SDAG-NEXT:    v_add3_u32 v10, v11, v10, v16868; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)6869; GFX11-SDAG-NEXT:    v_mul_lo_u32 v11, v4, v56870; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v5, v[3:4]6871; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v9, v86872; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v10, v76873; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[2:3], null, v9, v7, v[9:10]6874; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)6875; GFX11-SDAG-NEXT:    v_add3_u32 v1, v11, v1, v66876; GFX11-SDAG-NEXT:    v_add3_u32 v3, v5, v3, v46877; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]6878;6879; GFX11-GISEL-LABEL: clpeak_imad_pat_v2i64:6880; GFX11-GISEL:       ; %bb.0: ; %entry6881; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6882; GFX11-GISEL-NEXT:    v_add_co_u32 v11, vcc_lo, v0, 16883; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)6884; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v1, vcc_lo6885; GFX11-GISEL-NEXT:    v_add_co_u32 v16, vcc_lo, v2, 16886; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v11, v4, 06887; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v3, vcc_lo6888; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)6889; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v16, v6, 06890; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v11, v5, v[1:2]6891; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)6892; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[9:10], null, v16, v7, v[3:4]6893; GFX11-GISEL-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v116894; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[12:13], null, v15, v4, v[8:9]6895; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)6896; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[13:14], null, v17, v6, v[9:10]6897; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v1, v4, 06898; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)6899; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v3, null, v12, v15, vcc_lo6900; GFX11-GISEL-NEXT:    v_add_co_u32 v18, vcc_lo, v2, v166901; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v19, null, v13, v17, vcc_lo6902; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)6903; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[10:11], null, v18, v6, 06904; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[14:15], null, v1, v5, v[9:10]6905; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)6906; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[15:16], null, v18, v7, v[11:12]6907; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[16:17], null, v3, v4, v[14:15]6908; GFX11-GISEL-NEXT:    v_add_co_u32 v14, vcc_lo, v0, 16909; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)6910; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v0, null, 0, v12, vcc_lo6911; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[4:5], null, v8, v14, 06912; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)6913; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[17:18], null, v19, v6, v[15:16]6914; GFX11-GISEL-NEXT:    v_add_co_u32 v15, vcc_lo, v2, 16915; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v13, vcc_lo6916; GFX11-GISEL-NEXT:    v_add_co_u32 v13, vcc_lo, v8, 16917; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)6918; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[6:7], null, v10, v15, 06919; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v18, null, 0, v16, vcc_lo6920; GFX11-GISEL-NEXT:    v_add_co_u32 v19, vcc_lo, v10, 16921; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v20, null, 0, v17, vcc_lo6922; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)6923; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[11:12], null, v8, v0, v[5:6]6924; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[8:9], null, v10, v1, v[7:8]6925; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v13, 06926; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[2:3], null, v6, v19, 06927; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[9:10], null, v16, v14, v[11:12]6928; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)6929; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[10:11], null, v17, v15, v[8:9]6930; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[7:8], null, v4, v18, v[1:2]6931; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)6932; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[11:12], null, v6, v20, v[3:4]6933; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[5:6], null, v9, v13, v[7:8]6934; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6935; GFX11-GISEL-NEXT:    v_mad_u64_u32 v[3:4], null, v10, v19, v[11:12]6936; GFX11-GISEL-NEXT:    v_mov_b32_e32 v1, v56937; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]6938;6939; GFX1200-SDAG-LABEL: clpeak_imad_pat_v2i64:6940; GFX1200-SDAG:       ; %bb.0: ; %entry6941; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x06942; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x06943; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x06944; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x06945; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x06946; GFX1200-SDAG-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 16947; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6948; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v1, vcc_lo6949; GFX1200-SDAG-NEXT:    v_add_co_u32 v10, vcc_lo, v2, 16950; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6951; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v3, vcc_lo6952; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)6953; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v12, v9, v46954; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v13, v8, v56955; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v8, v4, 06956; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v14, v11, v66957; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v15, v10, v76958; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[2:3], null, v10, v6, 06959; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)6960; GFX1200-SDAG-NEXT:    v_add3_u32 v12, v1, v13, v126961; GFX1200-SDAG-NEXT:    v_add_co_u32 v1, vcc_lo, v0, v86962; GFX1200-SDAG-NEXT:    v_add3_u32 v13, v3, v15, v146963; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6964; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)6965; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v3, null, v12, v9, vcc_lo6966; GFX1200-SDAG-NEXT:    v_add_co_u32 v8, vcc_lo, v2, v106967; GFX1200-SDAG-NEXT:    s_wait_alu depctr_va_vcc(0)6968; GFX1200-SDAG-NEXT:    v_add_co_ci_u32_e64 v9, null, v13, v11, vcc_lo6969; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v10, v3, v46970; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v11, v1, v56971; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v7, v8, v76972; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)6973; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v9, v9, v66974; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[5:6], null, v8, v6, 06975; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[3:4], null, v1, v4, 06976; GFX1200-SDAG-NEXT:    v_add3_u32 v6, v6, v7, v96977; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)6978; GFX1200-SDAG-NEXT:    v_add3_u32 v4, v4, v11, v106979; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v11, v3, v126980; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)6981; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v9, v6, v26982; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[7:8], null, v5, v2, v[5:6]6983; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v10, v4, v06984; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v3, v0, v[3:4]6985; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v5, v136986; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)6987; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v6, v7, v66988; GFX1200-SDAG-NEXT:    v_add3_u32 v1, v10, v1, v116989; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6990; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v46991; GFX1200-SDAG-NEXT:    v_add3_u32 v8, v9, v8, v26992; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)6993; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v9, v1, v36994; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v0, v3, v[0:1]6995; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v10, v8, v56996; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[2:3], null, v7, v5, v[7:8]6997; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)6998; GFX1200-SDAG-NEXT:    v_add3_u32 v1, v9, v1, v46999; GFX1200-SDAG-NEXT:    v_add3_u32 v3, v10, v3, v67000; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]7001;7002; GFX1200-GISEL-LABEL: clpeak_imad_pat_v2i64:7003; GFX1200-GISEL:       ; %bb.0: ; %entry7004; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x07005; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x07006; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x07007; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x07008; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x07009; GFX1200-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v0, 17010; GFX1200-GISEL-NEXT:    v_add_co_u32 v9, s0, v2, 17011; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7012; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v10, null, 0, v1, vcc_lo7013; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)7014; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v8, v47015; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v1, v9, v67016; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_sdst(0)7017; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v3, s07018; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v12, v8, v47019; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v13, v9, v67020; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)7021; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[2:3], null, v8, v5, v[0:1]7022; GFX1200-GISEL-NEXT:    v_add_co_u32 v14, vcc_lo, v12, v87023; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)7024; GFX1200-GISEL-NEXT:    v_add_co_u32 v15, s0, v13, v97025; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[0:1], null, v9, v7, v[1:2]7026; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)7027; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v10, v4, v[2:3]7028; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[2:3], null, v11, v6, v[0:1]7029; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v14, v47030; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v3, v15, v67031; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7032; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v16, null, v1, v10, vcc_lo7033; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_sdst(0)7034; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7035; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v11, null, v2, v11, s07036; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[8:9], null, v14, v5, v[0:1]7037; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)7038; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[9:10], null, v15, v7, v[3:4]7039; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v10, v15, v67040; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v7, v14, v47041; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[3:4], null, v16, v4, v[8:9]7042; GFX1200-GISEL-NEXT:    v_add_co_u32 v8, vcc_lo, v12, 17043; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4)7044; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[4:5], null, v11, v6, v[9:10]7045; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7046; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo7047; GFX1200-GISEL-NEXT:    v_add_co_u32 v9, vcc_lo, v13, 17048; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v7, v87049; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7050; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v2, null, 0, v2, vcc_lo7051; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3)7052; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v1, v10, v97053; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v15, v10, v97054; GFX1200-GISEL-NEXT:    v_add_co_u32 v12, vcc_lo, v7, 17055; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7056; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v3, vcc_lo7057; GFX1200-GISEL-NEXT:    v_add_co_u32 v14, vcc_lo, v10, 17058; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v11, v7, v87059; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[5:6], null, v7, v5, v[0:1]7060; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v10, v2, v[1:2]7061; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)7062; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v2, v15, v147063; GFX1200-GISEL-NEXT:    s_wait_alu depctr_va_vcc(0)7064; GFX1200-GISEL-NEXT:    v_add_co_ci_u32_e64 v10, null, 0, v4, vcc_lo7065; GFX1200-GISEL-NEXT:    v_mul_hi_u32 v0, v11, v127066; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[5:6], null, v3, v8, v[5:6]7067; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[3:4], null, v4, v9, v[1:2]7068; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)7069; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[6:7], null, v11, v13, v[0:1]7070; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v11, v127071; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[7:8], null, v15, v10, v[2:3]7072; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)7073; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[1:2], null, v5, v12, v[6:7]7074; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v15, v147075; GFX1200-GISEL-NEXT:    v_mad_co_u64_u32 v[3:4], null, v3, v14, v[7:8]7076; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]7077;7078; GFX1250-SDAG-LABEL: clpeak_imad_pat_v2i64:7079; GFX1250-SDAG:       ; %bb.0: ; %entry7080; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x07081; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x07082; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]7083; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[2:3], 1, v[2:3]7084; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7085; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[8:9], v[0:1], v[4:5]7086; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[10:11], v[2:3], v[6:7]7087; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7088; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[0:1], v[8:9], v[0:1]7089; GFX1250-SDAG-NEXT:    v_add_nc_u64_e32 v[2:3], v[10:11], v[2:3]7090; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7091; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[4:5], v[0:1], v[4:5]7092; GFX1250-SDAG-NEXT:    v_mul_u64_e32 v[6:7], v[2:3], v[6:7]7093; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7094; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[12:13], v4, v8, v[4:5]7095; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[14:15], v6, v10, v[6:7]7096; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7097; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v5, v8, v137098; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v7, v10, v157099; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7100; GFX1250-SDAG-NEXT:    v_mad_u32 v13, v4, v9, v07101; GFX1250-SDAG-NEXT:    v_mad_u32 v15, v6, v11, v17102; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7103; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[0:1], v12, v4, v[12:13]7104; GFX1250-SDAG-NEXT:    v_mad_nc_u64_u32 v[2:3], v14, v6, v[14:15]7105; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7106; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v13, v4, v17107; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v15, v6, v37108; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7109; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v12, v5, v17110; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v14, v7, v37111; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]7112;7113; GFX1250-GISEL-LABEL: clpeak_imad_pat_v2i64:7114; GFX1250-GISEL:       ; %bb.0: ; %entry7115; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x07116; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x07117; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]7118; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[2:3], 1, v[2:3]7119; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7120; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[8:9], v[0:1], v[4:5]7121; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[10:11], v[2:3], v[6:7]7122; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7123; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], v[8:9], v[0:1]7124; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[2:3], v[10:11], v[2:3]7125; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7126; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[0:1], v[0:1], v[4:5]7127; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[2:3], v[2:3], v[6:7]7128; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[4:5], 1, v[8:9]7129; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[6:7], 1, v[10:11]7130; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7131; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[4:5], v[0:1], v[4:5]7132; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[6:7], v[2:3], v[6:7]7133; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[0:1], 1, v[0:1]7134; GFX1250-GISEL-NEXT:    v_add_nc_u64_e32 v[2:3], 1, v[2:3]7135; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)7136; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[0:1], v[4:5], v[0:1]7137; GFX1250-GISEL-NEXT:    v_mul_u64_e32 v[2:3], v[6:7], v[2:3]7138; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]7139entry:7140  %y18 = add <2 x i64> %x, <i64 1, i64 1>7141  %add = mul <2 x i64> %y18, %y7142  %mul119 = add <2 x i64> %add, %y187143  %add2 = mul <2 x i64> %mul119, %y7144  %add220 = add <2 x i64> %add, <i64 1, i64 1>7145  %add422 = add <2 x i64> %add2, <i64 1, i64 1>7146  %mul521 = mul <2 x i64> %add2, %add2207147  %add6 = mul <2 x i64> %mul521, %add4227148  ret <2 x i64> %add67149}7150 7151define i32 @v_multi_use_mul_chain_add_other_use_all(i32 %arg, i32 %arg1, i32 %arg2, ptr addrspace(1) %ptr) {7152; GFX6-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_all:7153; GFX6-SDAG:       ; %bb.0: ; %bb7154; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7155; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v07156; GFX6-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17157; GFX6-SDAG-NEXT:    s_mov_b32 s6, 07158; GFX6-SDAG-NEXT:    s_mov_b32 s7, 0xf0007159; GFX6-SDAG-NEXT:    s_mov_b32 s4, s67160; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v07161; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17162; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27163; GFX6-SDAG-NEXT:    s_mov_b32 s5, s67164; GFX6-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v17165; GFX6-SDAG-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647166; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0)7167; GFX6-SDAG-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647168; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0)7169; GFX6-SDAG-NEXT:    buffer_store_dword v5, v[3:4], s[4:7], 0 addr647170; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(1)7171; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v5, v17172; GFX6-SDAG-NEXT:    s_waitcnt expcnt(0)7173; GFX6-SDAG-NEXT:    s_setpc_b64 s[30:31]7174;7175; GFX6-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_all:7176; GFX6-GISEL:       ; %bb.0: ; %bb7177; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7178; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07179; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17180; GFX6-GISEL-NEXT:    s_mov_b32 s6, 07181; GFX6-GISEL-NEXT:    s_mov_b32 s7, 0xf0007182; GFX6-GISEL-NEXT:    s_mov_b64 s[4:5], 07183; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v07184; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17185; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27186; GFX6-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v17187; GFX6-GISEL-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647188; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0)7189; GFX6-GISEL-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647190; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0)7191; GFX6-GISEL-NEXT:    buffer_store_dword v5, v[3:4], s[4:7], 0 addr647192; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(1)7193; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v5, v17194; GFX6-GISEL-NEXT:    s_waitcnt expcnt(0)7195; GFX6-GISEL-NEXT:    s_setpc_b64 s[30:31]7196;7197; GFX7-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_all:7198; GFX7-SDAG:       ; %bb.0: ; %bb7199; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7200; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v07201; GFX7-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17202; GFX7-SDAG-NEXT:    s_mov_b32 s6, 07203; GFX7-SDAG-NEXT:    s_mov_b32 s7, 0xf0007204; GFX7-SDAG-NEXT:    s_mov_b32 s4, s67205; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v07206; GFX7-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17207; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27208; GFX7-SDAG-NEXT:    s_mov_b32 s5, s67209; GFX7-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v17210; GFX7-SDAG-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647211; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)7212; GFX7-SDAG-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647213; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)7214; GFX7-SDAG-NEXT:    buffer_store_dword v5, v[3:4], s[4:7], 0 addr647215; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)7216; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v5, v17217; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]7218;7219; GFX7-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_all:7220; GFX7-GISEL:       ; %bb.0: ; %bb7221; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7222; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07223; GFX7-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17224; GFX7-GISEL-NEXT:    s_mov_b32 s6, 07225; GFX7-GISEL-NEXT:    s_mov_b32 s7, 0xf0007226; GFX7-GISEL-NEXT:    s_mov_b64 s[4:5], 07227; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v07228; GFX7-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17229; GFX7-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27230; GFX7-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v17231; GFX7-GISEL-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647232; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)7233; GFX7-GISEL-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647234; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)7235; GFX7-GISEL-NEXT:    buffer_store_dword v5, v[3:4], s[4:7], 0 addr647236; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)7237; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v5, v17238; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]7239;7240; GFX8-LABEL: v_multi_use_mul_chain_add_other_use_all:7241; GFX8:       ; %bb.0: ; %bb7242; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7243; GFX8-NEXT:    v_add_u32_e32 v0, vcc, 1, v07244; GFX8-NEXT:    v_mul_lo_u32 v2, v0, v17245; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v2, v07246; GFX8-NEXT:    v_mul_lo_u32 v0, v0, v17247; GFX8-NEXT:    v_add_u32_e32 v1, vcc, 1, v27248; GFX8-NEXT:    v_mul_lo_u32 v5, v0, v17249; GFX8-NEXT:    flat_store_dword v[3:4], v27250; GFX8-NEXT:    s_waitcnt vmcnt(0)7251; GFX8-NEXT:    flat_store_dword v[3:4], v07252; GFX8-NEXT:    s_waitcnt vmcnt(0)7253; GFX8-NEXT:    flat_store_dword v[3:4], v57254; GFX8-NEXT:    s_waitcnt vmcnt(0)7255; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v5, v17256; GFX8-NEXT:    s_setpc_b64 s[30:31]7257;7258; GFX900-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_all:7259; GFX900-SDAG:       ; %bb.0: ; %bb7260; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7261; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07262; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17263; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07264; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17265; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27266; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v17267; GFX900-SDAG-NEXT:    global_store_dword v[3:4], v2, off7268; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0)7269; GFX900-SDAG-NEXT:    global_store_dword v[3:4], v0, off7270; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0)7271; GFX900-SDAG-NEXT:    global_store_dword v[3:4], v5, off7272; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0)7273; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v5, v17274; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]7275;7276; GFX900-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_all:7277; GFX900-GISEL:       ; %bb.0: ; %bb7278; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7279; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07280; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17281; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v07282; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17283; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27284; GFX900-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v17285; GFX900-GISEL-NEXT:    global_store_dword v[3:4], v2, off7286; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0)7287; GFX900-GISEL-NEXT:    global_store_dword v[3:4], v0, off7288; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0)7289; GFX900-GISEL-NEXT:    global_store_dword v[3:4], v5, off7290; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0)7291; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v5, v17292; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]7293;7294; GFX90A-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_all:7295; GFX90A-SDAG:       ; %bb.0: ; %bb7296; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7297; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07298; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17299; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07300; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v5, v47301; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v4, v37302; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17303; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27304; GFX90A-SDAG-NEXT:    global_store_dword v[4:5], v2, off7305; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0)7306; GFX90A-SDAG-NEXT:    global_store_dword v[4:5], v0, off7307; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0)7308; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17309; GFX90A-SDAG-NEXT:    global_store_dword v[4:5], v0, off7310; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0)7311; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v0, v17312; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]7313;7314; GFX90A-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_all:7315; GFX90A-GISEL:       ; %bb.0: ; %bb7316; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7317; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07318; GFX90A-GISEL-NEXT:    v_mov_b32_e32 v2, v37319; GFX90A-GISEL-NEXT:    v_mov_b32_e32 v3, v47320; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v17321; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v4, v07322; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17323; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v47324; GFX90A-GISEL-NEXT:    global_store_dword v[2:3], v4, off7325; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0)7326; GFX90A-GISEL-NEXT:    global_store_dword v[2:3], v0, off7327; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0)7328; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17329; GFX90A-GISEL-NEXT:    global_store_dword v[2:3], v0, off7330; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0)7331; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v0, v17332; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]7333;7334; GFX10-LABEL: v_multi_use_mul_chain_add_other_use_all:7335; GFX10:       ; %bb.0: ; %bb7336; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7337; GFX10-NEXT:    v_add_nc_u32_e32 v0, 1, v07338; GFX10-NEXT:    v_mul_lo_u32 v2, v0, v17339; GFX10-NEXT:    v_add_nc_u32_e32 v0, v2, v07340; GFX10-NEXT:    v_mul_lo_u32 v1, v0, v17341; GFX10-NEXT:    v_add_nc_u32_e32 v0, 1, v27342; GFX10-NEXT:    v_mul_lo_u32 v5, v1, v07343; GFX10-NEXT:    global_store_dword v[3:4], v2, off7344; GFX10-NEXT:    s_waitcnt_vscnt null, 0x07345; GFX10-NEXT:    global_store_dword v[3:4], v1, off7346; GFX10-NEXT:    s_waitcnt_vscnt null, 0x07347; GFX10-NEXT:    global_store_dword v[3:4], v5, off7348; GFX10-NEXT:    s_waitcnt_vscnt null, 0x07349; GFX10-NEXT:    v_add_nc_u32_e32 v0, v5, v07350; GFX10-NEXT:    s_setpc_b64 s[30:31]7351;7352; GFX11-LABEL: v_multi_use_mul_chain_add_other_use_all:7353; GFX11:       ; %bb.0: ; %bb7354; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7355; GFX11-NEXT:    v_add_nc_u32_e32 v0, 1, v07356; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7357; GFX11-NEXT:    v_mul_lo_u32 v2, v0, v17358; GFX11-NEXT:    v_add_nc_u32_e32 v0, v2, v07359; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7360; GFX11-NEXT:    v_mul_lo_u32 v1, v0, v17361; GFX11-NEXT:    v_add_nc_u32_e32 v0, 1, v27362; GFX11-NEXT:    v_mul_lo_u32 v5, v1, v07363; GFX11-NEXT:    global_store_b32 v[3:4], v2, off dlc7364; GFX11-NEXT:    s_waitcnt_vscnt null, 0x07365; GFX11-NEXT:    global_store_b32 v[3:4], v1, off dlc7366; GFX11-NEXT:    s_waitcnt_vscnt null, 0x07367; GFX11-NEXT:    global_store_b32 v[3:4], v5, off dlc7368; GFX11-NEXT:    s_waitcnt_vscnt null, 0x07369; GFX11-NEXT:    v_add_nc_u32_e32 v0, v5, v07370; GFX11-NEXT:    s_setpc_b64 s[30:31]7371;7372; GFX1200-LABEL: v_multi_use_mul_chain_add_other_use_all:7373; GFX1200:       ; %bb.0: ; %bb7374; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x07375; GFX1200-NEXT:    s_wait_expcnt 0x07376; GFX1200-NEXT:    s_wait_samplecnt 0x07377; GFX1200-NEXT:    s_wait_bvhcnt 0x07378; GFX1200-NEXT:    s_wait_kmcnt 0x07379; GFX1200-NEXT:    v_add_nc_u32_e32 v0, 1, v07380; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7381; GFX1200-NEXT:    v_mul_lo_u32 v2, v0, v17382; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v2, v07383; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7384; GFX1200-NEXT:    v_mul_lo_u32 v1, v0, v17385; GFX1200-NEXT:    v_add_nc_u32_e32 v0, 1, v27386; GFX1200-NEXT:    v_mul_lo_u32 v5, v1, v07387; GFX1200-NEXT:    s_wait_storecnt 0x07388; GFX1200-NEXT:    global_store_b32 v[3:4], v2, off scope:SCOPE_SYS7389; GFX1200-NEXT:    s_wait_storecnt 0x07390; GFX1200-NEXT:    global_store_b32 v[3:4], v1, off scope:SCOPE_SYS7391; GFX1200-NEXT:    s_wait_storecnt 0x07392; GFX1200-NEXT:    global_store_b32 v[3:4], v5, off scope:SCOPE_SYS7393; GFX1200-NEXT:    s_wait_storecnt 0x07394; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v5, v07395; GFX1200-NEXT:    s_setpc_b64 s[30:31]7396;7397; GFX1250-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_all:7398; GFX1250-SDAG:       ; %bb.0: ; %bb7399; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x07400; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x07401; GFX1250-SDAG-NEXT:    v_dual_mov_b32 v5, v4 :: v_dual_add_nc_u32 v0, 1, v07402; GFX1250-SDAG-NEXT:    v_mov_b32_e32 v4, v37403; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7404; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17405; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v07406; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7407; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v17408; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v27409; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v07410; GFX1250-SDAG-NEXT:    global_store_b32 v[4:5], v2, off scope:SCOPE_SYS7411; GFX1250-SDAG-NEXT:    s_wait_storecnt 0x07412; GFX1250-SDAG-NEXT:    s_wait_xcnt 0x07413; GFX1250-SDAG-NEXT:    global_store_b32 v[4:5], v1, off scope:SCOPE_SYS7414; GFX1250-SDAG-NEXT:    s_wait_storecnt 0x07415; GFX1250-SDAG-NEXT:    s_wait_xcnt 0x07416; GFX1250-SDAG-NEXT:    global_store_b32 v[4:5], v3, off scope:SCOPE_SYS7417; GFX1250-SDAG-NEXT:    s_wait_storecnt 0x07418; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v3, v07419; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]7420;7421; GFX1250-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_all:7422; GFX1250-GISEL:       ; %bb.0: ; %bb7423; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x07424; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x07425; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_mov_b32 v2, v37426; GFX1250-GISEL-NEXT:    v_mov_b32_e32 v3, v47427; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7428; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v17429; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v07430; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7431; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17432; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v47433; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v07434; GFX1250-GISEL-NEXT:    global_store_b32 v[2:3], v4, off scope:SCOPE_SYS7435; GFX1250-GISEL-NEXT:    s_wait_storecnt 0x07436; GFX1250-GISEL-NEXT:    s_wait_xcnt 0x07437; GFX1250-GISEL-NEXT:    global_store_b32 v[2:3], v1, off scope:SCOPE_SYS7438; GFX1250-GISEL-NEXT:    s_wait_storecnt 0x07439; GFX1250-GISEL-NEXT:    s_wait_xcnt 0x07440; GFX1250-GISEL-NEXT:    global_store_b32 v[2:3], v5, off scope:SCOPE_SYS7441; GFX1250-GISEL-NEXT:    s_wait_storecnt 0x07442; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v5, v07443; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]7444bb:7445  %i = add i32 %arg, 17446  %i3 = mul i32 %i, %arg17447  store volatile i32 %i3, ptr addrspace(1) %ptr7448  %i4 = add i32 %i3, %i7449  %i5 = mul i32 %i4, %arg17450  store volatile i32 %i5, ptr addrspace(1) %ptr7451  %i6 = add i32 %i3, 17452  %i7 = mul i32 %i5, %i67453  store volatile i32 %i7, ptr addrspace(1) %ptr7454  %i8 = add i32 %i7, %i67455  ret i32 %i87456}7457 7458define i32 @v_multi_use_mul_chain_add_other_use_some(i32 %arg, i32 %arg1, i32 %arg2, ptr addrspace(1) %ptr) {7459; GFX6-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_some:7460; GFX6-SDAG:       ; %bb.0: ; %bb7461; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7462; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v07463; GFX6-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17464; GFX6-SDAG-NEXT:    s_mov_b32 s6, 07465; GFX6-SDAG-NEXT:    s_mov_b32 s7, 0xf0007466; GFX6-SDAG-NEXT:    s_mov_b32 s4, s67467; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v07468; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17469; GFX6-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27470; GFX6-SDAG-NEXT:    s_mov_b32 s5, s67471; GFX6-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17472; GFX6-SDAG-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647473; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0)7474; GFX6-SDAG-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647475; GFX6-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0)7476; GFX6-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v17477; GFX6-SDAG-NEXT:    s_setpc_b64 s[30:31]7478;7479; GFX6-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_some:7480; GFX6-GISEL:       ; %bb.0: ; %bb7481; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7482; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07483; GFX6-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17484; GFX6-GISEL-NEXT:    s_mov_b32 s6, 07485; GFX6-GISEL-NEXT:    s_mov_b32 s7, 0xf0007486; GFX6-GISEL-NEXT:    s_mov_b64 s[4:5], 07487; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v07488; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17489; GFX6-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27490; GFX6-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17491; GFX6-GISEL-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647492; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0)7493; GFX6-GISEL-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647494; GFX6-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0)7495; GFX6-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v17496; GFX6-GISEL-NEXT:    s_setpc_b64 s[30:31]7497;7498; GFX7-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_some:7499; GFX7-SDAG:       ; %bb.0: ; %bb7500; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7501; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v07502; GFX7-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17503; GFX7-SDAG-NEXT:    s_mov_b32 s6, 07504; GFX7-SDAG-NEXT:    s_mov_b32 s7, 0xf0007505; GFX7-SDAG-NEXT:    s_mov_b32 s4, s67506; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v07507; GFX7-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17508; GFX7-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27509; GFX7-SDAG-NEXT:    s_mov_b32 s5, s67510; GFX7-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17511; GFX7-SDAG-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647512; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)7513; GFX7-SDAG-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647514; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)7515; GFX7-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v17516; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]7517;7518; GFX7-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_some:7519; GFX7-GISEL:       ; %bb.0: ; %bb7520; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7521; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07522; GFX7-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17523; GFX7-GISEL-NEXT:    s_mov_b32 s6, 07524; GFX7-GISEL-NEXT:    s_mov_b32 s7, 0xf0007525; GFX7-GISEL-NEXT:    s_mov_b64 s[4:5], 07526; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v07527; GFX7-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17528; GFX7-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27529; GFX7-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17530; GFX7-GISEL-NEXT:    buffer_store_dword v2, v[3:4], s[4:7], 0 addr647531; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)7532; GFX7-GISEL-NEXT:    buffer_store_dword v0, v[3:4], s[4:7], 0 addr647533; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)7534; GFX7-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v17535; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]7536;7537; GFX8-LABEL: v_multi_use_mul_chain_add_other_use_some:7538; GFX8:       ; %bb.0: ; %bb7539; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7540; GFX8-NEXT:    v_add_u32_e32 v0, vcc, 1, v07541; GFX8-NEXT:    v_mul_lo_u32 v2, v0, v17542; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v2, v07543; GFX8-NEXT:    v_mul_lo_u32 v0, v0, v17544; GFX8-NEXT:    v_add_u32_e32 v1, vcc, 1, v27545; GFX8-NEXT:    v_mul_lo_u32 v0, v0, v17546; GFX8-NEXT:    flat_store_dword v[3:4], v27547; GFX8-NEXT:    s_waitcnt vmcnt(0)7548; GFX8-NEXT:    flat_store_dword v[3:4], v07549; GFX8-NEXT:    s_waitcnt vmcnt(0)7550; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v17551; GFX8-NEXT:    s_setpc_b64 s[30:31]7552;7553; GFX900-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_some:7554; GFX900-SDAG:       ; %bb.0: ; %bb7555; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7556; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07557; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17558; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07559; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17560; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27561; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17562; GFX900-SDAG-NEXT:    global_store_dword v[3:4], v2, off7563; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0)7564; GFX900-SDAG-NEXT:    global_store_dword v[3:4], v0, off7565; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0)7566; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v0, v17567; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]7568;7569; GFX900-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_some:7570; GFX900-GISEL:       ; %bb.0: ; %bb7571; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7572; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07573; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17574; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v07575; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17576; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27577; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17578; GFX900-GISEL-NEXT:    global_store_dword v[3:4], v2, off7579; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0)7580; GFX900-GISEL-NEXT:    global_store_dword v[3:4], v0, off7581; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0)7582; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v0, v17583; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]7584;7585; GFX90A-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_some:7586; GFX90A-SDAG:       ; %bb.0: ; %bb7587; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7588; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07589; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17590; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07591; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17592; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27593; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v5, v47594; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v4, v37595; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17596; GFX90A-SDAG-NEXT:    global_store_dword v[4:5], v2, off7597; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0)7598; GFX90A-SDAG-NEXT:    global_store_dword v[4:5], v0, off7599; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0)7600; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v0, v17601; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]7602;7603; GFX90A-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_some:7604; GFX90A-GISEL:       ; %bb.0: ; %bb7605; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7606; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07607; GFX90A-GISEL-NEXT:    v_mov_b32_e32 v2, v37608; GFX90A-GISEL-NEXT:    v_mov_b32_e32 v3, v47609; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v17610; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v4, v07611; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17612; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v47613; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17614; GFX90A-GISEL-NEXT:    global_store_dword v[2:3], v4, off7615; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0)7616; GFX90A-GISEL-NEXT:    global_store_dword v[2:3], v0, off7617; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0)7618; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v0, v17619; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]7620;7621; GFX10-LABEL: v_multi_use_mul_chain_add_other_use_some:7622; GFX10:       ; %bb.0: ; %bb7623; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7624; GFX10-NEXT:    v_add_nc_u32_e32 v0, 1, v07625; GFX10-NEXT:    v_mul_lo_u32 v2, v0, v17626; GFX10-NEXT:    v_add_nc_u32_e32 v0, v2, v07627; GFX10-NEXT:    v_mul_lo_u32 v0, v0, v17628; GFX10-NEXT:    v_add_nc_u32_e32 v1, 1, v27629; GFX10-NEXT:    v_mul_lo_u32 v5, v0, v17630; GFX10-NEXT:    global_store_dword v[3:4], v2, off7631; GFX10-NEXT:    s_waitcnt_vscnt null, 0x07632; GFX10-NEXT:    global_store_dword v[3:4], v5, off7633; GFX10-NEXT:    s_waitcnt_vscnt null, 0x07634; GFX10-NEXT:    v_add_nc_u32_e32 v0, v5, v17635; GFX10-NEXT:    s_setpc_b64 s[30:31]7636;7637; GFX11-LABEL: v_multi_use_mul_chain_add_other_use_some:7638; GFX11:       ; %bb.0: ; %bb7639; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7640; GFX11-NEXT:    v_add_nc_u32_e32 v0, 1, v07641; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7642; GFX11-NEXT:    v_mul_lo_u32 v2, v0, v17643; GFX11-NEXT:    v_add_nc_u32_e32 v0, v2, v07644; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7645; GFX11-NEXT:    v_mul_lo_u32 v0, v0, v17646; GFX11-NEXT:    v_add_nc_u32_e32 v1, 1, v27647; GFX11-NEXT:    v_mul_lo_u32 v5, v0, v17648; GFX11-NEXT:    global_store_b32 v[3:4], v2, off dlc7649; GFX11-NEXT:    s_waitcnt_vscnt null, 0x07650; GFX11-NEXT:    global_store_b32 v[3:4], v5, off dlc7651; GFX11-NEXT:    s_waitcnt_vscnt null, 0x07652; GFX11-NEXT:    v_add_nc_u32_e32 v0, v5, v17653; GFX11-NEXT:    s_setpc_b64 s[30:31]7654;7655; GFX1200-LABEL: v_multi_use_mul_chain_add_other_use_some:7656; GFX1200:       ; %bb.0: ; %bb7657; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x07658; GFX1200-NEXT:    s_wait_expcnt 0x07659; GFX1200-NEXT:    s_wait_samplecnt 0x07660; GFX1200-NEXT:    s_wait_bvhcnt 0x07661; GFX1200-NEXT:    s_wait_kmcnt 0x07662; GFX1200-NEXT:    v_add_nc_u32_e32 v0, 1, v07663; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7664; GFX1200-NEXT:    v_mul_lo_u32 v2, v0, v17665; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v2, v07666; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7667; GFX1200-NEXT:    v_mul_lo_u32 v0, v0, v17668; GFX1200-NEXT:    v_add_nc_u32_e32 v1, 1, v27669; GFX1200-NEXT:    v_mul_lo_u32 v5, v0, v17670; GFX1200-NEXT:    s_wait_storecnt 0x07671; GFX1200-NEXT:    global_store_b32 v[3:4], v2, off scope:SCOPE_SYS7672; GFX1200-NEXT:    s_wait_storecnt 0x07673; GFX1200-NEXT:    global_store_b32 v[3:4], v5, off scope:SCOPE_SYS7674; GFX1200-NEXT:    s_wait_storecnt 0x07675; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v5, v17676; GFX1200-NEXT:    s_setpc_b64 s[30:31]7677;7678; GFX1250-SDAG-LABEL: v_multi_use_mul_chain_add_other_use_some:7679; GFX1250-SDAG:       ; %bb.0: ; %bb7680; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x07681; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x07682; GFX1250-SDAG-NEXT:    v_dual_mov_b32 v5, v4 :: v_dual_add_nc_u32 v0, 1, v07683; GFX1250-SDAG-NEXT:    v_mov_b32_e32 v4, v37684; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7685; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17686; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v07687; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7688; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17689; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v27690; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v17691; GFX1250-SDAG-NEXT:    global_store_b32 v[4:5], v2, off scope:SCOPE_SYS7692; GFX1250-SDAG-NEXT:    s_wait_storecnt 0x07693; GFX1250-SDAG-NEXT:    s_wait_xcnt 0x07694; GFX1250-SDAG-NEXT:    global_store_b32 v[4:5], v3, off scope:SCOPE_SYS7695; GFX1250-SDAG-NEXT:    s_wait_storecnt 0x07696; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v3, v17697; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]7698;7699; GFX1250-GISEL-LABEL: v_multi_use_mul_chain_add_other_use_some:7700; GFX1250-GISEL:       ; %bb.0: ; %bb7701; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x07702; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x07703; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_mov_b32 v2, v37704; GFX1250-GISEL-NEXT:    v_mov_b32_e32 v3, v47705; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7706; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v17707; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v07708; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7709; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17710; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v47711; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v0, v17712; GFX1250-GISEL-NEXT:    global_store_b32 v[2:3], v4, off scope:SCOPE_SYS7713; GFX1250-GISEL-NEXT:    s_wait_storecnt 0x07714; GFX1250-GISEL-NEXT:    s_wait_xcnt 0x07715; GFX1250-GISEL-NEXT:    global_store_b32 v[2:3], v5, off scope:SCOPE_SYS7716; GFX1250-GISEL-NEXT:    s_wait_storecnt 0x07717; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v5, v17718; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]7719bb:7720  %i = add i32 %arg, 17721  %i3 = mul i32 %i, %arg17722  store volatile i32 %i3, ptr addrspace(1) %ptr7723  %i4 = add i32 %i3, %i7724  %i5 = mul i32 %i4, %arg17725  %i6 = add i32 %i3, 17726  %i7 = mul i32 %i5, %i67727  store volatile i32 %i7, ptr addrspace(1) %ptr7728  %i8 = add i32 %i7, %i67729  ret i32 %i87730}7731 7732define i32 @clpeak_imad_pat_i32_x2(i32 %x, i32 %y) {7733; GFX67-SDAG-LABEL: clpeak_imad_pat_i32_x2:7734; GFX67-SDAG:       ; %bb.0: ; %entry7735; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7736; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v07737; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17738; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v2, v07739; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17740; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27741; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17742; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v2, v17743; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07744; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v27745; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17746; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v2, v17747; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07748; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v27749; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v07750; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07751; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v17752; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]7753;7754; GFX67-GISEL-LABEL: clpeak_imad_pat_i32_x2:7755; GFX67-GISEL:       ; %bb.0: ; %entry7756; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7757; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07758; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17759; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v2, v07760; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17761; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27762; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17763; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v2, v17764; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07765; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27766; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17767; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v2, v17768; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07769; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v27770; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17771; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v07772; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07773; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]7774;7775; GFX8-SDAG-LABEL: clpeak_imad_pat_i32_x2:7776; GFX8-SDAG:       ; %bb.0: ; %entry7777; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7778; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v07779; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17780; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v2, v07781; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17782; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v27783; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17784; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v2, v17785; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07786; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v27787; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17788; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v2, v17789; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07790; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v0, v27791; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v07792; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07793; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v17794; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]7795;7796; GFX8-GISEL-LABEL: clpeak_imad_pat_i32_x2:7797; GFX8-GISEL:       ; %bb.0: ; %entry7798; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7799; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v07800; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17801; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v2, v07802; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17803; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v27804; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17805; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v2, v17806; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07807; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v27808; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17809; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v2, v17810; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07811; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v27812; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17813; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v07814; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07815; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]7816;7817; GFX900-SDAG-LABEL: clpeak_imad_pat_i32_x2:7818; GFX900-SDAG:       ; %bb.0: ; %entry7819; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7820; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07821; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17822; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07823; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17824; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27825; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17826; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v2, v17827; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07828; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27829; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17830; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v2, v17831; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07832; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v0, v2, v[0:1]7833; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v1, v0, v[1:2]7834; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]7835;7836; GFX900-GISEL-LABEL: clpeak_imad_pat_i32_x2:7837; GFX900-GISEL:       ; %bb.0: ; %entry7838; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7839; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07840; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17841; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v2, v07842; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17843; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27844; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17845; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, v2, v17846; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07847; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27848; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17849; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, v2, v17850; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07851; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27852; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17853; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07854; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07855; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]7856;7857; GFX90A-SDAG-LABEL: clpeak_imad_pat_i32_x2:7858; GFX90A-SDAG:       ; %bb.0: ; %entry7859; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7860; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v07861; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17862; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v2, v07863; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17864; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27865; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17866; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v2, v17867; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07868; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v27869; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17870; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v2, v17871; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07872; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v2, v[0:1]7873; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v2, v0, v[2:3]7874; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]7875;7876; GFX90A-GISEL-LABEL: clpeak_imad_pat_i32_x2:7877; GFX90A-GISEL:       ; %bb.0: ; %entry7878; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7879; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v07880; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17881; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v2, v07882; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17883; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27884; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17885; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v2, v17886; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07887; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27888; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17889; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v2, v17890; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07891; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v27892; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v07893; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17894; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v27895; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]7896;7897; GFX10-SDAG-LABEL: clpeak_imad_pat_i32_x2:7898; GFX10-SDAG:       ; %bb.0: ; %entry7899; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7900; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v07901; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17902; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v07903; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17904; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v27905; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17906; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v17907; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07908; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v27909; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17910; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v17911; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07912; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v0, v2, v[0:1]7913; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v1, v0, v[1:2]7914; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]7915;7916; GFX10-GISEL-LABEL: clpeak_imad_pat_i32_x2:7917; GFX10-GISEL:       ; %bb.0: ; %entry7918; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7919; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v07920; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17921; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v07922; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17923; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27924; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17925; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v17926; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07927; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27928; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17929; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v17930; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07931; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27932; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17933; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v07934; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07935; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]7936;7937; GFX11-SDAG-LABEL: clpeak_imad_pat_i32_x2:7938; GFX11-SDAG:       ; %bb.0: ; %entry7939; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7940; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v07941; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7942; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17943; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v07944; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7945; GFX11-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v17946; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v27947; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17948; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7949; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v17950; GFX11-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v07951; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v27952; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7953; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v17954; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v17955; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7956; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v1, v07957; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v2, v5, v[2:3]7958; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)7959; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v2, v[3:4]7960; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]7961;7962; GFX11-GISEL-LABEL: clpeak_imad_pat_i32_x2:7963; GFX11-GISEL:       ; %bb.0: ; %entry7964; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7965; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v07966; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7967; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17968; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v07969; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7970; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v17971; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27972; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17973; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7974; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v17975; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07976; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27977; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7978; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v17979; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v17980; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7981; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07982; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v27983; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v17984; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v07985; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)7986; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v07987; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]7988;7989; GFX1200-SDAG-LABEL: clpeak_imad_pat_i32_x2:7990; GFX1200-SDAG:       ; %bb.0: ; %entry7991; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x07992; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x07993; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x07994; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x07995; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x07996; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v07997; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7998; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v17999; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v08000; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8001; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v18002; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v28003; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v18004; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8005; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v18006; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v08007; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v28008; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8009; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v18010; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v18011; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8012; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v08013; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v0, v2, v[0:1]8014; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)8015; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v1, v0, v[1:2]8016; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]8017;8018; GFX1200-GISEL-LABEL: clpeak_imad_pat_i32_x2:8019; GFX1200-GISEL:       ; %bb.0: ; %entry8020; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x08021; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x08022; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x08023; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x08024; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x08025; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08026; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8027; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18028; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v08029; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8030; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v18031; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28032; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18033; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8034; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v18035; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08036; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28037; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8038; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18039; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v18040; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8041; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08042; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28043; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v18044; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08045; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)8046; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08047; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]8048;8049; GFX1250-SDAG-LABEL: clpeak_imad_pat_i32_x2:8050; GFX1250-SDAG:       ; %bb.0: ; %entry8051; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x08052; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x08053; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v08054; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8055; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v18056; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v0, v2, v08057; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8058; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v18059; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v28060; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v18061; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8062; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v18063; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v08064; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v28065; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8066; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v18067; GFX1250-SDAG-NEXT:    v_add_nc_u32_e32 v1, v2, v18068; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8069; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v1, v08070; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v0, v2, v08071; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)8072; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v1, v0, v18073; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]8074;8075; GFX1250-GISEL-LABEL: clpeak_imad_pat_i32_x2:8076; GFX1250-GISEL:       ; %bb.0: ; %entry8077; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x08078; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x08079; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08080; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8081; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18082; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, v2, v08083; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8084; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v18085; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28086; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18087; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8088; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v18089; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08090; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28091; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8092; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v18093; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, v2, v18094; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8095; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08096; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v28097; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v0, v18098; GFX1250-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08099; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)8100; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v1, v08101; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]8102entry:8103  %y38 = add i32 %x, 18104  %add = mul i32 %y38, %y8105  %mul139 = add i32 %add, %y388106  %add2 = mul i32 %mul139, %y8107  %add240 = add i32 %add, 18108  %add4 = mul i32 %add2, %add2408109  %mul541 = add i32 %add4, %add2408110  %add6 = mul i32 %mul541, %add28111  %add642 = add i32 %add4, 18112  %add8 = mul i32 %add6, %add6428113  %mul943 = add i32 %add8, %add6428114  %add10 = mul i32 %mul943, %add68115  %add1044 = add i32 %add8, 18116  %add1246 = add i32 %add10, 18117  %mul1345 = mul i32 %add10, %add10448118  %add14 = mul i32 %mul1345, %add12468119  ret i32 %add148120}8121 8122define <2 x i32> @clpeak_imad_pat_v2i32_x2(<2 x i32> %x, <2 x i32> %y) {8123; GFX67-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8124; GFX67-SDAG:       ; %bb.0: ; %entry8125; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8126; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v08127; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v18128; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v28129; GFX67-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v38130; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v5, v08131; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v4, v18132; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28133; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38134; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v58135; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28136; GFX67-SDAG-NEXT:    v_add_i32_e32 v4, vcc, 1, v48137; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48138; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v3, v28139; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08140; GFX67-SDAG-NEXT:    v_add_i32_e32 v4, vcc, v5, v48141; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v4, v18142; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, 1, v38143; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28144; GFX67-SDAG-NEXT:    v_add_i32_e32 v4, vcc, 1, v58145; GFX67-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48146; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v3, v28147; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08148; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v5, v48149; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v2, v18150; GFX67-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v38151; GFX67-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v58152; GFX67-SDAG-NEXT:    v_add_i32_e32 v2, vcc, v2, v08153; GFX67-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08154; GFX67-SDAG-NEXT:    v_add_i32_e32 v3, vcc, v3, v18155; GFX67-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18156; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, v0, v28157; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, v1, v38158; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]8159;8160; GFX67-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8161; GFX67-GISEL:       ; %bb.0: ; %entry8162; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8163; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v08164; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v18165; GFX67-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28166; GFX67-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38167; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, v4, v08168; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, v5, v18169; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28170; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38171; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v48172; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v58173; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v28174; GFX67-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v48175; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v3, v28176; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v48177; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08178; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v18179; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v38180; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v58181; GFX67-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v28182; GFX67-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v48183; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, v3, v28184; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v48185; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08186; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v18187; GFX67-GISEL-NEXT:    v_add_i32_e32 v2, vcc, 1, v38188; GFX67-GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v58189; GFX67-GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v08190; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28191; GFX67-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v38192; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v18193; GFX67-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v48194; GFX67-GISEL-NEXT:    v_mul_lo_u32 v1, v2, v18195; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]8196;8197; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8198; GFX8-SDAG:       ; %bb.0: ; %entry8199; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8200; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, 1, v08201; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, 1, v18202; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v28203; GFX8-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v38204; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v5, v08205; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v4, v18206; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28207; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38208; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, 1, v58209; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28210; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, 1, v48211; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48212; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v3, v28213; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08214; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, v5, v48215; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v4, v18216; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, 1, v38217; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28218; GFX8-SDAG-NEXT:    v_add_u32_e32 v4, vcc, 1, v58219; GFX8-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48220; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v3, v28221; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08222; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v5, v48223; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v2, v18224; GFX8-SDAG-NEXT:    v_mul_lo_u32 v2, v0, v38225; GFX8-SDAG-NEXT:    v_mul_lo_u32 v3, v1, v58226; GFX8-SDAG-NEXT:    v_add_u32_e32 v2, vcc, v2, v08227; GFX8-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08228; GFX8-SDAG-NEXT:    v_add_u32_e32 v3, vcc, v3, v18229; GFX8-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18230; GFX8-SDAG-NEXT:    v_add_u32_e32 v0, vcc, v0, v28231; GFX8-SDAG-NEXT:    v_add_u32_e32 v1, vcc, v1, v38232; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]8233;8234; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8235; GFX8-GISEL:       ; %bb.0: ; %entry8236; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8237; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, 1, v08238; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v18239; GFX8-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28240; GFX8-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38241; GFX8-GISEL-NEXT:    v_add_u32_e32 v0, vcc, v4, v08242; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, v5, v18243; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28244; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38245; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v48246; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v58247; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v28248; GFX8-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v48249; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, v3, v28250; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, v5, v48251; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08252; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v18253; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v38254; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v58255; GFX8-GISEL-NEXT:    v_mul_lo_u32 v3, v0, v28256; GFX8-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v48257; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, v3, v28258; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, v5, v48259; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08260; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v4, v18261; GFX8-GISEL-NEXT:    v_add_u32_e32 v2, vcc, 1, v38262; GFX8-GISEL-NEXT:    v_add_u32_e32 v3, vcc, 1, v58263; GFX8-GISEL-NEXT:    v_add_u32_e32 v4, vcc, 1, v08264; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28265; GFX8-GISEL-NEXT:    v_mul_lo_u32 v2, v1, v38266; GFX8-GISEL-NEXT:    v_add_u32_e32 v1, vcc, 1, v18267; GFX8-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v48268; GFX8-GISEL-NEXT:    v_mul_lo_u32 v1, v2, v18269; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]8270;8271; GFX900-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8272; GFX900-SDAG:       ; %bb.0: ; %entry8273; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8274; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, 1, v08275; GFX900-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28276; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, 1, v18277; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38278; GFX900-SDAG-NEXT:    v_add_u32_e32 v0, v4, v08279; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28280; GFX900-SDAG-NEXT:    v_add_u32_e32 v1, v5, v18281; GFX900-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38282; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, 1, v48283; GFX900-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28284; GFX900-SDAG-NEXT:    v_add_u32_e32 v4, 1, v58285; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48286; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, v3, v28287; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08288; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, v5, v48289; GFX900-SDAG-NEXT:    v_mul_lo_u32 v1, v2, v18290; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, 1, v38291; GFX900-SDAG-NEXT:    v_mul_lo_u32 v3, v0, v28292; GFX900-SDAG-NEXT:    v_add_u32_e32 v4, 1, v58293; GFX900-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v48294; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, v3, v28295; GFX900-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08296; GFX900-SDAG-NEXT:    v_add_u32_e32 v2, v5, v48297; GFX900-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v18298; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v0, v3, v[0:1]8299; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v5, v[2:3]8300; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v3, v0, v[3:4]8301; GFX900-SDAG-NEXT:    v_mad_u64_u32 v[1:2], s[4:5], v4, v2, v[4:5]8302; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]8303;8304; GFX900-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8305; GFX900-GISEL:       ; %bb.0: ; %entry8306; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8307; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v08308; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v18309; GFX900-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28310; GFX900-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38311; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, v4, v08312; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, v5, v18313; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28314; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38315; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48316; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58317; GFX900-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28318; GFX900-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38319; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, v4, v28320; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, v5, v38321; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08322; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18323; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48324; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58325; GFX900-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28326; GFX900-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38327; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, v4, v28328; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, v5, v38329; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08330; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18331; GFX900-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48332; GFX900-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58333; GFX900-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v28334; GFX900-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v38335; GFX900-GISEL-NEXT:    v_add_u32_e32 v0, 1, v08336; GFX900-GISEL-NEXT:    v_add_u32_e32 v1, 1, v18337; GFX900-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08338; GFX900-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18339; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]8340;8341; GFX90A-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8342; GFX90A-SDAG:       ; %bb.0: ; %entry8343; GFX90A-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8344; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, 1, v18345; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, 1, v08346; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28347; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38348; GFX90A-SDAG-NEXT:    v_add_u32_e32 v1, v5, v18349; GFX90A-SDAG-NEXT:    v_add_u32_e32 v0, v4, v08350; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28351; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38352; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, 1, v48353; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, 1, v58354; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v38355; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v5, v0, v28356; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, v5, v28357; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, v4, v38358; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18359; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08360; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, 1, v48361; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, 1, v58362; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v38363; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v4, v1, v28364; GFX90A-SDAG-NEXT:    v_add_u32_e32 v2, v4, v28365; GFX90A-SDAG-NEXT:    v_add_u32_e32 v3, v6, v38366; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v0, v3, v08367; GFX90A-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v18368; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v2, v4, v[2:3]8369; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[6:7], s[4:5], v0, v6, v[0:1]8370; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v6, v0, v[6:7]8371; GFX90A-SDAG-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v4, v2, v[4:5]8372; GFX90A-SDAG-NEXT:    v_mov_b32_e32 v1, v28373; GFX90A-SDAG-NEXT:    s_setpc_b64 s[30:31]8374;8375; GFX90A-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8376; GFX90A-GISEL:       ; %bb.0: ; %entry8377; GFX90A-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8378; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, 1, v08379; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, 1, v18380; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28381; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38382; GFX90A-GISEL-NEXT:    v_add_u32_e32 v0, v4, v08383; GFX90A-GISEL-NEXT:    v_add_u32_e32 v1, v5, v18384; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28385; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38386; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48387; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58388; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28389; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38390; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, v4, v28391; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, v5, v38392; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08393; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18394; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48395; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58396; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28397; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38398; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, v4, v28399; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, v5, v38400; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08401; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18402; GFX90A-GISEL-NEXT:    v_add_u32_e32 v2, 1, v48403; GFX90A-GISEL-NEXT:    v_add_u32_e32 v3, 1, v58404; GFX90A-GISEL-NEXT:    v_add_u32_e32 v4, 1, v08405; GFX90A-GISEL-NEXT:    v_add_u32_e32 v5, 1, v18406; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28407; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38408; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v48409; GFX90A-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v58410; GFX90A-GISEL-NEXT:    s_setpc_b64 s[30:31]8411;8412; GFX10-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8413; GFX10-SDAG:       ; %bb.0: ; %entry8414; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8415; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v08416; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v18417; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28418; GFX10-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38419; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v0, v4, v08420; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v18421; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28422; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48423; GFX10-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38424; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58425; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28426; GFX10-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38427; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, v4, v28428; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v3, v5, v38429; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08430; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48431; GFX10-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18432; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58433; GFX10-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28434; GFX10-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38435; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v2, v4, v28436; GFX10-SDAG-NEXT:    v_add_nc_u32_e32 v3, v5, v38437; GFX10-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08438; GFX10-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v18439; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[3:4], null, v0, v4, v[0:1]8440; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[4:5], null, v2, v5, v[2:3]8441; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v3, v0, v[3:4]8442; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v4, v2, v[4:5]8443; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]8444;8445; GFX10-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8446; GFX10-GISEL:       ; %bb.0: ; %entry8447; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8448; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08449; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18450; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28451; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38452; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v08453; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v18454; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28455; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38456; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48457; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58458; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28459; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38460; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28461; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38462; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08463; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18464; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48465; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58466; GFX10-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28467; GFX10-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38468; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28469; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38470; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08471; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18472; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48473; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58474; GFX10-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v28475; GFX10-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v38476; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08477; GFX10-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18478; GFX10-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08479; GFX10-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18480; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]8481;8482; GFX11-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8483; GFX11-SDAG:       ; %bb.0: ; %entry8484; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8485; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v08486; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v18487; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8488; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28489; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38490; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8491; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v0, v4, v08492; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v18493; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8494; GFX11-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28495; GFX11-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38496; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48497; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58498; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8499; GFX11-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28500; GFX11-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38501; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8502; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, v4, v28503; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v3, v5, v38504; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8505; GFX11-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08506; GFX11-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18507; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48508; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58509; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8510; GFX11-SDAG-NEXT:    v_mul_lo_u32 v6, v0, v28511; GFX11-SDAG-NEXT:    v_mul_lo_u32 v7, v1, v38512; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8513; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v2, v6, v28514; GFX11-SDAG-NEXT:    v_add_nc_u32_e32 v3, v7, v38515; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8516; GFX11-SDAG-NEXT:    v_mul_lo_u32 v2, v2, v08517; GFX11-SDAG-NEXT:    v_mul_lo_u32 v3, v3, v18518; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8519; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[4:5], null, v2, v6, v[2:3]8520; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[5:6], null, v3, v7, v[3:4]8521; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8522; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v2, v[4:5]8523; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[1:2], null, v5, v3, v[5:6]8524; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]8525;8526; GFX11-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8527; GFX11-GISEL:       ; %bb.0: ; %entry8528; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8529; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08530; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18531; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8532; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28533; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38534; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8535; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v08536; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v18537; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8538; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28539; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38540; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48541; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58542; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8543; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28544; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38545; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8546; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28547; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38548; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8549; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08550; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18551; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48552; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58553; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8554; GFX11-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28555; GFX11-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38556; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8557; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28558; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38559; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8560; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08561; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18562; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48563; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58564; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8565; GFX11-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v28566; GFX11-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v38567; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08568; GFX11-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18569; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8570; GFX11-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08571; GFX11-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18572; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]8573;8574; GFX1200-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8575; GFX1200-SDAG:       ; %bb.0: ; %entry8576; GFX1200-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x08577; GFX1200-SDAG-NEXT:    s_wait_expcnt 0x08578; GFX1200-SDAG-NEXT:    s_wait_samplecnt 0x08579; GFX1200-SDAG-NEXT:    s_wait_bvhcnt 0x08580; GFX1200-SDAG-NEXT:    s_wait_kmcnt 0x08581; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, 1, v08582; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, 1, v18583; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8584; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28585; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38586; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8587; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v0, v4, v08588; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v1, v5, v18589; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)8590; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28591; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48592; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38593; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58594; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)8595; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28596; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38597; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8598; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, v4, v28599; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v3, v5, v38600; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)8601; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08602; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, 1, v48603; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18604; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v3, 1, v58605; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)8606; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28607; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38608; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8609; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v2, v4, v28610; GFX1200-SDAG-NEXT:    v_add_nc_u32_e32 v3, v5, v38611; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8612; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08613; GFX1200-SDAG-NEXT:    v_mul_lo_u32 v2, v3, v18614; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8615; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[3:4], null, v0, v4, v[0:1]8616; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[4:5], null, v2, v5, v[2:3]8617; GFX1200-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8618; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[0:1], null, v3, v0, v[3:4]8619; GFX1200-SDAG-NEXT:    v_mad_co_u64_u32 v[1:2], null, v4, v2, v[4:5]8620; GFX1200-SDAG-NEXT:    s_setpc_b64 s[30:31]8621;8622; GFX1200-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8623; GFX1200-GISEL:       ; %bb.0: ; %entry8624; GFX1200-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x08625; GFX1200-GISEL-NEXT:    s_wait_expcnt 0x08626; GFX1200-GISEL-NEXT:    s_wait_samplecnt 0x08627; GFX1200-GISEL-NEXT:    s_wait_bvhcnt 0x08628; GFX1200-GISEL-NEXT:    s_wait_kmcnt 0x08629; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08630; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18631; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8632; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28633; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38634; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8635; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, v4, v08636; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, v5, v18637; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8638; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28639; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38640; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48641; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58642; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8643; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28644; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38645; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8646; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28647; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38648; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8649; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08650; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18651; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48652; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58653; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8654; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28655; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38656; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8657; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, v4, v28658; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, v5, v38659; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8660; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08661; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18662; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v2, 1, v48663; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v3, 1, v58664; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8665; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v28666; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v38667; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v0, 1, v08668; GFX1200-GISEL-NEXT:    v_add_nc_u32_e32 v1, 1, v18669; GFX1200-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8670; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08671; GFX1200-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18672; GFX1200-GISEL-NEXT:    s_setpc_b64 s[30:31]8673;8674; GFX1250-SDAG-LABEL: clpeak_imad_pat_v2i32_x2:8675; GFX1250-SDAG:       ; %bb.0: ; %entry8676; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x08677; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x08678; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v18679; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8680; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28681; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38682; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8683; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v0, v4, v0 :: v_dual_add_nc_u32 v1, v5, v18684; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v0, v28685; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)8686; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v1, v38687; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v58688; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28689; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8690; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38691; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, v4, v2 :: v_dual_add_nc_u32 v3, v5, v38692; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8693; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08694; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18695; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v58696; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8697; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v4, v0, v28698; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v5, v1, v38699; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8700; GFX1250-SDAG-NEXT:    v_dual_add_nc_u32 v2, v4, v2 :: v_dual_add_nc_u32 v3, v5, v38701; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v0, v2, v08702; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8703; GFX1250-SDAG-NEXT:    v_mul_lo_u32 v1, v3, v18704; GFX1250-SDAG-NEXT:    v_mad_u32 v2, v0, v4, v08705; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)8706; GFX1250-SDAG-NEXT:    v_mad_u32 v3, v1, v5, v18707; GFX1250-SDAG-NEXT:    v_mad_u32 v0, v2, v0, v28708; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)8709; GFX1250-SDAG-NEXT:    v_mad_u32 v1, v3, v1, v38710; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]8711;8712; GFX1250-GISEL-LABEL: clpeak_imad_pat_v2i32_x2:8713; GFX1250-GISEL:       ; %bb.0: ; %entry8714; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x08715; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x08716; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v18717; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8718; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28719; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38720; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8721; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, v4, v0 :: v_dual_add_nc_u32 v1, v5, v18722; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v0, v28723; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)8724; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v1, v38725; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v58726; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28727; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8728; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38729; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, v4, v2 :: v_dual_add_nc_u32 v3, v5, v38730; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8731; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08732; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18733; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v58734; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)8735; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v4, v0, v28736; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v5, v1, v38737; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8738; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, v4, v2 :: v_dual_add_nc_u32 v3, v5, v38739; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08740; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)8741; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18742; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v2, 1, v4 :: v_dual_add_nc_u32 v3, 1, v58743; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v2, v0, v28744; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)8745; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v3, v1, v38746; GFX1250-GISEL-NEXT:    v_dual_add_nc_u32 v0, 1, v0 :: v_dual_add_nc_u32 v1, 1, v18747; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v0, v2, v08748; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)8749; GFX1250-GISEL-NEXT:    v_mul_lo_u32 v1, v3, v18750; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]8751entry:8752  %y38 = add <2 x i32> %x, <i32 1, i32 1>8753  %add = mul <2 x i32> %y38, %y8754  %mul139 = add <2 x i32> %add, %y388755  %add2 = mul <2 x i32> %mul139, %y8756  %add240 = add <2 x i32> %add, <i32 1, i32 1>8757  %add4 = mul <2 x i32> %add2, %add2408758  %mul541 = add <2 x i32> %add4, %add2408759  %add6 = mul <2 x i32> %mul541, %add28760  %add642 = add <2 x i32> %add4, <i32 1, i32 1>8761  %add8 = mul <2 x i32> %add6, %add6428762  %mul943 = add <2 x i32> %add8, %add6428763  %add10 = mul <2 x i32> %mul943, %add68764  %add1044 = add <2 x i32> %add8, <i32 1, i32 1>8765  %add1246 = add <2 x i32> %add10, <i32 1, i32 1>8766  %mul1345 = mul <2 x i32> %add10, %add10448767  %add14 = mul <2 x i32> %mul1345, %add12468768  ret <2 x i32> %add148769}8770 8771define signext i16 @clpeak_imad_pat_i16_x2(i16 signext %x, i16 signext %y) {8772; GFX67-LABEL: clpeak_imad_pat_i16_x2:8773; GFX67:       ; %bb.0: ; %entry8774; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8775; GFX67-NEXT:    v_add_i32_e32 v0, vcc, 1, v08776; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v08777; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v18778; GFX67-NEXT:    v_mul_u32_u24_e32 v3, v0, v28779; GFX67-NEXT:    v_add_i32_e32 v1, vcc, 1, v18780; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v18781; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v38782; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v1, v38783; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v2, 18784; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v08785; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v48786; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v0, v28787; GFX67-NEXT:    v_mad_u32_u24 v1, v1, v3, 18788; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v18789; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v48790; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v1, v38791; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v2, 18792; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v08793; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v48794; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v0, v28795; GFX67-NEXT:    v_mad_u32_u24 v1, v1, v3, 18796; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v18797; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v48798; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v1, v38799; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v2, 18800; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v08801; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v48802; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v28803; GFX67-NEXT:    v_mad_u32_u24 v1, v1, v3, 18804; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v08805; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v18806; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v18807; GFX67-NEXT:    v_bfe_i32 v0, v0, 0, 168808; GFX67-NEXT:    s_setpc_b64 s[30:31]8809;8810; GFX8-SDAG-LABEL: clpeak_imad_pat_i16_x2:8811; GFX8-SDAG:       ; %bb.0: ; %entry8812; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8813; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18814; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08815; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18816; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08817; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18818; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08819; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18820; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v08821; GFX8-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 168822; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]8823;8824; GFX8-GISEL-LABEL: clpeak_imad_pat_i16_x2:8825; GFX8-GISEL:       ; %bb.0: ; %entry8826; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8827; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v08828; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v18829; GFX8-GISEL-NEXT:    v_add_u16_e32 v3, 1, v18830; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v28831; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 18832; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v0, v48833; GFX8-GISEL-NEXT:    v_mad_u16 v2, v3, v2, 18834; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v2, v18835; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v4, 18836; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v0, v38837; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 18838; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v1, v48839; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 18840; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v28841; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v4, 18842; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v18843; GFX8-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 168844; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]8845;8846; GFX9-SDAG-LABEL: clpeak_imad_pat_i16_x2:8847; GFX9-SDAG:       ; %bb.0: ; %entry8848; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8849; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v18850; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v08851; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v18852; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v08853; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v18854; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v08855; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v18856; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v08857; GFX9-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 168858; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]8859;8860; GFX9-GISEL-LABEL: clpeak_imad_pat_i16_x2:8861; GFX9-GISEL:       ; %bb.0: ; %entry8862; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8863; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v08864; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v18865; GFX9-GISEL-NEXT:    v_add_u16_e32 v3, 1, v18866; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v28867; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, 18868; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v0, v48869; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v2, v3, v2, 18870; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v2, v18871; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v4, 18872; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v0, v38873; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v2, v1, 18874; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v1, v48875; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v3, 18876; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v28877; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v1, v4, 18878; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v18879; GFX9-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 168880; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]8881;8882; GFX10-SDAG-LABEL: clpeak_imad_pat_i16_x2:8883; GFX10-SDAG:       ; %bb.0: ; %entry8884; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8885; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18886; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08887; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18888; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08889; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18890; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v08891; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v18892; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v08893; GFX10-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 168894; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]8895;8896; GFX10-GISEL-LABEL: clpeak_imad_pat_i16_x2:8897; GFX10-GISEL:       ; %bb.0: ; %entry8898; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8899; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 18900; GFX10-GISEL-NEXT:    v_add_nc_u16 v2, v1, 18901; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v18902; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 18903; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v38904; GFX10-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 18905; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v18906; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 18907; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v38908; GFX10-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 18909; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v18910; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 18911; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v38912; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v18913; GFX10-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 18914; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v18915; GFX10-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 168916; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]8917;8918; GFX11-SDAG-TRUE16-LABEL: clpeak_imad_pat_i16_x2:8919; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry8920; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8921; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l8922; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8923; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l8924; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h8925; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8926; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l8927; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h8928; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8929; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l8930; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h8931; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8932; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l8933; GFX11-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 168934; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]8935;8936; GFX11-SDAG-FAKE16-LABEL: clpeak_imad_pat_i16_x2:8937; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry8938; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8939; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v18940; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8941; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v08942; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v18943; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8944; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v08945; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v18946; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8947; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v08948; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v18949; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)8950; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v08951; GFX11-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 168952; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]8953;8954; GFX11-GISEL-TRUE16-LABEL: clpeak_imad_pat_i16_x2:8955; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry8956; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8957; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 18958; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 18959; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8960; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l8961; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 18962; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h8963; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 18964; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8965; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l8966; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 18967; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h8968; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 18969; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8970; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l8971; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 18972; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h8973; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 18974; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8975; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l8976; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h8977; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)8978; GFX11-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 168979; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]8980;8981; GFX11-GISEL-FAKE16-LABEL: clpeak_imad_pat_i16_x2:8982; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry8983; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8984; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 18985; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 18986; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8987; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v18988; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 18989; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v38990; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 18991; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8992; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v18993; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 18994; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v38995; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 18996; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)8997; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v18998; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 18999; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39000; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9001; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19002; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 19003; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19004; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9005; GFX11-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 169006; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]9007;9008; GFX1200-SDAG-TRUE16-LABEL: clpeak_imad_pat_i16_x2:9009; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry9010; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x09011; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x09012; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x09013; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x09014; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x09015; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l9016; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9017; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l9018; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9019; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9020; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9021; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9022; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9023; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9024; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9025; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9026; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l9027; GFX1200-SDAG-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 169028; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]9029;9030; GFX1200-SDAG-FAKE16-LABEL: clpeak_imad_pat_i16_x2:9031; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry9032; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x09033; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x09034; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x09035; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x09036; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x09037; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19038; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9039; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09040; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19041; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9042; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09043; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19044; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9045; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09046; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19047; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9048; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v09049; GFX1200-SDAG-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 169050; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]9051;9052; GFX1200-GISEL-TRUE16-LABEL: clpeak_imad_pat_i16_x2:9053; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry9054; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x09055; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x09056; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x09057; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x09058; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x09059; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 19060; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 19061; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9062; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9063; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19064; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9065; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19066; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9067; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9068; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19069; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9070; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19071; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9072; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9073; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19074; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9075; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19076; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9077; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l9078; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h9079; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9080; GFX1200-GISEL-TRUE16-NEXT:    v_bfe_i32 v0, v0, 0, 169081; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]9082;9083; GFX1200-GISEL-FAKE16-LABEL: clpeak_imad_pat_i16_x2:9084; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry9085; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x09086; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x09087; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x09088; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x09089; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x09090; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 19091; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 19092; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9093; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19094; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19095; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39096; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19097; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9098; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19099; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19100; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39101; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19102; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9103; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19104; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19105; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39106; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9107; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19108; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 19109; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19110; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9111; GFX1200-GISEL-FAKE16-NEXT:    v_bfe_i32 v0, v0, 0, 169112; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]9113;9114; GFX1250-SDAG-LABEL: clpeak_imad_pat_i16_x2:9115; GFX1250-SDAG:       ; %bb.0: ; %entry9116; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x09117; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x09118; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19119; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9120; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09121; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19122; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9123; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09124; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19125; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9126; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09127; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19128; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9129; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v09130; GFX1250-SDAG-NEXT:    v_bfe_i32 v0, v0, 0, 169131; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]9132;9133; GFX1250-GISEL-LABEL: clpeak_imad_pat_i16_x2:9134; GFX1250-GISEL:       ; %bb.0: ; %entry9135; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x09136; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x09137; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 19138; GFX1250-GISEL-NEXT:    v_add_nc_u16 v2, v1, 19139; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9140; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19141; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19142; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39143; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19144; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9145; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19146; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19147; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39148; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19149; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9150; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19151; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19152; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39153; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9154; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19155; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 19156; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19157; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)9158; GFX1250-GISEL-NEXT:    v_bfe_i32 v0, v0, 0, 169159; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]9160entry:9161  %conv69 = add i16 %x, 19162  %add = mul i16 %conv69, %y9163  %conv470 = add i16 %y, 19164  %add8 = mul i16 %conv470, %add9165  %conv1071 = add i16 %add, 19166  %add14 = mul i16 %conv1071, %add89167  %conv1672 = add i16 %add8, 19168  %add20 = mul i16 %conv1672, %add149169  %conv2273 = add i16 %add14, 19170  %add26 = mul i16 %conv2273, %add209171  %conv2874 = add i16 %add20, 19172  %add32 = mul i16 %conv2874, %add269173  %conv3475 = add i16 %add26, 19174  %add38 = mul i16 %conv3475, %add329175  %conv4076 = add i16 %add32, 19176  %add44 = mul i16 %add38, %conv40769177  ret i16 %add449178}9179 9180define zeroext i16 @clpeak_umad_pat_i16_x2(i16 zeroext %x, i16 zeroext %y) {9181; GFX67-LABEL: clpeak_umad_pat_i16_x2:9182; GFX67:       ; %bb.0: ; %entry9183; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9184; GFX67-NEXT:    v_add_i32_e32 v0, vcc, 1, v09185; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09186; GFX67-NEXT:    v_mul_u32_u24_e32 v2, v0, v19187; GFX67-NEXT:    v_add_i32_e32 v3, vcc, 1, v19188; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v39189; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v29190; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v3, v29191; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v1, 19192; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09193; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v49194; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v0, v19195; GFX67-NEXT:    v_mad_u32_u24 v2, v3, v2, 19196; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v29197; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v49198; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v2, v39199; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v1, 19200; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09201; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v49202; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v0, v19203; GFX67-NEXT:    v_mad_u32_u24 v2, v2, v3, 19204; GFX67-NEXT:    v_and_b32_e32 v2, 0xffff, v29205; GFX67-NEXT:    v_and_b32_e32 v3, 0xffff, v49206; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v2, v39207; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v1, 19208; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09209; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v49210; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v19211; GFX67-NEXT:    v_mad_u32_u24 v1, v2, v3, 19212; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09213; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v19214; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v19215; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v09216; GFX67-NEXT:    s_setpc_b64 s[30:31]9217;9218; GFX8-SDAG-LABEL: clpeak_umad_pat_i16_x2:9219; GFX8-SDAG:       ; %bb.0: ; %entry9220; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9221; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19222; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09223; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19224; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09225; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19226; GFX8-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09227; GFX8-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19228; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v09229; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]9230;9231; GFX8-GISEL-LABEL: clpeak_umad_pat_i16_x2:9232; GFX8-GISEL:       ; %bb.0: ; %entry9233; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9234; GFX8-GISEL-NEXT:    v_add_u16_e32 v0, 1, v09235; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v19236; GFX8-GISEL-NEXT:    v_add_u16_e32 v3, 1, v19237; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v29238; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19239; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v0, v49240; GFX8-GISEL-NEXT:    v_mad_u16 v2, v3, v2, 19241; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v2, v19242; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v4, 19243; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v0, v39244; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 19245; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v1, v49246; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 19247; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v29248; GFX8-GISEL-NEXT:    v_mad_u16 v1, v1, v4, 19249; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v19250; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]9251;9252; GFX9-SDAG-LABEL: clpeak_umad_pat_i16_x2:9253; GFX9-SDAG:       ; %bb.0: ; %entry9254; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9255; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v19256; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v09257; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v19258; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v09259; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v19260; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v1, v0, v1, v09261; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v1, v0, v19262; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v09263; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]9264;9265; GFX9-GISEL-LABEL: clpeak_umad_pat_i16_x2:9266; GFX9-GISEL:       ; %bb.0: ; %entry9267; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9268; GFX9-GISEL-NEXT:    v_add_u16_e32 v0, 1, v09269; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v0, v19270; GFX9-GISEL-NEXT:    v_add_u16_e32 v3, 1, v19271; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v3, v29272; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, 19273; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v0, v49274; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v2, v3, v2, 19275; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v2, v19276; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v4, 19277; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v0, v39278; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v2, v1, 19279; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v1, v49280; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v3, 19281; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v29282; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v1, v1, v4, 19283; GFX9-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v0, v19284; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]9285;9286; GFX10-SDAG-LABEL: clpeak_umad_pat_i16_x2:9287; GFX10-SDAG:       ; %bb.0: ; %entry9288; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9289; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19290; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09291; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19292; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09293; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19294; GFX10-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09295; GFX10-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19296; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v09297; GFX10-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09298; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]9299;9300; GFX10-GISEL-LABEL: clpeak_umad_pat_i16_x2:9301; GFX10-GISEL:       ; %bb.0: ; %entry9302; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9303; GFX10-GISEL-NEXT:    v_add_nc_u16 v0, v0, 19304; GFX10-GISEL-NEXT:    v_add_nc_u16 v2, v1, 19305; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19306; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19307; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39308; GFX10-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19309; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19310; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19311; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39312; GFX10-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19313; GFX10-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19314; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19315; GFX10-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39316; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19317; GFX10-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 19318; GFX10-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19319; GFX10-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09320; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]9321;9322; GFX11-SDAG-TRUE16-LABEL: clpeak_umad_pat_i16_x2:9323; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry9324; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9325; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l9326; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9327; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l9328; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9329; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9330; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9331; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9332; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9333; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9334; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9335; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9336; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l9337; GFX11-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 09338; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]9339;9340; GFX11-SDAG-FAKE16-LABEL: clpeak_umad_pat_i16_x2:9341; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry9342; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9343; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19344; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9345; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09346; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19347; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9348; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09349; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19350; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9351; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09352; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19353; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9354; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v09355; GFX11-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v09356; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]9357;9358; GFX11-GISEL-TRUE16-LABEL: clpeak_umad_pat_i16_x2:9359; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry9360; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9361; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 19362; GFX11-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 19363; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9364; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9365; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19366; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9367; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19368; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9369; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9370; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19371; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9372; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19373; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9374; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9375; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19376; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9377; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19378; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9379; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l9380; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h9381; GFX11-GISEL-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 09382; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]9383;9384; GFX11-GISEL-FAKE16-LABEL: clpeak_umad_pat_i16_x2:9385; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry9386; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9387; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 19388; GFX11-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 19389; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9390; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19391; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19392; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39393; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19394; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9395; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19396; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19397; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39398; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19399; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9400; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19401; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19402; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39403; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9404; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19405; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 19406; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19407; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9408; GFX11-GISEL-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v09409; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]9410;9411; GFX1200-SDAG-TRUE16-LABEL: clpeak_umad_pat_i16_x2:9412; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry9413; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x09414; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x09415; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x09416; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x09417; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x09418; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v1.l, v0.l, v1.l9419; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9420; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v1.l, v0.l9421; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9422; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9423; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9424; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9425; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9426; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.l, v0.h, v0.l9427; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v0.l, v0.h9428; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9429; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v0.h, v0.l9430; GFX1200-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 09431; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]9432;9433; GFX1200-SDAG-FAKE16-LABEL: clpeak_umad_pat_i16_x2:9434; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry9435; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x09436; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x09437; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x09438; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x09439; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x09440; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19441; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9442; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09443; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19444; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9445; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09446; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19447; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9448; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v1, v0, v1, v09449; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v1, v0, v19450; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9451; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v09452; GFX1200-SDAG-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v09453; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]9454;9455; GFX1200-GISEL-TRUE16-LABEL: clpeak_umad_pat_i16_x2:9456; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry9457; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x09458; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x09459; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x09460; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x09461; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x09462; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.l, v0.l, 19463; GFX1200-GISEL-TRUE16-NEXT:    v_add_nc_u16 v0.h, v1.l, 19464; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9465; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9466; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19467; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9468; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19469; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9470; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9471; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19472; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9473; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19474; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9475; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.h, v0.l, v1.l9476; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, 19477; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v1.l, v0.h, v1.h9478; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.h, 19479; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9480; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v1.l9481; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.l, v0.l, v0.h9482; GFX1200-GISEL-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 09483; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]9484;9485; GFX1200-GISEL-FAKE16-LABEL: clpeak_umad_pat_i16_x2:9486; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry9487; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x09488; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x09489; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x09490; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x09491; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x09492; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v0, v0, 19493; GFX1200-GISEL-FAKE16-NEXT:    v_add_nc_u16 v2, v1, 19494; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9495; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19496; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19497; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39498; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19499; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9500; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19501; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19502; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39503; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v2, v3, 19504; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9505; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v3, v0, v19506; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, 19507; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v1, v2, v39508; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9509; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19510; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v1, v2, v3, 19511; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v0, v0, v19512; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)9513; GFX1200-GISEL-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v09514; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]9515;9516; GFX1250-SDAG-LABEL: clpeak_umad_pat_i16_x2:9517; GFX1250-SDAG:       ; %bb.0: ; %entry9518; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x09519; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x09520; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19521; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9522; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09523; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19524; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9525; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09526; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19527; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9528; GFX1250-SDAG-NEXT:    v_mad_u16 v1, v0, v1, v09529; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v1, v0, v19530; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)9531; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v09532; GFX1250-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09533; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]9534;9535; GFX1250-GISEL-LABEL: clpeak_umad_pat_i16_x2:9536; GFX1250-GISEL:       ; %bb.0: ; %entry9537; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x09538; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x09539; GFX1250-GISEL-NEXT:    v_add_nc_u16 v0, v0, 19540; GFX1250-GISEL-NEXT:    v_add_nc_u16 v2, v1, 19541; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9542; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19543; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19544; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39545; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19546; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9547; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19548; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19549; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39550; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v2, v3, 19551; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)9552; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v3, v0, v19553; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, 19554; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v1, v2, v39555; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9556; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19557; GFX1250-GISEL-NEXT:    v_mad_u16 v1, v2, v3, 19558; GFX1250-GISEL-NEXT:    v_mul_lo_u16 v0, v0, v19559; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)9560; GFX1250-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09561; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]9562entry:9563  %conv69 = add i16 %x, 19564  %add = mul i16 %conv69, %y9565  %conv470 = add i16 %y, 19566  %add8 = mul i16 %conv470, %add9567  %conv1071 = add i16 %add, 19568  %add14 = mul i16 %conv1071, %add89569  %conv1672 = add i16 %add8, 19570  %add20 = mul i16 %conv1672, %add149571  %conv2273 = add i16 %add14, 19572  %add26 = mul i16 %conv2273, %add209573  %conv2874 = add i16 %add20, 19574  %add32 = mul i16 %conv2874, %add269575  %conv3475 = add i16 %add26, 19576  %add38 = mul i16 %conv3475, %add329577  %conv4076 = add i16 %add32, 19578  %add44 = mul i16 %add38, %conv40769579  ret i16 %add449580}9581 9582define <2 x i16> @clpeak_imad_pat_v2i16_x2(<2 x i16> %x, <2 x i16> %y) {9583; GFX67-SDAG-LABEL: clpeak_imad_pat_v2i16_x2:9584; GFX67-SDAG:       ; %bb.0: ; %entry9585; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9586; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v09587; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v09588; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v19589; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29590; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v19591; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39592; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v4, v2, v09593; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09594; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v5, v3, v19595; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19596; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v0, v29597; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v4, v2, 19598; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v39599; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v29600; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v5, v3, 19601; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09602; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v39603; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19604; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v0, v4, v29605; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29606; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v1, v5, v39607; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39608; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v2, v09609; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v4, 19610; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v19611; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v09612; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v5, 19613; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29614; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v19615; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39616; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v2, v4, v09617; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09618; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v3, v5, v19619; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19620; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v6, v0, v29621; GFX67-SDAG-NEXT:    v_mad_u32_u24 v4, v2, v4, 19622; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v7, v1, v39623; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v49624; GFX67-SDAG-NEXT:    v_mad_u32_u24 v5, v3, v5, 19625; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v3, 19626; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v69627; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, 19628; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v59629; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v49630; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v79631; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v29632; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09633; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19634; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39635; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29636; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v3, v09637; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v2, v19638; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]9639;9640; GFX67-GISEL-LABEL: clpeak_imad_pat_v2i16_x2:9641; GFX67-GISEL:       ; %bb.0: ; %entry9642; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9643; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v19644; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v09645; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v19646; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v09647; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v59648; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v59649; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v49650; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v39651; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v49652; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29653; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v5, v3, v19654; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v4, v2, v09655; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19656; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09657; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v19658; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v19659; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v09660; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09661; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v39662; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v5, v3, 19663; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v0, v29664; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v4, v2, 19665; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v39666; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v29667; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v59668; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v59669; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v49670; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19671; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09672; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v49673; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v1, v5, v39674; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v0, v4, v29675; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v39676; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29677; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v3, 16, v39678; GFX67-GISEL-NEXT:    v_or_b32_e32 v2, v2, v39679; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v29680; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29681; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v19682; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v5, 19683; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v09684; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v4, 19685; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v19686; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v09687; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v59688; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v59689; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v49690; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v39691; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29692; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v49693; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v3, v5, v19694; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v2, v4, v09695; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19696; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09697; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v19698; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v19699; GFX67-GISEL-NEXT:    v_mad_u32_u24 v5, v3, v5, 19700; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v09701; GFX67-GISEL-NEXT:    v_mad_u32_u24 v4, v2, v4, 19702; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v59703; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09704; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v1, v39705; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v49706; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v59707; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, 19708; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v6, v0, v29709; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v59710; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, 19711; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19712; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09713; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v19714; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v69715; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v49716; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v19717; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v49718; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v39719; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v79720; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v19721; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v09722; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29723; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09724; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19725; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v2, v09726; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v39727; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]9728;9729; GFX8-SDAG-LABEL: clpeak_imad_pat_v2i16_x2:9730; GFX8-SDAG:       ; %bb.0: ; %entry9731; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9732; GFX8-SDAG-NEXT:    v_mov_b32_e32 v3, 19733; GFX8-SDAG-NEXT:    v_add_u16_e32 v2, 1, v09734; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9735; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v19736; GFX8-SDAG-NEXT:    v_mad_u16 v4, v0, v3, v09737; GFX8-SDAG-NEXT:    v_mad_u16 v5, v2, v1, v29738; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v4, v39739; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v3, 19740; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v5, v19741; GFX8-SDAG-NEXT:    v_mad_u16 v1, v2, v1, 19742; GFX8-SDAG-NEXT:    v_mad_u16 v2, v4, v0, v09743; GFX8-SDAG-NEXT:    v_mad_u16 v3, v5, v1, v19744; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v2, v49745; GFX8-SDAG-NEXT:    v_mad_u16 v0, v4, v0, 19746; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v3, v3, v59747; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, 19748; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v2, v09749; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v09750; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v3, v19751; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v19752; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v29753; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v39754; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v4, v09755; GFX8-SDAG-NEXT:    v_mad_u16 v3, v1, v5, v19756; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v29757; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v09758; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v39759; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v1, v09760; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]9761;9762; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i16_x2:9763; GFX8-GISEL:       ; %bb.0: ; %entry9764; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9765; GFX8-GISEL-NEXT:    v_mov_b32_e32 v3, 19766; GFX8-GISEL-NEXT:    v_add_u16_e32 v2, 1, v09767; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9768; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v19769; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v29770; GFX8-GISEL-NEXT:    v_mad_u16 v5, v0, v3, v09771; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v4, v19772; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v5, v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_19773; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 19774; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 19775; GFX8-GISEL-NEXT:    v_mad_u16 v2, v4, v1, v19776; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v0, v09777; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v2, v49778; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v3, v59779; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v1, 19780; GFX8-GISEL-NEXT:    v_mad_u16 v0, v5, v0, 19781; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v19782; GFX8-GISEL-NEXT:    v_mad_u16 v5, v3, v0, v09783; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v29784; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v39785; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 19786; GFX8-GISEL-NEXT:    v_mad_u16 v0, v3, v0, 19787; GFX8-GISEL-NEXT:    v_mad_u16 v2, v4, v2, 19788; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 19789; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v6, v19790; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v7, v09791; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v29792; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9793; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v1, v09794; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]9795;9796; GFX9-LABEL: clpeak_imad_pat_v2i16_x2:9797; GFX9:       ; %bb.0: ; %entry9798; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9799; GFX9-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]9800; GFX9-NEXT:    v_pk_mad_u16 v2, v0, v1, v09801; GFX9-NEXT:    v_pk_mul_lo_u16 v2, v2, v19802; GFX9-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]9803; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v0, v09804; GFX9-NEXT:    v_pk_mul_lo_u16 v1, v1, v29805; GFX9-NEXT:    v_pk_mad_u16 v0, v2, v0, 1 op_sel_hi:[1,1,0]9806; GFX9-NEXT:    v_pk_mad_u16 v2, v1, v0, v09807; GFX9-NEXT:    v_pk_mul_lo_u16 v3, v2, v19808; GFX9-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9809; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]9810; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v3, v09811; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v0, v19812; GFX9-NEXT:    s_setpc_b64 s[30:31]9813;9814; GFX10-LABEL: clpeak_imad_pat_v2i16_x2:9815; GFX10:       ; %bb.0: ; %entry9816; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9817; GFX10-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]9818; GFX10-NEXT:    v_pk_mad_u16 v2, v0, v1, v09819; GFX10-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]9820; GFX10-NEXT:    v_pk_mul_lo_u16 v1, v2, v19821; GFX10-NEXT:    v_pk_mad_u16 v2, v1, v0, v09822; GFX10-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9823; GFX10-NEXT:    v_pk_mul_lo_u16 v1, v2, v19824; GFX10-NEXT:    v_pk_mad_u16 v2, v1, v0, v09825; GFX10-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9826; GFX10-NEXT:    v_pk_mul_lo_u16 v3, v2, v19827; GFX10-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]9828; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v3, v09829; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v0, v19830; GFX10-NEXT:    s_setpc_b64 s[30:31]9831;9832; GFX11-LABEL: clpeak_imad_pat_v2i16_x2:9833; GFX11:       ; %bb.0: ; %entry9834; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9835; GFX11-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]9836; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9837; GFX11-NEXT:    v_pk_mad_u16 v2, v0, v1, v09838; GFX11-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]9839; GFX11-NEXT:    v_pk_mul_lo_u16 v1, v2, v19840; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9841; GFX11-NEXT:    v_pk_mad_u16 v2, v1, v0, v09842; GFX11-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9843; GFX11-NEXT:    v_pk_mul_lo_u16 v1, v2, v19844; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9845; GFX11-NEXT:    v_pk_mad_u16 v2, v1, v0, v09846; GFX11-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9847; GFX11-NEXT:    v_pk_mul_lo_u16 v3, v2, v19848; GFX11-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]9849; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9850; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v3, v09851; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v0, v19852; GFX11-NEXT:    s_setpc_b64 s[30:31]9853;9854; GFX1200-LABEL: clpeak_imad_pat_v2i16_x2:9855; GFX1200:       ; %bb.0: ; %entry9856; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x09857; GFX1200-NEXT:    s_wait_expcnt 0x09858; GFX1200-NEXT:    s_wait_samplecnt 0x09859; GFX1200-NEXT:    s_wait_bvhcnt 0x09860; GFX1200-NEXT:    s_wait_kmcnt 0x09861; GFX1200-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]9862; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9863; GFX1200-NEXT:    v_pk_mad_u16 v2, v0, v1, v09864; GFX1200-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]9865; GFX1200-NEXT:    v_pk_mul_lo_u16 v1, v2, v19866; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9867; GFX1200-NEXT:    v_pk_mad_u16 v2, v1, v0, v09868; GFX1200-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9869; GFX1200-NEXT:    v_pk_mul_lo_u16 v1, v2, v19870; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9871; GFX1200-NEXT:    v_pk_mad_u16 v2, v1, v0, v09872; GFX1200-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9873; GFX1200-NEXT:    v_pk_mul_lo_u16 v3, v2, v19874; GFX1200-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]9875; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9876; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v3, v09877; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v0, v19878; GFX1200-NEXT:    s_setpc_b64 s[30:31]9879;9880; GFX1250-LABEL: clpeak_imad_pat_v2i16_x2:9881; GFX1250:       ; %bb.0: ; %entry9882; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x09883; GFX1250-NEXT:    s_wait_kmcnt 0x09884; GFX1250-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]9885; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9886; GFX1250-NEXT:    v_pk_mad_u16 v2, v0, v1, v09887; GFX1250-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]9888; GFX1250-NEXT:    v_pk_mul_lo_u16 v1, v2, v19889; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9890; GFX1250-NEXT:    v_pk_mad_u16 v2, v1, v0, v09891; GFX1250-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9892; GFX1250-NEXT:    v_pk_mul_lo_u16 v1, v2, v19893; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)9894; GFX1250-NEXT:    v_pk_mad_u16 v2, v1, v0, v09895; GFX1250-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]9896; GFX1250-NEXT:    v_pk_mul_lo_u16 v3, v2, v19897; GFX1250-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]9898; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)9899; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v3, v09900; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v0, v19901; GFX1250-NEXT:    s_set_pc_i64 s[30:31]9902entry:9903  %y38 = add <2 x i16> %x, <i16 1, i16 1>9904  %add = mul <2 x i16> %y38, %y9905  %mul139 = add <2 x i16> %add, %y389906  %add2 = mul <2 x i16> %mul139, %y9907  %add240 = add <2 x i16> %add, <i16 1, i16 1>9908  %add4 = mul <2 x i16> %add2, %add2409909  %mul541 = add <2 x i16> %add4, %add2409910  %add6 = mul <2 x i16> %mul541, %add29911  %add642 = add <2 x i16> %add4, <i16 1, i16 1>9912  %add8 = mul <2 x i16> %add6, %add6429913  %mul943 = add <2 x i16> %add8, %add6429914  %add10 = mul <2 x i16> %mul943, %add69915  %add1044 = add <2 x i16> %add8, <i16 1, i16 1>9916  %add1246 = add <2 x i16> %add10, <i16 1, i16 1>9917  %mul1345 = mul <2 x i16> %add10, %add10449918  %add14 = mul <2 x i16> %mul1345, %add12469919  ret <2 x i16> %add149920}9921 9922define <2 x i16> @clpeak_umad_pat_v2i16_x2(<2 x i16> %x, <2 x i16> %y) {9923; GFX67-SDAG-LABEL: clpeak_umad_pat_v2i16_x2:9924; GFX67-SDAG:       ; %bb.0: ; %entry9925; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9926; GFX67-SDAG-NEXT:    v_add_i32_e32 v0, vcc, 1, v09927; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v09928; GFX67-SDAG-NEXT:    v_add_i32_e32 v1, vcc, 1, v19929; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29930; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v19931; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39932; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v4, v2, v09933; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09934; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v5, v3, v19935; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19936; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v0, v29937; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v4, v2, 19938; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v1, v39939; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v29940; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v5, v3, 19941; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09942; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v39943; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19944; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v0, v4, v29945; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29946; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v1, v5, v39947; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39948; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v2, v09949; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v4, 19950; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v19951; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v09952; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v5, 19953; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29954; GFX67-SDAG-NEXT:    v_and_b32_e32 v5, 0xffff, v19955; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39956; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v2, v4, v09957; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09958; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v3, v5, v19959; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19960; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v6, v0, v29961; GFX67-SDAG-NEXT:    v_mad_u32_u24 v4, v2, v4, 19962; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v7, v1, v39963; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v49964; GFX67-SDAG-NEXT:    v_mad_u32_u24 v5, v3, v5, 19965; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v3, 19966; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v69967; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, 19968; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v59969; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v3, v3, v49970; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v79971; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v2, v4, v29972; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v09973; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v19974; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v39975; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v29976; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v0, v3, v09977; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v1, v2, v19978; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]9979;9980; GFX67-GISEL-LABEL: clpeak_umad_pat_v2i16_x2:9981; GFX67-GISEL:       ; %bb.0: ; %entry9982; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9983; GFX67-GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v19984; GFX67-GISEL-NEXT:    v_add_i32_e32 v0, vcc, 1, v09985; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v19986; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v09987; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v59988; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v59989; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v49990; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v39991; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v49992; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v29993; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v5, v3, v19994; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v4, v2, v09995; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v19996; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v09997; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v19998; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v19999; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v010000; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010001; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v310002; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v5, v3, 110003; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v0, v210004; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v4, v2, 110005; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v310006; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v210007; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v510008; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v510009; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v410010; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v110011; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010012; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v410013; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v1, v5, v310014; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v0, v4, v210015; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v310016; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210017; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v3, 16, v310018; GFX67-GISEL-NEXT:    v_or_b32_e32 v2, v2, v310019; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v210020; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210021; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v3, v3, v110022; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v5, 110023; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v010024; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v4, 110025; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v110026; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v010027; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v510028; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v510029; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v410030; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v310031; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210032; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v410033; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v3, v5, v110034; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v2, v4, v010035; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v110036; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010037; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v110038; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v110039; GFX67-GISEL-NEXT:    v_mad_u32_u24 v5, v3, v5, 110040; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v010041; GFX67-GISEL-NEXT:    v_mad_u32_u24 v4, v2, v4, 110042; GFX67-GISEL-NEXT:    v_and_b32_e32 v5, 0xffff, v510043; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010044; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v1, v310045; GFX67-GISEL-NEXT:    v_and_b32_e32 v4, 0xffff, v410046; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 16, v510047; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, 110048; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v6, v0, v210049; GFX67-GISEL-NEXT:    v_or_b32_e32 v4, v4, v510050; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, 110051; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v110052; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010053; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v110054; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v610055; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v410056; GFX67-GISEL-NEXT:    v_or_b32_e32 v0, v0, v110057; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v410058; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v2, v2, v310059; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v710060; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v3, v110061; GFX67-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v010062; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210063; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010064; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v110065; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v2, v010066; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v1, v1, v310067; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]10068;10069; GFX8-SDAG-LABEL: clpeak_umad_pat_v2i16_x2:10070; GFX8-SDAG:       ; %bb.0: ; %entry10071; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10072; GFX8-SDAG-NEXT:    v_mov_b32_e32 v3, 110073; GFX8-SDAG-NEXT:    v_add_u16_e32 v2, 1, v010074; GFX8-SDAG-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10075; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v110076; GFX8-SDAG-NEXT:    v_mad_u16 v4, v0, v3, v010077; GFX8-SDAG-NEXT:    v_mad_u16 v5, v2, v1, v210078; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v4, v310079; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v3, 110080; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v5, v110081; GFX8-SDAG-NEXT:    v_mad_u16 v1, v2, v1, 110082; GFX8-SDAG-NEXT:    v_mad_u16 v2, v4, v0, v010083; GFX8-SDAG-NEXT:    v_mad_u16 v3, v5, v1, v110084; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v2, v2, v410085; GFX8-SDAG-NEXT:    v_mad_u16 v0, v4, v0, 110086; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v3, v3, v510087; GFX8-SDAG-NEXT:    v_mad_u16 v1, v5, v1, 110088; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v4, v2, v010089; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v010090; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v5, v3, v110091; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v110092; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v0, v0, v210093; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v1, v1, v310094; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v4, v010095; GFX8-SDAG-NEXT:    v_mad_u16 v3, v1, v5, v110096; GFX8-SDAG-NEXT:    v_mad_u16 v0, v2, v0, v210097; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v010098; GFX8-SDAG-NEXT:    v_mad_u16 v1, v3, v1, v310099; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v1, v010100; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]10101;10102; GFX8-GISEL-LABEL: clpeak_umad_pat_v2i16_x2:10103; GFX8-GISEL:       ; %bb.0: ; %entry10104; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10105; GFX8-GISEL-NEXT:    v_mov_b32_e32 v3, 110106; GFX8-GISEL-NEXT:    v_add_u16_e32 v2, 1, v010107; GFX8-GISEL-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10108; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v110109; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v210110; GFX8-GISEL-NEXT:    v_mad_u16 v5, v0, v3, v010111; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v4, v4, v110112; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v5, v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_110113; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 110114; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v3, 110115; GFX8-GISEL-NEXT:    v_mad_u16 v2, v4, v1, v110116; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v0, v010117; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v2, v2, v410118; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v3, v3, v510119; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v1, 110120; GFX8-GISEL-NEXT:    v_mad_u16 v0, v5, v0, 110121; GFX8-GISEL-NEXT:    v_mad_u16 v4, v2, v1, v110122; GFX8-GISEL-NEXT:    v_mad_u16 v5, v3, v0, v010123; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v4, v210124; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v7, v5, v310125; GFX8-GISEL-NEXT:    v_mad_u16 v1, v2, v1, 110126; GFX8-GISEL-NEXT:    v_mad_u16 v0, v3, v0, 110127; GFX8-GISEL-NEXT:    v_mad_u16 v2, v4, v2, 110128; GFX8-GISEL-NEXT:    v_mad_u16 v3, v5, v3, 110129; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v6, v110130; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v0, v7, v010131; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v1, v1, v210132; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10133; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v1, v010134; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]10135;10136; GFX9-LABEL: clpeak_umad_pat_v2i16_x2:10137; GFX9:       ; %bb.0: ; %entry10138; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10139; GFX9-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]10140; GFX9-NEXT:    v_pk_mad_u16 v2, v0, v1, v010141; GFX9-NEXT:    v_pk_mul_lo_u16 v2, v2, v110142; GFX9-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]10143; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v0, v010144; GFX9-NEXT:    v_pk_mul_lo_u16 v1, v1, v210145; GFX9-NEXT:    v_pk_mad_u16 v0, v2, v0, 1 op_sel_hi:[1,1,0]10146; GFX9-NEXT:    v_pk_mad_u16 v2, v1, v0, v010147; GFX9-NEXT:    v_pk_mul_lo_u16 v3, v2, v110148; GFX9-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10149; GFX9-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]10150; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v3, v010151; GFX9-NEXT:    v_pk_mul_lo_u16 v0, v0, v110152; GFX9-NEXT:    s_setpc_b64 s[30:31]10153;10154; GFX10-LABEL: clpeak_umad_pat_v2i16_x2:10155; GFX10:       ; %bb.0: ; %entry10156; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10157; GFX10-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]10158; GFX10-NEXT:    v_pk_mad_u16 v2, v0, v1, v010159; GFX10-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]10160; GFX10-NEXT:    v_pk_mul_lo_u16 v1, v2, v110161; GFX10-NEXT:    v_pk_mad_u16 v2, v1, v0, v010162; GFX10-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10163; GFX10-NEXT:    v_pk_mul_lo_u16 v1, v2, v110164; GFX10-NEXT:    v_pk_mad_u16 v2, v1, v0, v010165; GFX10-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10166; GFX10-NEXT:    v_pk_mul_lo_u16 v3, v2, v110167; GFX10-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]10168; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v3, v010169; GFX10-NEXT:    v_pk_mul_lo_u16 v0, v0, v110170; GFX10-NEXT:    s_setpc_b64 s[30:31]10171;10172; GFX11-LABEL: clpeak_umad_pat_v2i16_x2:10173; GFX11:       ; %bb.0: ; %entry10174; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10175; GFX11-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]10176; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10177; GFX11-NEXT:    v_pk_mad_u16 v2, v0, v1, v010178; GFX11-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]10179; GFX11-NEXT:    v_pk_mul_lo_u16 v1, v2, v110180; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10181; GFX11-NEXT:    v_pk_mad_u16 v2, v1, v0, v010182; GFX11-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10183; GFX11-NEXT:    v_pk_mul_lo_u16 v1, v2, v110184; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10185; GFX11-NEXT:    v_pk_mad_u16 v2, v1, v0, v010186; GFX11-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10187; GFX11-NEXT:    v_pk_mul_lo_u16 v3, v2, v110188; GFX11-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]10189; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10190; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v3, v010191; GFX11-NEXT:    v_pk_mul_lo_u16 v0, v0, v110192; GFX11-NEXT:    s_setpc_b64 s[30:31]10193;10194; GFX1200-LABEL: clpeak_umad_pat_v2i16_x2:10195; GFX1200:       ; %bb.0: ; %entry10196; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x010197; GFX1200-NEXT:    s_wait_expcnt 0x010198; GFX1200-NEXT:    s_wait_samplecnt 0x010199; GFX1200-NEXT:    s_wait_bvhcnt 0x010200; GFX1200-NEXT:    s_wait_kmcnt 0x010201; GFX1200-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]10202; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10203; GFX1200-NEXT:    v_pk_mad_u16 v2, v0, v1, v010204; GFX1200-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]10205; GFX1200-NEXT:    v_pk_mul_lo_u16 v1, v2, v110206; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10207; GFX1200-NEXT:    v_pk_mad_u16 v2, v1, v0, v010208; GFX1200-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10209; GFX1200-NEXT:    v_pk_mul_lo_u16 v1, v2, v110210; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10211; GFX1200-NEXT:    v_pk_mad_u16 v2, v1, v0, v010212; GFX1200-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10213; GFX1200-NEXT:    v_pk_mul_lo_u16 v3, v2, v110214; GFX1200-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]10215; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10216; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v3, v010217; GFX1200-NEXT:    v_pk_mul_lo_u16 v0, v0, v110218; GFX1200-NEXT:    s_setpc_b64 s[30:31]10219;10220; GFX1250-LABEL: clpeak_umad_pat_v2i16_x2:10221; GFX1250:       ; %bb.0: ; %entry10222; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010223; GFX1250-NEXT:    s_wait_kmcnt 0x010224; GFX1250-NEXT:    v_pk_add_u16 v0, v0, 1 op_sel_hi:[1,0]10225; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10226; GFX1250-NEXT:    v_pk_mad_u16 v2, v0, v1, v010227; GFX1250-NEXT:    v_pk_mad_u16 v0, v0, v1, 1 op_sel_hi:[1,1,0]10228; GFX1250-NEXT:    v_pk_mul_lo_u16 v1, v2, v110229; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10230; GFX1250-NEXT:    v_pk_mad_u16 v2, v1, v0, v010231; GFX1250-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10232; GFX1250-NEXT:    v_pk_mul_lo_u16 v1, v2, v110233; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)10234; GFX1250-NEXT:    v_pk_mad_u16 v2, v1, v0, v010235; GFX1250-NEXT:    v_pk_mad_u16 v0, v1, v0, 1 op_sel_hi:[1,1,0]10236; GFX1250-NEXT:    v_pk_mul_lo_u16 v3, v2, v110237; GFX1250-NEXT:    v_pk_mad_u16 v1, v2, v1, 1 op_sel_hi:[1,1,0]10238; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10239; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v3, v010240; GFX1250-NEXT:    v_pk_mul_lo_u16 v0, v0, v110241; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10242entry:10243  %y38 = add <2 x i16> %x, <i16 1, i16 1>10244  %add = mul <2 x i16> %y38, %y10245  %mul139 = add <2 x i16> %add, %y3810246  %add2 = mul <2 x i16> %mul139, %y10247  %add240 = add <2 x i16> %add, <i16 1, i16 1>10248  %add4 = mul <2 x i16> %add2, %add24010249  %mul541 = add <2 x i16> %add4, %add24010250  %add6 = mul <2 x i16> %mul541, %add210251  %add642 = add <2 x i16> %add4, <i16 1, i16 1>10252  %add8 = mul <2 x i16> %add6, %add64210253  %mul943 = add <2 x i16> %add8, %add64210254  %add10 = mul <2 x i16> %mul943, %add610255  %add1044 = add <2 x i16> %add8, <i16 1, i16 1>10256  %add1246 = add <2 x i16> %add10, <i16 1, i16 1>10257  %mul1345 = mul <2 x i16> %add10, %add104410258  %add14 = mul <2 x i16> %mul1345, %add124610259  ret <2 x i16> %add1410260}10261 10262; Multiple uses of mul with different variable addend10263define <2 x i32> @multi_use_mul_mad_i32_var(i32 %x, i32 %y, i32 %z0, i32 %z1) {10264; GFX67-LABEL: multi_use_mul_mad_i32_var:10265; GFX67:       ; %bb.0: ; %entry10266; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10267; GFX67-NEXT:    v_mul_lo_u32 v1, v0, v110268; GFX67-NEXT:    v_add_i32_e32 v0, vcc, v1, v210269; GFX67-NEXT:    v_add_i32_e32 v1, vcc, v1, v310270; GFX67-NEXT:    s_setpc_b64 s[30:31]10271;10272; GFX8-LABEL: multi_use_mul_mad_i32_var:10273; GFX8:       ; %bb.0: ; %entry10274; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10275; GFX8-NEXT:    v_mul_lo_u32 v1, v0, v110276; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v1, v210277; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v310278; GFX8-NEXT:    s_setpc_b64 s[30:31]10279;10280; GFX9-LABEL: multi_use_mul_mad_i32_var:10281; GFX9:       ; %bb.0: ; %entry10282; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10283; GFX9-NEXT:    v_mul_lo_u32 v1, v0, v110284; GFX9-NEXT:    v_add_u32_e32 v0, v1, v210285; GFX9-NEXT:    v_add_u32_e32 v1, v1, v310286; GFX9-NEXT:    s_setpc_b64 s[30:31]10287;10288; GFX10-LABEL: multi_use_mul_mad_i32_var:10289; GFX10:       ; %bb.0: ; %entry10290; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10291; GFX10-NEXT:    v_mul_lo_u32 v1, v0, v110292; GFX10-NEXT:    v_add_nc_u32_e32 v0, v1, v210293; GFX10-NEXT:    v_add_nc_u32_e32 v1, v1, v310294; GFX10-NEXT:    s_setpc_b64 s[30:31]10295;10296; GFX11-LABEL: multi_use_mul_mad_i32_var:10297; GFX11:       ; %bb.0: ; %entry10298; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10299; GFX11-NEXT:    v_mul_lo_u32 v1, v0, v110300; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)10301; GFX11-NEXT:    v_add_nc_u32_e32 v0, v1, v210302; GFX11-NEXT:    v_add_nc_u32_e32 v1, v1, v310303; GFX11-NEXT:    s_setpc_b64 s[30:31]10304;10305; GFX1200-LABEL: multi_use_mul_mad_i32_var:10306; GFX1200:       ; %bb.0: ; %entry10307; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x010308; GFX1200-NEXT:    s_wait_expcnt 0x010309; GFX1200-NEXT:    s_wait_samplecnt 0x010310; GFX1200-NEXT:    s_wait_bvhcnt 0x010311; GFX1200-NEXT:    s_wait_kmcnt 0x010312; GFX1200-NEXT:    v_mul_lo_u32 v1, v0, v110313; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1)10314; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v1, v210315; GFX1200-NEXT:    v_add_nc_u32_e32 v1, v1, v310316; GFX1200-NEXT:    s_setpc_b64 s[30:31]10317;10318; GFX1250-LABEL: multi_use_mul_mad_i32_var:10319; GFX1250:       ; %bb.0: ; %entry10320; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010321; GFX1250-NEXT:    s_wait_kmcnt 0x010322; GFX1250-NEXT:    v_mul_lo_u32 v1, v0, v110323; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)10324; GFX1250-NEXT:    v_dual_add_nc_u32 v0, v1, v2 :: v_dual_add_nc_u32 v1, v1, v310325; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10326entry:10327  %mul = mul i32 %x, %y10328  %add0 = add i32 %mul, %z010329  %add1 = add i32 %mul, %z110330  %insert.0 = insertelement <2 x i32> poison, i32 %add0, i32 010331  %insert.1 = insertelement <2 x i32> %insert.0, i32 %add1, i32 110332  ret <2 x i32> %insert.110333}10334 10335define <2 x i16> @multi_use_mul_mad_i16_var(i16 %x, i16 %y, i16 %z0, i16 %z1) {10336; GFX67-LABEL: multi_use_mul_mad_i16_var:10337; GFX67:       ; %bb.0: ; %entry10338; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10339; GFX67-NEXT:    v_and_b32_e32 v4, 0xffff, v010340; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v110341; GFX67-NEXT:    v_mad_u32_u24 v0, v4, v1, v210342; GFX67-NEXT:    v_mad_u32_u24 v1, v4, v1, v310343; GFX67-NEXT:    s_setpc_b64 s[30:31]10344;10345; GFX8-SDAG-LABEL: multi_use_mul_mad_i16_var:10346; GFX8-SDAG:       ; %bb.0: ; %entry10347; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10348; GFX8-SDAG-NEXT:    v_mad_u16 v3, v0, v1, v310349; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v210350; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v310351; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v0, v110352; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]10353;10354; GFX8-GISEL-LABEL: multi_use_mul_mad_i16_var:10355; GFX8-GISEL:       ; %bb.0: ; %entry10356; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10357; GFX8-GISEL-NEXT:    v_mad_u16 v2, v0, v1, v210358; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, v310359; GFX8-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 16, v010360; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v2, v010361; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]10362;10363; GFX9-SDAG-LABEL: multi_use_mul_mad_i16_var:10364; GFX9-SDAG:       ; %bb.0: ; %entry10365; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10366; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v2, v0, v1, v210367; GFX9-SDAG-NEXT:    v_mad_legacy_u16 v0, v0, v1, v310368; GFX9-SDAG-NEXT:    s_mov_b32 s4, 0x504010010369; GFX9-SDAG-NEXT:    v_perm_b32 v0, v0, v2, s410370; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]10371;10372; GFX9-GISEL-LABEL: multi_use_mul_mad_i16_var:10373; GFX9-GISEL:       ; %bb.0: ; %entry10374; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10375; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v2, v0, v1, v210376; GFX9-GISEL-NEXT:    v_mad_legacy_u16 v0, v0, v1, v310377; GFX9-GISEL-NEXT:    v_lshl_or_b32 v0, v0, 16, v210378; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]10379;10380; GFX10-SDAG-LABEL: multi_use_mul_mad_i16_var:10381; GFX10-SDAG:       ; %bb.0: ; %entry10382; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10383; GFX10-SDAG-NEXT:    v_mad_u16 v2, v0, v1, v210384; GFX10-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v310385; GFX10-SDAG-NEXT:    v_perm_b32 v0, v0, v2, 0x504010010386; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]10387;10388; GFX10-GISEL-LABEL: multi_use_mul_mad_i16_var:10389; GFX10-GISEL:       ; %bb.0: ; %entry10390; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10391; GFX10-GISEL-NEXT:    v_mad_u16 v2, v0, v1, v210392; GFX10-GISEL-NEXT:    v_mad_u16 v0, v0, v1, v310393; GFX10-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v210394; GFX10-GISEL-NEXT:    v_lshl_or_b32 v0, v0, 16, v110395; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]10396;10397; GFX11-SDAG-TRUE16-LABEL: multi_use_mul_mad_i16_var:10398; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry10399; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10400; GFX11-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v0.l10401; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10402; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v1.l, v2.l10403; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.l, v3.l10404; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]10405;10406; GFX11-SDAG-FAKE16-LABEL: multi_use_mul_mad_i16_var:10407; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry10408; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10409; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v2, v0, v1, v210410; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v310411; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10412; GFX11-SDAG-FAKE16-NEXT:    v_perm_b32 v0, v0, v2, 0x504010010413; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]10414;10415; GFX11-GISEL-TRUE16-LABEL: multi_use_mul_mad_i16_var:10416; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry10417; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10418; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v2.l, v0.l, v1.l, v2.l10419; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v2.h, v0.l, v1.l, v3.l10420; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10421; GFX11-GISEL-TRUE16-NEXT:    v_mov_b32_e32 v0, v210422; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]10423;10424; GFX11-GISEL-FAKE16-LABEL: multi_use_mul_mad_i16_var:10425; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry10426; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10427; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v0, v1, v210428; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v310429; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10430; GFX11-GISEL-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v210431; GFX11-GISEL-FAKE16-NEXT:    v_lshl_or_b32 v0, v0, 16, v110432; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]10433;10434; GFX1200-SDAG-TRUE16-LABEL: multi_use_mul_mad_i16_var:10435; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry10436; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x010437; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x010438; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x010439; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x010440; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x010441; GFX1200-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v0.l10442; GFX1200-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10443; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.h, v1.l, v2.l10444; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.h, v0.h, v1.l, v3.l10445; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]10446;10447; GFX1200-SDAG-FAKE16-LABEL: multi_use_mul_mad_i16_var:10448; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry10449; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x010450; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x010451; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x010452; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x010453; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x010454; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v2, v0, v1, v210455; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v310456; GFX1200-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10457; GFX1200-SDAG-FAKE16-NEXT:    v_perm_b32 v0, v0, v2, 0x504010010458; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]10459;10460; GFX1200-GISEL-TRUE16-LABEL: multi_use_mul_mad_i16_var:10461; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry10462; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x010463; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x010464; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x010465; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x010466; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x010467; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v2.l, v0.l, v1.l, v2.l10468; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v2.h, v0.l, v1.l, v3.l10469; GFX1200-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)10470; GFX1200-GISEL-TRUE16-NEXT:    v_mov_b32_e32 v0, v210471; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]10472;10473; GFX1200-GISEL-FAKE16-LABEL: multi_use_mul_mad_i16_var:10474; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry10475; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x010476; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x010477; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x010478; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x010479; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x010480; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v2, v0, v1, v210481; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v310482; GFX1200-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10483; GFX1200-GISEL-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v210484; GFX1200-GISEL-FAKE16-NEXT:    v_lshl_or_b32 v0, v0, 16, v110485; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]10486;10487; GFX1250-SDAG-LABEL: multi_use_mul_mad_i16_var:10488; GFX1250-SDAG:       ; %bb.0: ; %entry10489; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x010490; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x010491; GFX1250-SDAG-NEXT:    v_mad_u16 v2, v0, v1, v210492; GFX1250-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v310493; GFX1250-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)10494; GFX1250-SDAG-NEXT:    v_perm_b32 v0, v0, v2, 0x504010010495; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]10496;10497; GFX1250-GISEL-LABEL: multi_use_mul_mad_i16_var:10498; GFX1250-GISEL:       ; %bb.0: ; %entry10499; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x010500; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x010501; GFX1250-GISEL-NEXT:    v_mad_u16 v2, v0, v1, v210502; GFX1250-GISEL-NEXT:    v_mad_u16 v0, v0, v1, v310503; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)10504; GFX1250-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v210505; GFX1250-GISEL-NEXT:    v_lshl_or_b32 v0, v0, 16, v110506; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]10507entry:10508  %mul = mul i16 %x, %y10509  %add0 = add i16 %mul, %z010510  %add1 = add i16 %mul, %z110511  %insert.0 = insertelement <2 x i16> poison, i16 %add0, i16 010512  %insert.1 = insertelement <2 x i16> %insert.0, i16 %add1, i16 110513  ret <2 x i16> %insert.110514}10515 10516define i32 @other_use_mul_mad_i32_var(i32 %x, i32 %y, i32 %z, ptr addrspace(3) %ptr) {10517; GFX67-LABEL: other_use_mul_mad_i32_var:10518; GFX67:       ; %bb.0: ; %entry10519; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10520; GFX67-NEXT:    v_mul_lo_u32 v1, v0, v110521; GFX67-NEXT:    s_mov_b32 m0, -110522; GFX67-NEXT:    v_add_i32_e32 v0, vcc, v1, v210523; GFX67-NEXT:    ds_write_b32 v3, v110524; GFX67-NEXT:    s_waitcnt lgkmcnt(0)10525; GFX67-NEXT:    s_setpc_b64 s[30:31]10526;10527; GFX8-LABEL: other_use_mul_mad_i32_var:10528; GFX8:       ; %bb.0: ; %entry10529; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10530; GFX8-NEXT:    v_mul_lo_u32 v1, v0, v110531; GFX8-NEXT:    s_mov_b32 m0, -110532; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v1, v210533; GFX8-NEXT:    ds_write_b32 v3, v110534; GFX8-NEXT:    s_waitcnt lgkmcnt(0)10535; GFX8-NEXT:    s_setpc_b64 s[30:31]10536;10537; GFX9-LABEL: other_use_mul_mad_i32_var:10538; GFX9:       ; %bb.0: ; %entry10539; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10540; GFX9-NEXT:    v_mul_lo_u32 v1, v0, v110541; GFX9-NEXT:    v_add_u32_e32 v0, v1, v210542; GFX9-NEXT:    ds_write_b32 v3, v110543; GFX9-NEXT:    s_waitcnt lgkmcnt(0)10544; GFX9-NEXT:    s_setpc_b64 s[30:31]10545;10546; GFX10-LABEL: other_use_mul_mad_i32_var:10547; GFX10:       ; %bb.0: ; %entry10548; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10549; GFX10-NEXT:    v_mul_lo_u32 v1, v0, v110550; GFX10-NEXT:    v_add_nc_u32_e32 v0, v1, v210551; GFX10-NEXT:    ds_write_b32 v3, v110552; GFX10-NEXT:    s_waitcnt lgkmcnt(0)10553; GFX10-NEXT:    s_setpc_b64 s[30:31]10554;10555; GFX11-LABEL: other_use_mul_mad_i32_var:10556; GFX11:       ; %bb.0: ; %entry10557; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10558; GFX11-NEXT:    v_mul_lo_u32 v1, v0, v110559; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)10560; GFX11-NEXT:    v_add_nc_u32_e32 v0, v1, v210561; GFX11-NEXT:    ds_store_b32 v3, v110562; GFX11-NEXT:    s_waitcnt lgkmcnt(0)10563; GFX11-NEXT:    s_setpc_b64 s[30:31]10564;10565; GFX1200-LABEL: other_use_mul_mad_i32_var:10566; GFX1200:       ; %bb.0: ; %entry10567; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x010568; GFX1200-NEXT:    s_wait_expcnt 0x010569; GFX1200-NEXT:    s_wait_samplecnt 0x010570; GFX1200-NEXT:    s_wait_bvhcnt 0x010571; GFX1200-NEXT:    s_wait_kmcnt 0x010572; GFX1200-NEXT:    v_mul_lo_u32 v1, v0, v110573; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1)10574; GFX1200-NEXT:    v_add_nc_u32_e32 v0, v1, v210575; GFX1200-NEXT:    ds_store_b32 v3, v110576; GFX1200-NEXT:    s_wait_dscnt 0x010577; GFX1200-NEXT:    s_setpc_b64 s[30:31]10578;10579; GFX1250-LABEL: other_use_mul_mad_i32_var:10580; GFX1250:       ; %bb.0: ; %entry10581; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010582; GFX1250-NEXT:    s_wait_kmcnt 0x010583; GFX1250-NEXT:    v_mul_lo_u32 v1, v0, v110584; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)10585; GFX1250-NEXT:    v_add_nc_u32_e32 v0, v1, v210586; GFX1250-NEXT:    ds_store_b32 v3, v110587; GFX1250-NEXT:    s_wait_dscnt 0x010588; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10589entry:10590  %mul = mul i32 %x, %y10591  %add0 = add i32 %mul, %z10592  store i32 %mul, ptr addrspace(3) %ptr10593  ret i32 %add010594}10595 10596define i16 @other_use_mul_mad_i16_var(i16 %x, i16 %y, i16 %z, ptr addrspace(3) %ptr) {10597; GFX67-LABEL: other_use_mul_mad_i16_var:10598; GFX67:       ; %bb.0: ; %entry10599; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10600; GFX67-NEXT:    v_and_b32_e32 v0, 0xffff, v010601; GFX67-NEXT:    v_and_b32_e32 v1, 0xffff, v110602; GFX67-NEXT:    v_mul_u32_u24_e32 v4, v0, v110603; GFX67-NEXT:    v_mad_u32_u24 v0, v0, v1, v210604; GFX67-NEXT:    s_mov_b32 m0, -110605; GFX67-NEXT:    ds_write_b16 v3, v410606; GFX67-NEXT:    s_waitcnt lgkmcnt(0)10607; GFX67-NEXT:    s_setpc_b64 s[30:31]10608;10609; GFX8-LABEL: other_use_mul_mad_i16_var:10610; GFX8:       ; %bb.0: ; %entry10611; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10612; GFX8-NEXT:    v_mul_lo_u16_e32 v4, v0, v110613; GFX8-NEXT:    v_mad_u16 v0, v0, v1, v210614; GFX8-NEXT:    s_mov_b32 m0, -110615; GFX8-NEXT:    ds_write_b16 v3, v410616; GFX8-NEXT:    s_waitcnt lgkmcnt(0)10617; GFX8-NEXT:    s_setpc_b64 s[30:31]10618;10619; GFX9-LABEL: other_use_mul_mad_i16_var:10620; GFX9:       ; %bb.0: ; %entry10621; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10622; GFX9-NEXT:    v_mul_lo_u16_e32 v4, v0, v110623; GFX9-NEXT:    v_mad_legacy_u16 v0, v0, v1, v210624; GFX9-NEXT:    ds_write_b16 v3, v410625; GFX9-NEXT:    s_waitcnt lgkmcnt(0)10626; GFX9-NEXT:    s_setpc_b64 s[30:31]10627;10628; GFX10-LABEL: other_use_mul_mad_i16_var:10629; GFX10:       ; %bb.0: ; %entry10630; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10631; GFX10-NEXT:    v_mul_lo_u16 v4, v0, v110632; GFX10-NEXT:    v_mad_u16 v0, v0, v1, v210633; GFX10-NEXT:    ds_write_b16 v3, v410634; GFX10-NEXT:    s_waitcnt lgkmcnt(0)10635; GFX10-NEXT:    s_setpc_b64 s[30:31]10636;10637; GFX11-SDAG-TRUE16-LABEL: other_use_mul_mad_i16_var:10638; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry10639; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10640; GFX11-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.l, v1.l10641; GFX11-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, v2.l10642; GFX11-SDAG-TRUE16-NEXT:    ds_store_b16_d16_hi v3, v010643; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt lgkmcnt(0)10644; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]10645;10646; GFX11-SDAG-FAKE16-LABEL: other_use_mul_mad_i16_var:10647; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry10648; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10649; GFX11-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v4, v0, v110650; GFX11-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v210651; GFX11-SDAG-FAKE16-NEXT:    ds_store_b16 v3, v410652; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt lgkmcnt(0)10653; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]10654;10655; GFX11-GISEL-TRUE16-LABEL: other_use_mul_mad_i16_var:10656; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry10657; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10658; GFX11-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.l, v1.l10659; GFX11-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, v2.l10660; GFX11-GISEL-TRUE16-NEXT:    ds_store_b16_d16_hi v3, v010661; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt lgkmcnt(0)10662; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]10663;10664; GFX11-GISEL-FAKE16-LABEL: other_use_mul_mad_i16_var:10665; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry10666; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10667; GFX11-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v4, v0, v110668; GFX11-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v210669; GFX11-GISEL-FAKE16-NEXT:    ds_store_b16 v3, v410670; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt lgkmcnt(0)10671; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]10672;10673; GFX1200-SDAG-TRUE16-LABEL: other_use_mul_mad_i16_var:10674; GFX1200-SDAG-TRUE16:       ; %bb.0: ; %entry10675; GFX1200-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x010676; GFX1200-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x010677; GFX1200-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x010678; GFX1200-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x010679; GFX1200-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x010680; GFX1200-SDAG-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.l, v1.l10681; GFX1200-SDAG-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, v2.l10682; GFX1200-SDAG-TRUE16-NEXT:    ds_store_b16_d16_hi v3, v010683; GFX1200-SDAG-TRUE16-NEXT:    s_wait_dscnt 0x010684; GFX1200-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]10685;10686; GFX1200-SDAG-FAKE16-LABEL: other_use_mul_mad_i16_var:10687; GFX1200-SDAG-FAKE16:       ; %bb.0: ; %entry10688; GFX1200-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x010689; GFX1200-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x010690; GFX1200-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x010691; GFX1200-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x010692; GFX1200-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x010693; GFX1200-SDAG-FAKE16-NEXT:    v_mul_lo_u16 v4, v0, v110694; GFX1200-SDAG-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v210695; GFX1200-SDAG-FAKE16-NEXT:    ds_store_b16 v3, v410696; GFX1200-SDAG-FAKE16-NEXT:    s_wait_dscnt 0x010697; GFX1200-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]10698;10699; GFX1200-GISEL-TRUE16-LABEL: other_use_mul_mad_i16_var:10700; GFX1200-GISEL-TRUE16:       ; %bb.0: ; %entry10701; GFX1200-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x010702; GFX1200-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x010703; GFX1200-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x010704; GFX1200-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x010705; GFX1200-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x010706; GFX1200-GISEL-TRUE16-NEXT:    v_mul_lo_u16 v0.h, v0.l, v1.l10707; GFX1200-GISEL-TRUE16-NEXT:    v_mad_u16 v0.l, v0.l, v1.l, v2.l10708; GFX1200-GISEL-TRUE16-NEXT:    ds_store_b16_d16_hi v3, v010709; GFX1200-GISEL-TRUE16-NEXT:    s_wait_dscnt 0x010710; GFX1200-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]10711;10712; GFX1200-GISEL-FAKE16-LABEL: other_use_mul_mad_i16_var:10713; GFX1200-GISEL-FAKE16:       ; %bb.0: ; %entry10714; GFX1200-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x010715; GFX1200-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x010716; GFX1200-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x010717; GFX1200-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x010718; GFX1200-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x010719; GFX1200-GISEL-FAKE16-NEXT:    v_mul_lo_u16 v4, v0, v110720; GFX1200-GISEL-FAKE16-NEXT:    v_mad_u16 v0, v0, v1, v210721; GFX1200-GISEL-FAKE16-NEXT:    ds_store_b16 v3, v410722; GFX1200-GISEL-FAKE16-NEXT:    s_wait_dscnt 0x010723; GFX1200-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]10724;10725; GFX1250-LABEL: other_use_mul_mad_i16_var:10726; GFX1250:       ; %bb.0: ; %entry10727; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010728; GFX1250-NEXT:    s_wait_kmcnt 0x010729; GFX1250-NEXT:    v_mul_lo_u16 v4, v0, v110730; GFX1250-NEXT:    v_mad_u16 v0, v0, v1, v210731; GFX1250-NEXT:    ds_store_b16 v3, v410732; GFX1250-NEXT:    s_wait_dscnt 0x010733; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10734entry:10735  %mul = mul i16 %x, %y10736  %add0 = add i16 %mul, %z10737  store i16 %mul, ptr addrspace(3) %ptr10738  ret i16 %add010739}10740 10741define <4 x i16> @multi_use_mul_mad_v2i16_var(<2 x i16> %x, <2 x i16> %y, <2 x i16> %z0, <2 x i16> %z1) {10742; GFX67-SDAG-LABEL: multi_use_mul_mad_v2i16_var:10743; GFX67-SDAG:       ; %bb.0: ; %entry10744; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10745; GFX67-SDAG-NEXT:    v_and_b32_e32 v8, 0xffff, v010746; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v210747; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v110748; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v310749; GFX67-SDAG-NEXT:    v_mad_u32_u24 v5, v1, v3, v510750; GFX67-SDAG-NEXT:    v_mad_u32_u24 v4, v8, v2, v410751; GFX67-SDAG-NEXT:    v_mad_u32_u24 v3, v1, v3, v710752; GFX67-SDAG-NEXT:    v_mad_u32_u24 v2, v8, v2, v610753; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 16, v510754; GFX67-SDAG-NEXT:    v_and_b32_e32 v4, 0xffff, v410755; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v310756; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v210757; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v4, v010758; GFX67-SDAG-NEXT:    v_or_b32_e32 v2, v2, v110759; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v510760; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v310761; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]10762;10763; GFX67-GISEL-LABEL: multi_use_mul_mad_v2i16_var:10764; GFX67-GISEL:       ; %bb.0: ; %entry10765; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10766; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v010767; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210768; GFX67-GISEL-NEXT:    v_and_b32_e32 v9, 0xffff, v110769; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v310770; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v8, v2, v410771; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v9, v3, v510772; GFX67-GISEL-NEXT:    v_mad_u32_u24 v2, v8, v2, v610773; GFX67-GISEL-NEXT:    v_mad_u32_u24 v3, v9, v3, v710774; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]10775;10776; GFX8-SDAG-LABEL: multi_use_mul_mad_v2i16_var:10777; GFX8-SDAG:       ; %bb.0: ; %entry10778; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10779; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v110780; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v010781; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v210782; GFX8-SDAG-NEXT:    v_mad_u16 v6, v5, v4, v610783; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v6, 16, v610784; GFX8-SDAG-NEXT:    v_mad_u16 v2, v0, v1, v210785; GFX8-SDAG-NEXT:    v_or_b32_e32 v2, v2, v610786; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v6, 16, v310787; GFX8-SDAG-NEXT:    v_mad_u16 v4, v5, v4, v610788; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v4, 16, v410789; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v310790; GFX8-SDAG-NEXT:    v_or_b32_e32 v1, v0, v410791; GFX8-SDAG-NEXT:    v_mov_b32_e32 v0, v210792; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]10793;10794; GFX8-GISEL-LABEL: multi_use_mul_mad_v2i16_var:10795; GFX8-GISEL:       ; %bb.0: ; %entry10796; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10797; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v4, 16, v010798; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v110799; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v6, 16, v210800; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v310801; GFX8-GISEL-NEXT:    v_mad_u16 v6, v4, v5, v610802; GFX8-GISEL-NEXT:    v_mad_u16 v2, v0, v1, v210803; GFX8-GISEL-NEXT:    v_lshlrev_b32_e32 v6, 16, v610804; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, v310805; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v5, v710806; GFX8-GISEL-NEXT:    v_or_b32_e32 v2, v2, v610807; GFX8-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v110808; GFX8-GISEL-NEXT:    v_or_b32_e32 v1, v0, v110809; GFX8-GISEL-NEXT:    v_mov_b32_e32 v0, v210810; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]10811;10812; GFX9-LABEL: multi_use_mul_mad_v2i16_var:10813; GFX9:       ; %bb.0: ; %entry10814; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10815; GFX9-NEXT:    v_pk_mad_u16 v2, v0, v1, v210816; GFX9-NEXT:    v_pk_mad_u16 v1, v0, v1, v310817; GFX9-NEXT:    v_mov_b32_e32 v0, v210818; GFX9-NEXT:    s_setpc_b64 s[30:31]10819;10820; GFX10-LABEL: multi_use_mul_mad_v2i16_var:10821; GFX10:       ; %bb.0: ; %entry10822; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10823; GFX10-NEXT:    v_pk_mad_u16 v2, v0, v1, v210824; GFX10-NEXT:    v_pk_mad_u16 v1, v0, v1, v310825; GFX10-NEXT:    v_mov_b32_e32 v0, v210826; GFX10-NEXT:    s_setpc_b64 s[30:31]10827;10828; GFX11-LABEL: multi_use_mul_mad_v2i16_var:10829; GFX11:       ; %bb.0: ; %entry10830; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10831; GFX11-NEXT:    v_pk_mad_u16 v2, v0, v1, v210832; GFX11-NEXT:    v_pk_mad_u16 v1, v0, v1, v310833; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)10834; GFX11-NEXT:    v_mov_b32_e32 v0, v210835; GFX11-NEXT:    s_setpc_b64 s[30:31]10836;10837; GFX1200-LABEL: multi_use_mul_mad_v2i16_var:10838; GFX1200:       ; %bb.0: ; %entry10839; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x010840; GFX1200-NEXT:    s_wait_expcnt 0x010841; GFX1200-NEXT:    s_wait_samplecnt 0x010842; GFX1200-NEXT:    s_wait_bvhcnt 0x010843; GFX1200-NEXT:    s_wait_kmcnt 0x010844; GFX1200-NEXT:    v_pk_mad_u16 v2, v0, v1, v210845; GFX1200-NEXT:    v_pk_mad_u16 v1, v0, v1, v310846; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_2)10847; GFX1200-NEXT:    v_mov_b32_e32 v0, v210848; GFX1200-NEXT:    s_setpc_b64 s[30:31]10849;10850; GFX1250-LABEL: multi_use_mul_mad_v2i16_var:10851; GFX1250:       ; %bb.0: ; %entry10852; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010853; GFX1250-NEXT:    s_wait_kmcnt 0x010854; GFX1250-NEXT:    v_pk_mad_u16 v2, v0, v1, v210855; GFX1250-NEXT:    v_pk_mad_u16 v1, v0, v1, v310856; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_2)10857; GFX1250-NEXT:    v_mov_b32_e32 v0, v210858; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10859entry:10860  %mul = mul <2 x i16> %x, %y10861  %add0 = add <2 x i16> %mul, %z010862  %add1 = add <2 x i16> %mul, %z110863  %shuffle = shufflevector <2 x i16> %add0, <2 x i16> %add1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10864  ret <4 x i16> %shuffle10865}10866 10867define <2 x i16> @other_use_mul_mad_v2i16_var(<2 x i16> %x, <2 x i16> %y, <2 x i16> %z, ptr addrspace(3) %ptr) {10868; GFX67-SDAG-LABEL: other_use_mul_mad_v2i16_var:10869; GFX67-SDAG:       ; %bb.0: ; %entry10870; GFX67-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10871; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v010872; GFX67-SDAG-NEXT:    v_and_b32_e32 v2, 0xffff, v210873; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v110874; GFX67-SDAG-NEXT:    v_and_b32_e32 v3, 0xffff, v310875; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v7, v0, v210876; GFX67-SDAG-NEXT:    v_mul_u32_u24_e32 v8, v1, v310877; GFX67-SDAG-NEXT:    v_mad_u32_u24 v1, v1, v3, v510878; GFX67-SDAG-NEXT:    v_mad_u32_u24 v0, v0, v2, v410879; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v8, 16, v810880; GFX67-SDAG-NEXT:    v_and_b32_e32 v7, 0xffff, v710881; GFX67-SDAG-NEXT:    v_lshlrev_b32_e32 v3, 16, v110882; GFX67-SDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v010883; GFX67-SDAG-NEXT:    v_or_b32_e32 v7, v7, v810884; GFX67-SDAG-NEXT:    v_or_b32_e32 v0, v0, v310885; GFX67-SDAG-NEXT:    s_mov_b32 m0, -110886; GFX67-SDAG-NEXT:    v_and_b32_e32 v1, 0xffff, v110887; GFX67-SDAG-NEXT:    ds_write_b32 v6, v710888; GFX67-SDAG-NEXT:    s_waitcnt lgkmcnt(0)10889; GFX67-SDAG-NEXT:    s_setpc_b64 s[30:31]10890;10891; GFX67-GISEL-LABEL: other_use_mul_mad_v2i16_var:10892; GFX67-GISEL:       ; %bb.0: ; %entry10893; GFX67-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10894; GFX67-GISEL-NEXT:    v_and_b32_e32 v1, 0xffff, v110895; GFX67-GISEL-NEXT:    v_and_b32_e32 v3, 0xffff, v310896; GFX67-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v010897; GFX67-GISEL-NEXT:    v_and_b32_e32 v2, 0xffff, v210898; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v8, v1, v310899; GFX67-GISEL-NEXT:    v_mul_u32_u24_e32 v7, v0, v210900; GFX67-GISEL-NEXT:    v_and_b32_e32 v8, 0xffff, v810901; GFX67-GISEL-NEXT:    v_and_b32_e32 v7, 0xffff, v710902; GFX67-GISEL-NEXT:    v_lshlrev_b32_e32 v8, 16, v810903; GFX67-GISEL-NEXT:    v_or_b32_e32 v7, v7, v810904; GFX67-GISEL-NEXT:    v_mad_u32_u24 v0, v0, v2, v410905; GFX67-GISEL-NEXT:    v_mad_u32_u24 v1, v1, v3, v510906; GFX67-GISEL-NEXT:    s_mov_b32 m0, -110907; GFX67-GISEL-NEXT:    ds_write_b32 v6, v710908; GFX67-GISEL-NEXT:    s_waitcnt lgkmcnt(0)10909; GFX67-GISEL-NEXT:    s_setpc_b64 s[30:31]10910;10911; GFX8-SDAG-LABEL: other_use_mul_mad_v2i16_var:10912; GFX8-SDAG:       ; %bb.0: ; %entry10913; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10914; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v110915; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v5, 16, v010916; GFX8-SDAG-NEXT:    v_mul_lo_u16_sdwa v6, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10917; GFX8-SDAG-NEXT:    v_mul_lo_u16_e32 v7, v0, v110918; GFX8-SDAG-NEXT:    v_or_b32_e32 v6, v7, v610919; GFX8-SDAG-NEXT:    v_lshrrev_b32_e32 v7, 16, v210920; GFX8-SDAG-NEXT:    v_mad_u16 v4, v5, v4, v710921; GFX8-SDAG-NEXT:    v_lshlrev_b32_e32 v4, 16, v410922; GFX8-SDAG-NEXT:    v_mad_u16 v0, v0, v1, v210923; GFX8-SDAG-NEXT:    v_or_b32_e32 v0, v0, v410924; GFX8-SDAG-NEXT:    s_mov_b32 m0, -110925; GFX8-SDAG-NEXT:    ds_write_b32 v3, v610926; GFX8-SDAG-NEXT:    s_waitcnt lgkmcnt(0)10927; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]10928;10929; GFX8-GISEL-LABEL: other_use_mul_mad_v2i16_var:10930; GFX8-GISEL:       ; %bb.0: ; %entry10931; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10932; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v4, 16, v010933; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v110934; GFX8-GISEL-NEXT:    v_mul_lo_u16_e32 v6, v0, v110935; GFX8-GISEL-NEXT:    v_mul_lo_u16_sdwa v7, v4, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10936; GFX8-GISEL-NEXT:    v_or_b32_e32 v6, v6, v710937; GFX8-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v210938; GFX8-GISEL-NEXT:    v_mad_u16 v0, v0, v1, v210939; GFX8-GISEL-NEXT:    v_mad_u16 v1, v4, v5, v710940; GFX8-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v110941; GFX8-GISEL-NEXT:    v_or_b32_e32 v0, v0, v110942; GFX8-GISEL-NEXT:    s_mov_b32 m0, -110943; GFX8-GISEL-NEXT:    ds_write_b32 v3, v610944; GFX8-GISEL-NEXT:    s_waitcnt lgkmcnt(0)10945; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]10946;10947; GFX9-LABEL: other_use_mul_mad_v2i16_var:10948; GFX9:       ; %bb.0: ; %entry10949; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10950; GFX9-NEXT:    v_pk_mul_lo_u16 v4, v0, v110951; GFX9-NEXT:    v_pk_mad_u16 v0, v0, v1, v210952; GFX9-NEXT:    ds_write_b32 v3, v410953; GFX9-NEXT:    s_waitcnt lgkmcnt(0)10954; GFX9-NEXT:    s_setpc_b64 s[30:31]10955;10956; GFX10-LABEL: other_use_mul_mad_v2i16_var:10957; GFX10:       ; %bb.0: ; %entry10958; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10959; GFX10-NEXT:    v_pk_mul_lo_u16 v4, v0, v110960; GFX10-NEXT:    v_pk_mad_u16 v0, v0, v1, v210961; GFX10-NEXT:    ds_write_b32 v3, v410962; GFX10-NEXT:    s_waitcnt lgkmcnt(0)10963; GFX10-NEXT:    s_setpc_b64 s[30:31]10964;10965; GFX11-LABEL: other_use_mul_mad_v2i16_var:10966; GFX11:       ; %bb.0: ; %entry10967; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10968; GFX11-NEXT:    v_pk_mul_lo_u16 v4, v0, v110969; GFX11-NEXT:    v_pk_mad_u16 v0, v0, v1, v210970; GFX11-NEXT:    ds_store_b32 v3, v410971; GFX11-NEXT:    s_waitcnt lgkmcnt(0)10972; GFX11-NEXT:    s_setpc_b64 s[30:31]10973;10974; GFX1200-LABEL: other_use_mul_mad_v2i16_var:10975; GFX1200:       ; %bb.0: ; %entry10976; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x010977; GFX1200-NEXT:    s_wait_expcnt 0x010978; GFX1200-NEXT:    s_wait_samplecnt 0x010979; GFX1200-NEXT:    s_wait_bvhcnt 0x010980; GFX1200-NEXT:    s_wait_kmcnt 0x010981; GFX1200-NEXT:    v_pk_mul_lo_u16 v4, v0, v110982; GFX1200-NEXT:    v_pk_mad_u16 v0, v0, v1, v210983; GFX1200-NEXT:    ds_store_b32 v3, v410984; GFX1200-NEXT:    s_wait_dscnt 0x010985; GFX1200-NEXT:    s_setpc_b64 s[30:31]10986;10987; GFX1250-LABEL: other_use_mul_mad_v2i16_var:10988; GFX1250:       ; %bb.0: ; %entry10989; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x010990; GFX1250-NEXT:    s_wait_kmcnt 0x010991; GFX1250-NEXT:    v_pk_mul_lo_u16 v4, v0, v110992; GFX1250-NEXT:    v_pk_mad_u16 v0, v0, v1, v210993; GFX1250-NEXT:    ds_store_b32 v3, v410994; GFX1250-NEXT:    s_wait_dscnt 0x010995; GFX1250-NEXT:    s_set_pc_i64 s[30:31]10996entry:10997  %mul = mul <2 x i16> %x, %y10998  %add0 = add <2 x i16> %mul, %z10999  store <2 x i16> %mul, ptr addrspace(3) %ptr11000  ret <2 x i16> %add011001}11002 11003define i64 @mul_u24_add64(i32 %x, i32 %y, i64 %z) {11004; GFX67-LABEL: mul_u24_add64:11005; GFX67:       ; %bb.0:11006; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11007; GFX67-NEXT:    v_mul_hi_u32_u24_e32 v4, v0, v111008; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v111009; GFX67-NEXT:    v_add_i32_e32 v0, vcc, v0, v211010; GFX67-NEXT:    v_addc_u32_e32 v1, vcc, v4, v3, vcc11011; GFX67-NEXT:    s_setpc_b64 s[30:31]11012;11013; GFX8-LABEL: mul_u24_add64:11014; GFX8:       ; %bb.0:11015; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11016; GFX8-NEXT:    v_mul_hi_u32_u24_e32 v4, v0, v111017; GFX8-NEXT:    v_mul_u32_u24_e32 v0, v0, v111018; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v211019; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, v4, v3, vcc11020; GFX8-NEXT:    s_setpc_b64 s[30:31]11021;11022; GFX9-SDAG-LABEL: mul_u24_add64:11023; GFX9-SDAG:       ; %bb.0:11024; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11025; GFX9-SDAG-NEXT:    v_mad_u64_u32 v[0:1], s[4:5], v0, v1, v[2:3]11026; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]11027;11028; GFX9-GISEL-LABEL: mul_u24_add64:11029; GFX9-GISEL:       ; %bb.0:11030; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11031; GFX9-GISEL-NEXT:    v_mul_hi_u32_u24_e32 v4, v0, v111032; GFX9-GISEL-NEXT:    v_mul_u32_u24_e32 v0, v0, v111033; GFX9-GISEL-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v211034; GFX9-GISEL-NEXT:    v_addc_co_u32_e32 v1, vcc, v4, v3, vcc11035; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]11036;11037; GFX10-SDAG-LABEL: mul_u24_add64:11038; GFX10-SDAG:       ; %bb.0:11039; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11040; GFX10-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v0, v1, v[2:3]11041; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]11042;11043; GFX10-GISEL-LABEL: mul_u24_add64:11044; GFX10-GISEL:       ; %bb.0:11045; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11046; GFX10-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v0, v111047; GFX10-GISEL-NEXT:    v_mul_hi_u32_u24_e32 v1, v0, v111048; GFX10-GISEL-NEXT:    v_add_co_u32 v0, vcc_lo, v4, v211049; GFX10-GISEL-NEXT:    v_add_co_ci_u32_e64 v1, null, v1, v3, vcc_lo11050; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]11051;11052; GFX11-SDAG-LABEL: mul_u24_add64:11053; GFX11-SDAG:       ; %bb.0:11054; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11055; GFX11-SDAG-NEXT:    v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v011056; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)11057; GFX11-SDAG-NEXT:    v_mad_u64_u32 v[0:1], null, v5, v4, v[2:3]11058; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]11059;11060; GFX11-GISEL-LABEL: mul_u24_add64:11061; GFX11-GISEL:       ; %bb.0:11062; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11063; GFX11-GISEL-NEXT:    v_mul_u32_u24_e32 v4, v0, v111064; GFX11-GISEL-NEXT:    v_mul_hi_u32_u24_e32 v1, v0, v111065; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)11066; GFX11-GISEL-NEXT:    v_add_co_u32 v0, vcc_lo, v4, v211067; GFX11-GISEL-NEXT:    v_add_co_ci_u32_e64 v1, null, v1, v3, vcc_lo11068; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]11069;11070; GFX1200-LABEL: mul_u24_add64:11071; GFX1200:       ; %bb.0:11072; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x011073; GFX1200-NEXT:    s_wait_expcnt 0x011074; GFX1200-NEXT:    s_wait_samplecnt 0x011075; GFX1200-NEXT:    s_wait_bvhcnt 0x011076; GFX1200-NEXT:    s_wait_kmcnt 0x011077; GFX1200-NEXT:    v_mad_co_u64_u32 v[0:1], null, v0, v1, v[2:3]11078; GFX1200-NEXT:    s_setpc_b64 s[30:31]11079;11080; GFX1250-LABEL: mul_u24_add64:11081; GFX1250:       ; %bb.0:11082; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x011083; GFX1250-NEXT:    s_wait_kmcnt 0x011084; GFX1250-NEXT:    v_mad_co_u64_u32 v[0:1], null, v0, v1, v[2:3]11085; GFX1250-NEXT:    s_set_pc_i64 s[30:31]11086  %mul = call i64 @llvm.amdgcn.mul.u24.i64(i32 %x, i32 %y)11087  %add = add i64 %mul, %z11088  ret i64 %add11089}11090 11091define i64 @mul_u24_zext_add64(i32 %x, i32 %y, i64 %z) {11092; GFX67-LABEL: mul_u24_zext_add64:11093; GFX67:       ; %bb.0:11094; GFX67-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11095; GFX67-NEXT:    v_mul_u32_u24_e32 v0, v0, v111096; GFX67-NEXT:    v_add_i32_e32 v0, vcc, v0, v211097; GFX67-NEXT:    v_addc_u32_e32 v1, vcc, 0, v3, vcc11098; GFX67-NEXT:    s_setpc_b64 s[30:31]11099;11100; GFX8-LABEL: mul_u24_zext_add64:11101; GFX8:       ; %bb.0:11102; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11103; GFX8-NEXT:    v_mul_u32_u24_e32 v0, v0, v111104; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v211105; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v3, vcc11106; GFX8-NEXT:    s_setpc_b64 s[30:31]11107;11108; GFX9-LABEL: mul_u24_zext_add64:11109; GFX9:       ; %bb.0:11110; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11111; GFX9-NEXT:    v_mul_u32_u24_e32 v0, v0, v111112; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v211113; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v3, vcc11114; GFX9-NEXT:    s_setpc_b64 s[30:31]11115;11116; GFX10-LABEL: mul_u24_zext_add64:11117; GFX10:       ; %bb.0:11118; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11119; GFX10-NEXT:    v_mul_u32_u24_e32 v0, v0, v111120; GFX10-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v211121; GFX10-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo11122; GFX10-NEXT:    s_setpc_b64 s[30:31]11123;11124; GFX11-LABEL: mul_u24_zext_add64:11125; GFX11:       ; %bb.0:11126; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11127; GFX11-NEXT:    v_mul_u32_u24_e32 v0, v0, v111128; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)11129; GFX11-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v211130; GFX11-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo11131; GFX11-NEXT:    s_setpc_b64 s[30:31]11132;11133; GFX1200-LABEL: mul_u24_zext_add64:11134; GFX1200:       ; %bb.0:11135; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x011136; GFX1200-NEXT:    s_wait_expcnt 0x011137; GFX1200-NEXT:    s_wait_samplecnt 0x011138; GFX1200-NEXT:    s_wait_bvhcnt 0x011139; GFX1200-NEXT:    s_wait_kmcnt 0x011140; GFX1200-NEXT:    v_mul_u32_u24_e32 v0, v0, v111141; GFX1200-NEXT:    s_delay_alu instid0(VALU_DEP_1)11142; GFX1200-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v211143; GFX1200-NEXT:    s_wait_alu depctr_va_vcc(0)11144; GFX1200-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo11145; GFX1200-NEXT:    s_setpc_b64 s[30:31]11146;11147; GFX1250-LABEL: mul_u24_zext_add64:11148; GFX1250:       ; %bb.0:11149; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x011150; GFX1250-NEXT:    s_wait_kmcnt 0x011151; GFX1250-NEXT:    v_mov_b32_e32 v5, 011152; GFX1250-NEXT:    v_mul_u32_u24_e32 v4, v0, v111153; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)11154; GFX1250-NEXT:    v_add_nc_u64_e32 v[0:1], v[4:5], v[2:3]11155; GFX1250-NEXT:    s_set_pc_i64 s[30:31]11156  %mul = call i32 @llvm.amdgcn.mul.u24(i32 %x, i32 %y)11157  %mul.zext = zext i32 %mul to i6411158  %add = add i64 %mul.zext, %z11159  ret i64 %add11160}11161 11162declare i64 @llvm.amdgcn.mul.u24.i64(i32, i32)11163declare i32 @llvm.amdgcn.mul.u24(i32, i32)11164 11165;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:11166; GFX6: {{.*}}11167; GFX7: {{.*}}11168; GFX900: {{.*}}11169; GFX90A: {{.*}}11170