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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck -check-prefix=GFX942 %s3 4; Check for correct folding of the constants produced by the5; stepvector into the fadd. The value should not get lost when folding6; through subregister extracts of reg_sequence.7define amdgpu_kernel void @stepper_test_kernel_DType_I6A6AcB6A6AsA6A6A_68a5362b97a102776ef47f0e8e894a38(ptr addrspace(1) readonly captures(none) %.global, ptr addrspace(1) writeonly captures(none) %.global1, i32 %arg2) {8; GFX942-LABEL: stepper_test_kernel_DType_I6A6AcB6A6AsA6A6A_68a5362b97a102776ef47f0e8e894a38:9; GFX942: ; %bb.0: ; %bb10; GFX942-NEXT: s_load_dword s6, s[4:5], 0x1011; GFX942-NEXT: s_mov_b32 s7, 012; GFX942-NEXT: s_waitcnt lgkmcnt(0)13; GFX942-NEXT: s_cmp_eq_u32 s6, 014; GFX942-NEXT: s_cbranch_scc1 .LBB0_315; GFX942-NEXT: ; %bb.1: ; %.lr.ph.preheader16; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x017; GFX942-NEXT: s_mov_b32 s8, 0x4700460018; GFX942-NEXT: s_mov_b32 s9, 0x4500440019; GFX942-NEXT: s_mov_b32 s10, 0x4200400020; GFX942-NEXT: s_mov_b64 s[4:5], 021; GFX942-NEXT: v_mov_b32_e32 v2, 022; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]23; GFX942-NEXT: .LBB0_2: ; %.lr.ph24; GFX942-NEXT: ; =>This Inner Loop Header: Depth=125; GFX942-NEXT: s_waitcnt lgkmcnt(0)26; GFX942-NEXT: global_load_dwordx4 v[4:7], v2, s[2:3]27; GFX942-NEXT: s_add_u32 s4, s4, 828; GFX942-NEXT: s_addc_u32 s5, s5, 029; GFX942-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[0:1]30; GFX942-NEXT: s_waitcnt vmcnt(0)31; GFX942-NEXT: v_pk_add_f16 v7, v7, s832; GFX942-NEXT: v_pk_add_f16 v6, v6, s933; GFX942-NEXT: v_pk_add_f16 v5, v5, s1034; GFX942-NEXT: v_pk_add_f16 v4, v4, 1.0 op_sel:[0,1] op_sel_hi:[1,0]35; GFX942-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1]36; GFX942-NEXT: s_add_u32 s0, s0, 1637; GFX942-NEXT: s_addc_u32 s1, s1, 038; GFX942-NEXT: s_add_u32 s2, s2, 1639; GFX942-NEXT: s_addc_u32 s3, s3, 040; GFX942-NEXT: s_cbranch_vccnz .LBB0_241; GFX942-NEXT: .LBB0_3: ; %._crit_edge42; GFX942-NEXT: s_endpgm43bb:44 %i = tail call <8 x i32> @llvm.stepvector.v8i32()45 %i3 = sitofp <8 x i32> %i to <8 x half>46 %i4 = zext i32 %arg2 to i6447 %.not = icmp eq i32 %arg2, 048 br i1 %.not, label %._crit_edge, label %.lr.ph49 50.lr.ph: ; preds = %.lr.ph, %bb51 %i5 = phi i64 [ %i6, %.lr.ph ], [ 0, %bb ]52 %i6 = add nuw nsw i64 %i5, 853 %i7 = getelementptr inbounds nuw half, ptr addrspace(1) %.global1, i64 %i554 %i8 = load <8 x half>, ptr addrspace(1) %i7, align 255 %i9 = fadd <8 x half> %i8, %i356 %i10 = getelementptr inbounds nuw half, ptr addrspace(1) %.global, i64 %i557 store <8 x half> %i9, ptr addrspace(1) %i10, align 258 %i11 = icmp samesign ult i64 %i6, %i459 br i1 %i11, label %.lr.ph, label %._crit_edge60 61._crit_edge: ; preds = %.lr.ph, %bb62 ret void63}64 65declare <8 x i32> @llvm.stepvector.v8i32() #066 67attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }68