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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -O0 %s -o - | FileCheck %s3 4; The forced spill to preserve the scratch VGPR require the voffset to hold the large offset5; value in the MUBUF instruction being emitted before s_cbranch_scc1 as it clobbers the SCC.6 7define amdgpu_kernel void @test_kernel(i32 %val) #0 {8; CHECK-LABEL: test_kernel:9; CHECK: ; %bb.0:10; CHECK-NEXT: s_mov_b32 s33, 011; CHECK-NEXT: s_mov_b32 s32, 0x18000012; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s1713; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 014; CHECK-NEXT: s_add_u32 s0, s0, s1715; CHECK-NEXT: s_addc_u32 s1, s1, 016; CHECK-NEXT: ; implicit-def: $vgpr40 : SGPR spill to VGPR lane17; CHECK-NEXT: v_writelane_b32 v40, s16, 018; CHECK-NEXT: s_mov_b32 s13, s1519; CHECK-NEXT: s_mov_b32 s12, s1420; CHECK-NEXT: v_readlane_b32 s14, v40, 021; CHECK-NEXT: s_mov_b64 s[16:17], s[8:9]22; CHECK-NEXT: s_load_dword s8, s[16:17], 0x023; CHECK-NEXT: s_waitcnt lgkmcnt(0)24; CHECK-NEXT: v_writelane_b32 v40, s8, 125; CHECK-NEXT: ;;#ASMSTART26; CHECK-NEXT: ; def vgpr1027; CHECK-NEXT: ;;#ASMEND28; CHECK-NEXT: s_add_i32 s8, s33, 0x10010029; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s8 ; 4-byte Folded Spill30; CHECK-NEXT: s_mov_b64 s[18:19], 831; CHECK-NEXT: s_mov_b32 s8, s1632; CHECK-NEXT: s_mov_b32 s9, s1733; CHECK-NEXT: s_mov_b32 s16, s1834; CHECK-NEXT: s_mov_b32 s15, s1935; CHECK-NEXT: s_add_u32 s8, s8, s1636; CHECK-NEXT: s_addc_u32 s15, s9, s1537; CHECK-NEXT: ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr938; CHECK-NEXT: s_mov_b32 s9, s1539; CHECK-NEXT: s_mov_b32 s15, 0x200040; CHECK-NEXT: s_mov_b32 s18, s1541; CHECK-NEXT: s_getpc_b64 s[16:17]42; CHECK-NEXT: s_add_u32 s16, s16, device_func@gotpcrel32@lo+443; CHECK-NEXT: s_addc_u32 s17, s17, device_func@gotpcrel32@hi+1244; CHECK-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x045; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]46; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]47; CHECK-NEXT: s_mov_b32 s15, 2048; CHECK-NEXT: v_lshlrev_b32_e64 v2, s15, v249; CHECK-NEXT: s_mov_b32 s15, 1050; CHECK-NEXT: v_lshlrev_b32_e64 v1, s15, v151; CHECK-NEXT: v_or3_b32 v31, v0, v1, v252; CHECK-NEXT: ; implicit-def: $sgpr1553; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]54; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]55; CHECK-NEXT: v_mov_b32_e32 v0, s1856; CHECK-NEXT: s_waitcnt lgkmcnt(0)57; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]58; CHECK-NEXT: s_add_i32 s4, s33, 0x10010059; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s4 ; 4-byte Folded Reload60; CHECK-NEXT: v_readlane_b32 s4, v40, 161; CHECK-NEXT: s_mov_b32 s5, 062; CHECK-NEXT: s_cmp_eq_u32 s4, s563; CHECK-NEXT: v_mov_b32_e32 v0, 0x400064; CHECK-NEXT: s_waitcnt vmcnt(0)65; CHECK-NEXT: buffer_store_dword v10, v0, s[0:3], s33 offen ; 4-byte Folded Spill66; CHECK-NEXT: s_cbranch_scc1 .LBB0_267; CHECK-NEXT: ; %bb.1: ; %store68; CHECK-NEXT: s_add_i32 s4, s33, 0x10000069; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s4 ; 4-byte Folded Reload70; CHECK-NEXT: ; implicit-def: $sgpr471; CHECK-NEXT: v_mov_b32_e32 v0, s472; CHECK-NEXT: s_waitcnt vmcnt(0)73; CHECK-NEXT: ds_write_b32 v0, v174; CHECK-NEXT: s_endpgm75; CHECK-NEXT: .LBB0_2: ; %end76; CHECK-NEXT: s_endpgm77 %arr = alloca < 1339 x i32>, align 8192, addrspace(5)78 %cmp = icmp ne i32 %val, 079 %vreg = call i32 asm sideeffect "; def vgpr10", "={v10}"()80 call void @device_func(ptr addrspace(5) %arr)81 br i1 %cmp, label %store, label %end82 83store:84 store volatile i32 %vreg, ptr addrspace(3) poison85 ret void86 87end:88 ret void89}90 91declare void @device_func(ptr addrspace(5))92 93attributes #0 = { nounwind "frame-pointer"="all" }94 95