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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 < %s | FileCheck %s3 4define half @known_nnan_extract_vector_elt(float %a, float %b, i32 %idx, half %c) {5; CHECK-LABEL: known_nnan_extract_vector_elt:6; CHECK: ; %bb.0:7; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8; CHECK-NEXT: v_cvt_pkrtz_f16_f32_e32 v0, v0, v19; CHECK-NEXT: v_lshlrev_b32_e32 v1, 4, v210; CHECK-NEXT: v_add_f16_e32 v2, 1.0, v311; CHECK-NEXT: v_lshrrev_b32_e32 v0, v1, v012; CHECK-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v213; CHECK-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo14; CHECK-NEXT: s_setpc_b64 s[30:31]15 %cvt = call nnan <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)16 %extract = extractelement <2 x half> %cvt, i32 %idx17 %canon = call half @llvm.canonicalize.f16(half %extract)18 %nnan.c = fadd nnan nsz half %c, 1.019 %cmp = fcmp olt half %extract, %nnan.c20 %select = select i1 %cmp, half %extract, half %nnan.c21 ret half %select22}23 24; should not emit v_max25define float @fma_not_fmaxnm_maybe_nan(i32 %i1, i32 %i2, i32 %i3) #0 {26; CHECK-LABEL: fma_not_fmaxnm_maybe_nan:27; CHECK: ; %bb.0:28; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)29; CHECK-NEXT: v_cvt_f32_u32_e32 v0, v030; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v131; CHECK-NEXT: v_fmaak_f32 v0, v1, v0, 0xff80000032; CHECK-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0xff800000, v033; CHECK-NEXT: v_cndmask_b32_e32 v0, 0xff800000, v0, vcc_lo34; CHECK-NEXT: s_setpc_b64 s[30:31]35 %f1 = uitofp i32 %i1 to float36 %f2 = uitofp i32 %i2 to float37 %f3 = uitofp i32 %i2 to float38 %fma = tail call float @llvm.fma.f32(float %f2, float %f1, float 0xfff0000000000000)39 %cmp = fcmp ugt float %fma, 0xfff000000000000040 %val = select i1 %cmp, float %fma, float 0xfff000000000000041 ret float %val42}43 44declare float @llvm.fma.f32(float, float, float) nounwind readnone45declare float @llvm.amdgcn.fmad.ftz.f32(float, float, float)46 47declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float)48declare half @llvm.canonicalize.f16(half)49 50attributes #0 = { nounwind "no-signed-zeros-fp-math"="true" "target-features"="+mad-mac-f32-insts" }51