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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s2 3; Make sure that m0 is not reinitialized in the loop.4 5; GCN-LABEL: {{^}}copy_local_to_global_loop_m0_init:6; GCN: s_cbranch_scc1 .LBB0_37 8; Initialize in preheader9; GCN: s_mov_b32 m0, -110 11; GCN: .LBB0_2:12; GCN-NOT: m013; GCN: ds_read_b3214; GCN-NOT: m015; GCN: buffer_store_dword16 17; GCN: s_cbranch_scc0 .LBB0_218 19; GCN: .LBB0_3:20; GCN-NEXT: s_endpgm21define amdgpu_kernel void @copy_local_to_global_loop_m0_init(ptr addrspace(1) noalias nocapture %out, ptr addrspace(3) noalias nocapture readonly %in, i32 %n) #0 {22bb:23 %tmp = icmp sgt i32 %n, 024 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge25 26.lr.ph.preheader: ; preds = %bb27 br label %.lr.ph28 29._crit_edge.loopexit: ; preds = %.lr.ph30 br label %._crit_edge31 32._crit_edge: ; preds = %._crit_edge.loopexit, %bb33 ret void34 35.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader36 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]37 %i.01 = phi i32 [ %tmp4, %.lr.ph ], [ 0, %.lr.ph.preheader ]38 %tmp1 = getelementptr inbounds i32, ptr addrspace(3) %in, i32 %i.0139 %tmp2 = load i32, ptr addrspace(3) %tmp1, align 440 %tmp3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %indvars.iv41 store i32 %tmp2, ptr addrspace(1) %tmp3, align 442 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 143 %tmp4 = add nuw nsw i32 %i.01, 144 %lftr.wideiv = trunc i64 %indvars.iv.next to i3245 %exitcond = icmp eq i32 %lftr.wideiv, %n46 br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph47}48 49attributes #0 = { nounwind }50