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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=SPLIT %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 < %s | FileCheck -check-prefix=SPLIT %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 < %s | FileCheck -check-prefix=SPLIT %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+cumode < %s | FileCheck -check-prefix=ALIGNED-GFX10 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+cumode,+unaligned-access-mode < %s | FileCheck -check-prefix=UNALIGNED-GFX10 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=ALIGNED-GFX11 %s8; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck -check-prefix=ALIGNED-GFX11 %s9; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+cumode -early-live-intervals < %s | FileCheck -check-prefix=ALIGNED-GFX11 %s10; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+cumode,+unaligned-access-mode < %s | FileCheck -check-prefix=UNALIGNED-GFX11 %s11 12define amdgpu_kernel void @test_local_misaligned_v2(ptr addrspace(3) %arg) {13; SPLIT-LABEL: test_local_misaligned_v2:14; SPLIT: ; %bb.0: ; %bb15; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x2416; SPLIT-NEXT: s_waitcnt lgkmcnt(0)17; SPLIT-NEXT: v_lshl_add_u32 v2, v0, 2, s018; SPLIT-NEXT: ds_read2_b32 v[0:1], v2 offset1:119; SPLIT-NEXT: s_waitcnt lgkmcnt(0)20; SPLIT-NEXT: ds_write2_b32 v2, v1, v0 offset1:121; SPLIT-NEXT: s_endpgm22;23; ALIGNED-GFX10-LABEL: test_local_misaligned_v2:24; ALIGNED-GFX10: ; %bb.0: ; %bb25; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x2426; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)27; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v2, v0, 2, s028; ALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v2 offset1:129; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)30; ALIGNED-GFX10-NEXT: ds_write2_b32 v2, v1, v0 offset1:131; ALIGNED-GFX10-NEXT: s_endpgm32;33; UNALIGNED-GFX10-LABEL: test_local_misaligned_v2:34; UNALIGNED-GFX10: ; %bb.0: ; %bb35; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x2436; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)37; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v2, v0, 2, s038; UNALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v2 offset1:139; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)40; UNALIGNED-GFX10-NEXT: ds_write2_b32 v2, v1, v0 offset1:141; UNALIGNED-GFX10-NEXT: s_endpgm42;43; ALIGNED-GFX11-LABEL: test_local_misaligned_v2:44; ALIGNED-GFX11: ; %bb.0: ; %bb45; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2446; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v047; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)48; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)49; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v2, v0, 2, s050; ALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:151; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)52; ALIGNED-GFX11-NEXT: ds_store_2addr_b32 v2, v1, v0 offset1:153; ALIGNED-GFX11-NEXT: s_endpgm54;55; UNALIGNED-GFX11-LABEL: test_local_misaligned_v2:56; UNALIGNED-GFX11: ; %bb.0: ; %bb57; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2458; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v059; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)60; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)61; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v2, v0, 2, s062; UNALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:163; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)64; UNALIGNED-GFX11-NEXT: ds_store_2addr_b32 v2, v1, v0 offset1:165; UNALIGNED-GFX11-NEXT: s_endpgm66bb:67 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()68 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid69 %load = load <2 x i32>, ptr addrspace(3) %gep, align 470 %v1 = extractelement <2 x i32> %load, i32 071 %v2 = extractelement <2 x i32> %load, i32 172 %v3 = insertelement <2 x i32> poison, i32 %v2, i32 073 %v4 = insertelement <2 x i32> %v3, i32 %v1, i32 174 store <2 x i32> %v4, ptr addrspace(3) %gep, align 475 ret void76}77 78define amdgpu_kernel void @test_local_misaligned_v4(ptr addrspace(3) %arg) {79; SPLIT-LABEL: test_local_misaligned_v4:80; SPLIT: ; %bb.0: ; %bb81; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x2482; SPLIT-NEXT: s_waitcnt lgkmcnt(0)83; SPLIT-NEXT: v_lshl_add_u32 v4, v0, 2, s084; SPLIT-NEXT: ds_read2_b32 v[0:1], v4 offset0:2 offset1:385; SPLIT-NEXT: ds_read2_b32 v[2:3], v4 offset1:186; SPLIT-NEXT: s_waitcnt lgkmcnt(1)87; SPLIT-NEXT: ds_write2_b32 v4, v1, v0 offset1:188; SPLIT-NEXT: s_waitcnt lgkmcnt(1)89; SPLIT-NEXT: ds_write2_b32 v4, v3, v2 offset0:2 offset1:390; SPLIT-NEXT: s_endpgm91;92; ALIGNED-GFX10-LABEL: test_local_misaligned_v4:93; ALIGNED-GFX10: ; %bb.0: ; %bb94; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x2495; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)96; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v4, v0, 2, s097; ALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v4 offset1:198; ALIGNED-GFX10-NEXT: ds_read2_b32 v[2:3], v4 offset0:2 offset1:399; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(1)100; ALIGNED-GFX10-NEXT: ds_write2_b32 v4, v1, v0 offset0:2 offset1:3101; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(1)102; ALIGNED-GFX10-NEXT: ds_write2_b32 v4, v3, v2 offset1:1103; ALIGNED-GFX10-NEXT: s_endpgm104;105; UNALIGNED-GFX10-LABEL: test_local_misaligned_v4:106; UNALIGNED-GFX10: ; %bb.0: ; %bb107; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24108; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)109; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v4, v0, 2, s0110; UNALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v4 offset0:2 offset1:3111; UNALIGNED-GFX10-NEXT: ds_read2_b32 v[2:3], v4 offset1:1112; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(1)113; UNALIGNED-GFX10-NEXT: ds_write2_b32 v4, v1, v0 offset1:1114; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(1)115; UNALIGNED-GFX10-NEXT: ds_write2_b32 v4, v3, v2 offset0:2 offset1:3116; UNALIGNED-GFX10-NEXT: s_endpgm117;118; ALIGNED-GFX11-LABEL: test_local_misaligned_v4:119; ALIGNED-GFX11: ; %bb.0: ; %bb120; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24121; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0122; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)123; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)124; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v4, v0, 2, s0125; ALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v4 offset1:1126; ALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[2:3], v4 offset0:2 offset1:3127; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(1)128; ALIGNED-GFX11-NEXT: ds_store_2addr_b32 v4, v1, v0 offset0:2 offset1:3129; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(1)130; ALIGNED-GFX11-NEXT: ds_store_2addr_b32 v4, v3, v2 offset1:1131; ALIGNED-GFX11-NEXT: s_endpgm132;133; UNALIGNED-GFX11-LABEL: test_local_misaligned_v4:134; UNALIGNED-GFX11: ; %bb.0: ; %bb135; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24136; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0137; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)138; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)139; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v4, v0, 2, s0140; UNALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v4 offset0:2 offset1:3141; UNALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[2:3], v4 offset1:1142; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(1)143; UNALIGNED-GFX11-NEXT: ds_store_2addr_b32 v4, v1, v0 offset1:1144; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(1)145; UNALIGNED-GFX11-NEXT: ds_store_2addr_b32 v4, v3, v2 offset0:2 offset1:3146; UNALIGNED-GFX11-NEXT: s_endpgm147bb:148 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()149 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid150 %load = load <4 x i32>, ptr addrspace(3) %gep, align 4151 %v1 = extractelement <4 x i32> %load, i32 0152 %v2 = extractelement <4 x i32> %load, i32 1153 %v3 = extractelement <4 x i32> %load, i32 2154 %v4 = extractelement <4 x i32> %load, i32 3155 %v5 = insertelement <4 x i32> poison, i32 %v4, i32 0156 %v6 = insertelement <4 x i32> %v5, i32 %v3, i32 1157 %v7 = insertelement <4 x i32> %v6, i32 %v2, i32 2158 %v8 = insertelement <4 x i32> %v7, i32 %v1, i32 3159 store <4 x i32> %v8, ptr addrspace(3) %gep, align 4160 ret void161}162 163define amdgpu_kernel void @test_local_misaligned_v3(ptr addrspace(3) %arg) {164; SPLIT-LABEL: test_local_misaligned_v3:165; SPLIT: ; %bb.0: ; %bb166; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x24167; SPLIT-NEXT: s_waitcnt lgkmcnt(0)168; SPLIT-NEXT: v_lshl_add_u32 v2, v0, 2, s0169; SPLIT-NEXT: ds_read2_b32 v[0:1], v2 offset1:1170; SPLIT-NEXT: ds_read_b32 v3, v2 offset:8171; SPLIT-NEXT: s_waitcnt lgkmcnt(0)172; SPLIT-NEXT: ds_write2_b32 v2, v3, v0 offset1:1173; SPLIT-NEXT: ds_write_b32 v2, v1 offset:8174; SPLIT-NEXT: s_endpgm175;176; ALIGNED-GFX10-LABEL: test_local_misaligned_v3:177; ALIGNED-GFX10: ; %bb.0: ; %bb178; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24179; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)180; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v2, v0, 2, s0181; ALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v2 offset1:1182; ALIGNED-GFX10-NEXT: ds_read_b32 v3, v2 offset:8183; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)184; ALIGNED-GFX10-NEXT: ds_write2_b32 v2, v3, v0 offset1:1185; ALIGNED-GFX10-NEXT: ds_write_b32 v2, v1 offset:8186; ALIGNED-GFX10-NEXT: s_endpgm187;188; UNALIGNED-GFX10-LABEL: test_local_misaligned_v3:189; UNALIGNED-GFX10: ; %bb.0: ; %bb190; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24191; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)192; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v2, v0, 2, s0193; UNALIGNED-GFX10-NEXT: ds_read2_b32 v[0:1], v2 offset1:1194; UNALIGNED-GFX10-NEXT: ds_read_b32 v3, v2 offset:8195; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)196; UNALIGNED-GFX10-NEXT: ds_write2_b32 v2, v3, v0 offset1:1197; UNALIGNED-GFX10-NEXT: ds_write_b32 v2, v1 offset:8198; UNALIGNED-GFX10-NEXT: s_endpgm199;200; ALIGNED-GFX11-LABEL: test_local_misaligned_v3:201; ALIGNED-GFX11: ; %bb.0: ; %bb202; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24203; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0204; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)205; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)206; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v2, v0, 2, s0207; ALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:1208; ALIGNED-GFX11-NEXT: ds_load_b32 v3, v2 offset:8209; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)210; ALIGNED-GFX11-NEXT: ds_store_2addr_b32 v2, v3, v0 offset1:1211; ALIGNED-GFX11-NEXT: ds_store_b32 v2, v1 offset:8212; ALIGNED-GFX11-NEXT: s_endpgm213;214; UNALIGNED-GFX11-LABEL: test_local_misaligned_v3:215; UNALIGNED-GFX11: ; %bb.0: ; %bb216; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24217; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0218; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)219; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)220; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v2, v0, 2, s0221; UNALIGNED-GFX11-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:1222; UNALIGNED-GFX11-NEXT: ds_load_b32 v3, v2 offset:8223; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)224; UNALIGNED-GFX11-NEXT: ds_store_2addr_b32 v2, v3, v0 offset1:1225; UNALIGNED-GFX11-NEXT: ds_store_b32 v2, v1 offset:8226; UNALIGNED-GFX11-NEXT: s_endpgm227bb:228 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()229 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid230 %load = load <3 x i32>, ptr addrspace(3) %gep, align 4231 %v1 = extractelement <3 x i32> %load, i32 0232 %v2 = extractelement <3 x i32> %load, i32 1233 %v3 = extractelement <3 x i32> %load, i32 2234 %v5 = insertelement <3 x i32> poison, i32 %v3, i32 0235 %v6 = insertelement <3 x i32> %v5, i32 %v1, i32 1236 %v7 = insertelement <3 x i32> %v6, i32 %v2, i32 2237 store <3 x i32> %v7, ptr addrspace(3) %gep, align 4238 ret void239}240 241define amdgpu_kernel void @test_flat_misaligned_v2(ptr %arg) {242; SPLIT-LABEL: test_flat_misaligned_v2:243; SPLIT: ; %bb.0: ; %bb244; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24245; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0246; SPLIT-NEXT: s_waitcnt lgkmcnt(0)247; SPLIT-NEXT: v_add_co_u32 v0, s0, s0, v0248; SPLIT-NEXT: v_add_co_ci_u32_e64 v1, s0, s1, 0, s0249; SPLIT-NEXT: v_add_co_u32 v2, vcc_lo, v0, 4250; SPLIT-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo251; SPLIT-NEXT: s_clause 0x1252; SPLIT-NEXT: flat_load_dword v4, v[2:3]253; SPLIT-NEXT: flat_load_dword v5, v[0:1]254; SPLIT-NEXT: s_waitcnt vmcnt(1) lgkmcnt(1)255; SPLIT-NEXT: flat_store_dword v[0:1], v4256; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(1)257; SPLIT-NEXT: flat_store_dword v[2:3], v5258; SPLIT-NEXT: s_endpgm259;260; ALIGNED-GFX10-LABEL: test_flat_misaligned_v2:261; ALIGNED-GFX10: ; %bb.0: ; %bb262; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24263; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0264; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)265; ALIGNED-GFX10-NEXT: v_add_co_u32 v3, s0, s0, v0266; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v4, s0, s1, 0, s0267; ALIGNED-GFX10-NEXT: flat_load_dwordx2 v[0:1], v[3:4]268; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)269; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0270; ALIGNED-GFX10-NEXT: flat_store_dwordx2 v[3:4], v[1:2]271; ALIGNED-GFX10-NEXT: s_endpgm272;273; UNALIGNED-GFX10-LABEL: test_flat_misaligned_v2:274; UNALIGNED-GFX10: ; %bb.0: ; %bb275; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24276; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0277; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)278; UNALIGNED-GFX10-NEXT: v_add_co_u32 v3, s0, s0, v0279; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v4, s0, s1, 0, s0280; UNALIGNED-GFX10-NEXT: flat_load_dwordx2 v[0:1], v[3:4]281; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)282; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0283; UNALIGNED-GFX10-NEXT: flat_store_dwordx2 v[3:4], v[1:2]284; UNALIGNED-GFX10-NEXT: s_endpgm285;286; ALIGNED-GFX11-LABEL: test_flat_misaligned_v2:287; ALIGNED-GFX11: ; %bb.0: ; %bb288; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24289; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0290; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)291; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0292; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)293; ALIGNED-GFX11-NEXT: v_add_co_u32 v3, s0, s0, v0294; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)295; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v4, null, s1, 0, s0296; ALIGNED-GFX11-NEXT: flat_load_b64 v[0:1], v[3:4]297; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)298; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0299; ALIGNED-GFX11-NEXT: flat_store_b64 v[3:4], v[1:2]300; ALIGNED-GFX11-NEXT: s_endpgm301;302; UNALIGNED-GFX11-LABEL: test_flat_misaligned_v2:303; UNALIGNED-GFX11: ; %bb.0: ; %bb304; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24305; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0306; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)307; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0308; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)309; UNALIGNED-GFX11-NEXT: v_add_co_u32 v3, s0, s0, v0310; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)311; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v4, null, s1, 0, s0312; UNALIGNED-GFX11-NEXT: flat_load_b64 v[0:1], v[3:4]313; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)314; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0315; UNALIGNED-GFX11-NEXT: flat_store_b64 v[3:4], v[1:2]316; UNALIGNED-GFX11-NEXT: s_endpgm317bb:318 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()319 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid320 %load = load <2 x i32>, ptr %gep, align 4321 %v1 = extractelement <2 x i32> %load, i32 0322 %v2 = extractelement <2 x i32> %load, i32 1323 %v3 = insertelement <2 x i32> poison, i32 %v2, i32 0324 %v4 = insertelement <2 x i32> %v3, i32 %v1, i32 1325 store <2 x i32> %v4, ptr %gep, align 4326 ret void327}328 329define amdgpu_kernel void @test_flat_misaligned_v4(ptr %arg) {330; SPLIT-LABEL: test_flat_misaligned_v4:331; SPLIT: ; %bb.0: ; %bb332; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24333; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0334; SPLIT-NEXT: s_waitcnt lgkmcnt(0)335; SPLIT-NEXT: v_add_co_u32 v0, s0, s0, v0336; SPLIT-NEXT: v_add_co_ci_u32_e64 v1, s0, s1, 0, s0337; SPLIT-NEXT: v_add_co_u32 v2, vcc_lo, v0, 12338; SPLIT-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo339; SPLIT-NEXT: v_add_co_u32 v4, vcc_lo, v0, 4340; SPLIT-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo341; SPLIT-NEXT: v_add_co_u32 v6, vcc_lo, v0, 8342; SPLIT-NEXT: v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo343; SPLIT-NEXT: s_clause 0x3344; SPLIT-NEXT: flat_load_dword v8, v[2:3]345; SPLIT-NEXT: flat_load_dword v9, v[4:5]346; SPLIT-NEXT: flat_load_dword v10, v[0:1]347; SPLIT-NEXT: flat_load_dword v11, v[6:7]348; SPLIT-NEXT: s_waitcnt vmcnt(2) lgkmcnt(2)349; SPLIT-NEXT: flat_store_dword v[6:7], v9350; SPLIT-NEXT: s_waitcnt vmcnt(1) lgkmcnt(2)351; SPLIT-NEXT: flat_store_dword v[2:3], v10352; SPLIT-NEXT: flat_store_dword v[0:1], v8353; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(3)354; SPLIT-NEXT: flat_store_dword v[4:5], v11355; SPLIT-NEXT: s_endpgm356;357; ALIGNED-GFX10-LABEL: test_flat_misaligned_v4:358; ALIGNED-GFX10: ; %bb.0: ; %bb359; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24360; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0361; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)362; ALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0363; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0364; ALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]365; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)366; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2367; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1368; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0369; ALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]370; ALIGNED-GFX10-NEXT: s_endpgm371;372; UNALIGNED-GFX10-LABEL: test_flat_misaligned_v4:373; UNALIGNED-GFX10: ; %bb.0: ; %bb374; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24375; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0376; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)377; UNALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0378; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0379; UNALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]380; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)381; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2382; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1383; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0384; UNALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]385; UNALIGNED-GFX10-NEXT: s_endpgm386;387; ALIGNED-GFX11-LABEL: test_flat_misaligned_v4:388; ALIGNED-GFX11: ; %bb.0: ; %bb389; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24390; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0391; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)392; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0393; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)394; ALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v0395; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)396; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s0397; ALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]398; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)399; ALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1400; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v0401; ALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]402; ALIGNED-GFX11-NEXT: s_endpgm403;404; UNALIGNED-GFX11-LABEL: test_flat_misaligned_v4:405; UNALIGNED-GFX11: ; %bb.0: ; %bb406; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24407; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0408; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)409; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0410; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)411; UNALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v0412; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)413; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s0414; UNALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]415; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)416; UNALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1417; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v0418; UNALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]419; UNALIGNED-GFX11-NEXT: s_endpgm420bb:421 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()422 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid423 %load = load <4 x i32>, ptr %gep, align 4424 %v1 = extractelement <4 x i32> %load, i32 0425 %v2 = extractelement <4 x i32> %load, i32 1426 %v3 = extractelement <4 x i32> %load, i32 2427 %v4 = extractelement <4 x i32> %load, i32 3428 %v5 = insertelement <4 x i32> poison, i32 %v4, i32 0429 %v6 = insertelement <4 x i32> %v5, i32 %v3, i32 1430 %v7 = insertelement <4 x i32> %v6, i32 %v2, i32 2431 %v8 = insertelement <4 x i32> %v7, i32 %v1, i32 3432 store <4 x i32> %v8, ptr %gep, align 4433 ret void434}435 436define amdgpu_kernel void @test_flat_misaligned_v3(ptr %arg) {437; SPLIT-LABEL: test_flat_misaligned_v3:438; SPLIT: ; %bb.0: ; %bb439; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24440; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0441; SPLIT-NEXT: s_waitcnt lgkmcnt(0)442; SPLIT-NEXT: v_add_co_u32 v0, s0, s0, v0443; SPLIT-NEXT: v_add_co_ci_u32_e64 v1, s0, s1, 0, s0444; SPLIT-NEXT: v_add_co_u32 v2, vcc_lo, v0, 4445; SPLIT-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo446; SPLIT-NEXT: v_add_co_u32 v4, vcc_lo, v0, 8447; SPLIT-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo448; SPLIT-NEXT: s_clause 0x2449; SPLIT-NEXT: flat_load_dword v6, v[2:3]450; SPLIT-NEXT: flat_load_dword v7, v[4:5]451; SPLIT-NEXT: flat_load_dword v8, v[0:1]452; SPLIT-NEXT: s_waitcnt vmcnt(2) lgkmcnt(2)453; SPLIT-NEXT: flat_store_dword v[4:5], v6454; SPLIT-NEXT: s_waitcnt vmcnt(1) lgkmcnt(2)455; SPLIT-NEXT: flat_store_dword v[0:1], v7456; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(2)457; SPLIT-NEXT: flat_store_dword v[2:3], v8458; SPLIT-NEXT: s_endpgm459;460; ALIGNED-GFX10-LABEL: test_flat_misaligned_v3:461; ALIGNED-GFX10: ; %bb.0: ; %bb462; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24463; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0464; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)465; ALIGNED-GFX10-NEXT: v_add_co_u32 v5, s0, s0, v0466; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v6, s0, s1, 0, s0467; ALIGNED-GFX10-NEXT: flat_load_dwordx3 v[0:2], v[5:6]468; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)469; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v3, v0470; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v1471; ALIGNED-GFX10-NEXT: flat_store_dwordx3 v[5:6], v[2:4]472; ALIGNED-GFX10-NEXT: s_endpgm473;474; UNALIGNED-GFX10-LABEL: test_flat_misaligned_v3:475; UNALIGNED-GFX10: ; %bb.0: ; %bb476; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24477; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0478; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)479; UNALIGNED-GFX10-NEXT: v_add_co_u32 v5, s0, s0, v0480; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v6, s0, s1, 0, s0481; UNALIGNED-GFX10-NEXT: flat_load_dwordx3 v[0:2], v[5:6]482; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)483; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v3, v0484; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v1485; UNALIGNED-GFX10-NEXT: flat_store_dwordx3 v[5:6], v[2:4]486; UNALIGNED-GFX10-NEXT: s_endpgm487;488; ALIGNED-GFX11-LABEL: test_flat_misaligned_v3:489; ALIGNED-GFX11: ; %bb.0: ; %bb490; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24491; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0492; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)493; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0494; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)495; ALIGNED-GFX11-NEXT: v_add_co_u32 v5, s0, s0, v0496; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)497; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s1, 0, s0498; ALIGNED-GFX11-NEXT: flat_load_b96 v[0:2], v[5:6]499; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)500; ALIGNED-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v4, v1501; ALIGNED-GFX11-NEXT: flat_store_b96 v[5:6], v[2:4]502; ALIGNED-GFX11-NEXT: s_endpgm503;504; UNALIGNED-GFX11-LABEL: test_flat_misaligned_v3:505; UNALIGNED-GFX11: ; %bb.0: ; %bb506; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24507; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0508; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)509; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0510; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)511; UNALIGNED-GFX11-NEXT: v_add_co_u32 v5, s0, s0, v0512; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)513; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s1, 0, s0514; UNALIGNED-GFX11-NEXT: flat_load_b96 v[0:2], v[5:6]515; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)516; UNALIGNED-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v4, v1517; UNALIGNED-GFX11-NEXT: flat_store_b96 v[5:6], v[2:4]518; UNALIGNED-GFX11-NEXT: s_endpgm519bb:520 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()521 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid522 %load = load <3 x i32>, ptr %gep, align 4523 %v1 = extractelement <3 x i32> %load, i32 0524 %v2 = extractelement <3 x i32> %load, i32 1525 %v3 = extractelement <3 x i32> %load, i32 2526 %v5 = insertelement <3 x i32> poison, i32 %v3, i32 0527 %v6 = insertelement <3 x i32> %v5, i32 %v1, i32 1528 %v7 = insertelement <3 x i32> %v6, i32 %v2, i32 2529 store <3 x i32> %v7, ptr %gep, align 4530 ret void531}532 533define amdgpu_kernel void @test_local_aligned_v2(ptr addrspace(3) %arg) {534; SPLIT-LABEL: test_local_aligned_v2:535; SPLIT: ; %bb.0: ; %bb536; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x24537; SPLIT-NEXT: s_waitcnt lgkmcnt(0)538; SPLIT-NEXT: v_lshl_add_u32 v3, v0, 2, s0539; SPLIT-NEXT: ds_read_b64 v[0:1], v3540; SPLIT-NEXT: s_waitcnt lgkmcnt(0)541; SPLIT-NEXT: v_mov_b32_e32 v2, v0542; SPLIT-NEXT: ds_write_b64 v3, v[1:2]543; SPLIT-NEXT: s_endpgm544;545; ALIGNED-GFX10-LABEL: test_local_aligned_v2:546; ALIGNED-GFX10: ; %bb.0: ; %bb547; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24548; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)549; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v3, v0, 2, s0550; ALIGNED-GFX10-NEXT: ds_read_b64 v[0:1], v3551; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)552; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0553; ALIGNED-GFX10-NEXT: ds_write_b64 v3, v[1:2]554; ALIGNED-GFX10-NEXT: s_endpgm555;556; UNALIGNED-GFX10-LABEL: test_local_aligned_v2:557; UNALIGNED-GFX10: ; %bb.0: ; %bb558; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24559; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)560; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v3, v0, 2, s0561; UNALIGNED-GFX10-NEXT: ds_read_b64 v[0:1], v3562; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)563; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0564; UNALIGNED-GFX10-NEXT: ds_write_b64 v3, v[1:2]565; UNALIGNED-GFX10-NEXT: s_endpgm566;567; ALIGNED-GFX11-LABEL: test_local_aligned_v2:568; ALIGNED-GFX11: ; %bb.0: ; %bb569; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24570; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0571; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)572; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)573; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v3, v0, 2, s0574; ALIGNED-GFX11-NEXT: ds_load_b64 v[0:1], v3575; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)576; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0577; ALIGNED-GFX11-NEXT: ds_store_b64 v3, v[1:2]578; ALIGNED-GFX11-NEXT: s_endpgm579;580; UNALIGNED-GFX11-LABEL: test_local_aligned_v2:581; UNALIGNED-GFX11: ; %bb.0: ; %bb582; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24583; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0584; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)585; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)586; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v3, v0, 2, s0587; UNALIGNED-GFX11-NEXT: ds_load_b64 v[0:1], v3588; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)589; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0590; UNALIGNED-GFX11-NEXT: ds_store_b64 v3, v[1:2]591; UNALIGNED-GFX11-NEXT: s_endpgm592bb:593 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()594 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid595 %load = load <2 x i32>, ptr addrspace(3) %gep, align 8596 %v1 = extractelement <2 x i32> %load, i32 0597 %v2 = extractelement <2 x i32> %load, i32 1598 %v3 = insertelement <2 x i32> poison, i32 %v2, i32 0599 %v4 = insertelement <2 x i32> %v3, i32 %v1, i32 1600 store <2 x i32> %v4, ptr addrspace(3) %gep, align 8601 ret void602}603 604define amdgpu_kernel void @test_local_aligned_v3(ptr addrspace(3) %arg) {605; SPLIT-LABEL: test_local_aligned_v3:606; SPLIT: ; %bb.0: ; %bb607; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x24608; SPLIT-NEXT: s_waitcnt lgkmcnt(0)609; SPLIT-NEXT: v_lshl_add_u32 v5, v0, 2, s0610; SPLIT-NEXT: ds_read_b96 v[0:2], v5611; SPLIT-NEXT: s_waitcnt lgkmcnt(0)612; SPLIT-NEXT: v_mov_b32_e32 v3, v0613; SPLIT-NEXT: v_mov_b32_e32 v4, v1614; SPLIT-NEXT: ds_write_b96 v5, v[2:4]615; SPLIT-NEXT: s_endpgm616;617; ALIGNED-GFX10-LABEL: test_local_aligned_v3:618; ALIGNED-GFX10: ; %bb.0: ; %bb619; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24620; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)621; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v5, v0, 2, s0622; ALIGNED-GFX10-NEXT: ds_read_b96 v[0:2], v5623; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)624; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v3, v0625; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v1626; ALIGNED-GFX10-NEXT: ds_write_b96 v5, v[2:4]627; ALIGNED-GFX10-NEXT: s_endpgm628;629; UNALIGNED-GFX10-LABEL: test_local_aligned_v3:630; UNALIGNED-GFX10: ; %bb.0: ; %bb631; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24632; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)633; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v5, v0, 2, s0634; UNALIGNED-GFX10-NEXT: ds_read_b96 v[0:2], v5635; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)636; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v3, v0637; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v1638; UNALIGNED-GFX10-NEXT: ds_write_b96 v5, v[2:4]639; UNALIGNED-GFX10-NEXT: s_endpgm640;641; ALIGNED-GFX11-LABEL: test_local_aligned_v3:642; ALIGNED-GFX11: ; %bb.0: ; %bb643; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24644; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0645; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)646; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)647; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v5, v0, 2, s0648; ALIGNED-GFX11-NEXT: ds_load_b96 v[0:2], v5649; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)650; ALIGNED-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v4, v1651; ALIGNED-GFX11-NEXT: ds_store_b96 v5, v[2:4]652; ALIGNED-GFX11-NEXT: s_endpgm653;654; UNALIGNED-GFX11-LABEL: test_local_aligned_v3:655; UNALIGNED-GFX11: ; %bb.0: ; %bb656; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24657; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0658; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)659; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)660; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v5, v0, 2, s0661; UNALIGNED-GFX11-NEXT: ds_load_b96 v[0:2], v5662; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)663; UNALIGNED-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v4, v1664; UNALIGNED-GFX11-NEXT: ds_store_b96 v5, v[2:4]665; UNALIGNED-GFX11-NEXT: s_endpgm666bb:667 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()668 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid669 %load = load <3 x i32>, ptr addrspace(3) %gep, align 16670 %v1 = extractelement <3 x i32> %load, i32 0671 %v2 = extractelement <3 x i32> %load, i32 1672 %v3 = extractelement <3 x i32> %load, i32 2673 %v5 = insertelement <3 x i32> poison, i32 %v3, i32 0674 %v6 = insertelement <3 x i32> %v5, i32 %v1, i32 1675 %v7 = insertelement <3 x i32> %v6, i32 %v2, i32 2676 store <3 x i32> %v7, ptr addrspace(3) %gep, align 16677 ret void678}679 680define amdgpu_kernel void @test_flat_aligned_v2(ptr %arg) {681; SPLIT-LABEL: test_flat_aligned_v2:682; SPLIT: ; %bb.0: ; %bb683; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24684; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0685; SPLIT-NEXT: s_waitcnt lgkmcnt(0)686; SPLIT-NEXT: v_add_co_u32 v3, s0, s0, v0687; SPLIT-NEXT: v_add_co_ci_u32_e64 v4, s0, s1, 0, s0688; SPLIT-NEXT: flat_load_dwordx2 v[0:1], v[3:4]689; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)690; SPLIT-NEXT: v_mov_b32_e32 v2, v0691; SPLIT-NEXT: flat_store_dwordx2 v[3:4], v[1:2]692; SPLIT-NEXT: s_endpgm693;694; ALIGNED-GFX10-LABEL: test_flat_aligned_v2:695; ALIGNED-GFX10: ; %bb.0: ; %bb696; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24697; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0698; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)699; ALIGNED-GFX10-NEXT: v_add_co_u32 v3, s0, s0, v0700; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v4, s0, s1, 0, s0701; ALIGNED-GFX10-NEXT: flat_load_dwordx2 v[0:1], v[3:4]702; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)703; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0704; ALIGNED-GFX10-NEXT: flat_store_dwordx2 v[3:4], v[1:2]705; ALIGNED-GFX10-NEXT: s_endpgm706;707; UNALIGNED-GFX10-LABEL: test_flat_aligned_v2:708; UNALIGNED-GFX10: ; %bb.0: ; %bb709; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24710; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0711; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)712; UNALIGNED-GFX10-NEXT: v_add_co_u32 v3, s0, s0, v0713; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v4, s0, s1, 0, s0714; UNALIGNED-GFX10-NEXT: flat_load_dwordx2 v[0:1], v[3:4]715; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)716; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0717; UNALIGNED-GFX10-NEXT: flat_store_dwordx2 v[3:4], v[1:2]718; UNALIGNED-GFX10-NEXT: s_endpgm719;720; ALIGNED-GFX11-LABEL: test_flat_aligned_v2:721; ALIGNED-GFX11: ; %bb.0: ; %bb722; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24723; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0724; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)725; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0726; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)727; ALIGNED-GFX11-NEXT: v_add_co_u32 v3, s0, s0, v0728; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)729; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v4, null, s1, 0, s0730; ALIGNED-GFX11-NEXT: flat_load_b64 v[0:1], v[3:4]731; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)732; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0733; ALIGNED-GFX11-NEXT: flat_store_b64 v[3:4], v[1:2]734; ALIGNED-GFX11-NEXT: s_endpgm735;736; UNALIGNED-GFX11-LABEL: test_flat_aligned_v2:737; UNALIGNED-GFX11: ; %bb.0: ; %bb738; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24739; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0740; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)741; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0742; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)743; UNALIGNED-GFX11-NEXT: v_add_co_u32 v3, s0, s0, v0744; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)745; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v4, null, s1, 0, s0746; UNALIGNED-GFX11-NEXT: flat_load_b64 v[0:1], v[3:4]747; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)748; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0749; UNALIGNED-GFX11-NEXT: flat_store_b64 v[3:4], v[1:2]750; UNALIGNED-GFX11-NEXT: s_endpgm751bb:752 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()753 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid754 %load = load <2 x i32>, ptr %gep, align 8755 %v1 = extractelement <2 x i32> %load, i32 0756 %v2 = extractelement <2 x i32> %load, i32 1757 %v3 = insertelement <2 x i32> poison, i32 %v2, i32 0758 %v4 = insertelement <2 x i32> %v3, i32 %v1, i32 1759 store <2 x i32> %v4, ptr %gep, align 8760 ret void761}762 763define amdgpu_kernel void @test_flat_aligned_v4(ptr %arg) {764; SPLIT-LABEL: test_flat_aligned_v4:765; SPLIT: ; %bb.0: ; %bb766; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24767; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0768; SPLIT-NEXT: s_waitcnt lgkmcnt(0)769; SPLIT-NEXT: v_add_co_u32 v7, s0, s0, v0770; SPLIT-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0771; SPLIT-NEXT: flat_load_dwordx4 v[0:3], v[7:8]772; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)773; SPLIT-NEXT: v_mov_b32_e32 v4, v2774; SPLIT-NEXT: v_mov_b32_e32 v5, v1775; SPLIT-NEXT: v_mov_b32_e32 v6, v0776; SPLIT-NEXT: flat_store_dwordx4 v[7:8], v[3:6]777; SPLIT-NEXT: s_endpgm778;779; ALIGNED-GFX10-LABEL: test_flat_aligned_v4:780; ALIGNED-GFX10: ; %bb.0: ; %bb781; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24782; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0783; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)784; ALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0785; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0786; ALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]787; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)788; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2789; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1790; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0791; ALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]792; ALIGNED-GFX10-NEXT: s_endpgm793;794; UNALIGNED-GFX10-LABEL: test_flat_aligned_v4:795; UNALIGNED-GFX10: ; %bb.0: ; %bb796; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24797; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0798; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)799; UNALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0800; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0801; UNALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]802; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)803; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2804; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1805; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0806; UNALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]807; UNALIGNED-GFX10-NEXT: s_endpgm808;809; ALIGNED-GFX11-LABEL: test_flat_aligned_v4:810; ALIGNED-GFX11: ; %bb.0: ; %bb811; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24812; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0813; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)814; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0815; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)816; ALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v0817; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)818; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s0819; ALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]820; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)821; ALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1822; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v0823; ALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]824; ALIGNED-GFX11-NEXT: s_endpgm825;826; UNALIGNED-GFX11-LABEL: test_flat_aligned_v4:827; UNALIGNED-GFX11: ; %bb.0: ; %bb828; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24829; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0830; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)831; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0832; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)833; UNALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v0834; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)835; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s0836; UNALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]837; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)838; UNALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1839; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v0840; UNALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]841; UNALIGNED-GFX11-NEXT: s_endpgm842bb:843 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()844 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid845 %load = load <4 x i32>, ptr %gep, align 16846 %v1 = extractelement <4 x i32> %load, i32 0847 %v2 = extractelement <4 x i32> %load, i32 1848 %v3 = extractelement <4 x i32> %load, i32 2849 %v4 = extractelement <4 x i32> %load, i32 3850 %v5 = insertelement <4 x i32> poison, i32 %v4, i32 0851 %v6 = insertelement <4 x i32> %v5, i32 %v3, i32 1852 %v7 = insertelement <4 x i32> %v6, i32 %v2, i32 2853 %v8 = insertelement <4 x i32> %v7, i32 %v1, i32 3854 store <4 x i32> %v8, ptr %gep, align 16855 ret void856}857 858define amdgpu_kernel void @test_local_v4_aligned8(ptr addrspace(3) %arg) {859; SPLIT-LABEL: test_local_v4_aligned8:860; SPLIT: ; %bb.0: ; %bb861; SPLIT-NEXT: s_load_dword s0, s[4:5], 0x24862; SPLIT-NEXT: s_waitcnt lgkmcnt(0)863; SPLIT-NEXT: v_lshl_add_u32 v6, v0, 2, s0864; SPLIT-NEXT: ds_read2_b64 v[1:4], v6 offset1:1865; SPLIT-NEXT: s_waitcnt lgkmcnt(0)866; SPLIT-NEXT: v_mov_b32_e32 v0, v2867; SPLIT-NEXT: v_mov_b32_e32 v5, v3868; SPLIT-NEXT: ds_write2_b64 v6, v[4:5], v[0:1] offset1:1869; SPLIT-NEXT: s_endpgm870;871; ALIGNED-GFX10-LABEL: test_local_v4_aligned8:872; ALIGNED-GFX10: ; %bb.0: ; %bb873; ALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24874; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)875; ALIGNED-GFX10-NEXT: v_lshl_add_u32 v5, v0, 2, s0876; ALIGNED-GFX10-NEXT: ds_read2_b64 v[0:3], v5 offset1:1877; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)878; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2879; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0880; ALIGNED-GFX10-NEXT: ds_write2_b64 v5, v[3:4], v[1:2] offset1:1881; ALIGNED-GFX10-NEXT: s_endpgm882;883; UNALIGNED-GFX10-LABEL: test_local_v4_aligned8:884; UNALIGNED-GFX10: ; %bb.0: ; %bb885; UNALIGNED-GFX10-NEXT: s_load_dword s0, s[4:5], 0x24886; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)887; UNALIGNED-GFX10-NEXT: v_lshl_add_u32 v5, v0, 2, s0888; UNALIGNED-GFX10-NEXT: ds_read2_b64 v[0:3], v5 offset1:1889; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)890; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2891; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v2, v0892; UNALIGNED-GFX10-NEXT: ds_write2_b64 v5, v[3:4], v[1:2] offset1:1893; UNALIGNED-GFX10-NEXT: s_endpgm894;895; ALIGNED-GFX11-LABEL: test_local_v4_aligned8:896; ALIGNED-GFX11: ; %bb.0: ; %bb897; ALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24898; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0899; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)900; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)901; ALIGNED-GFX11-NEXT: v_lshl_add_u32 v5, v0, 2, s0902; ALIGNED-GFX11-NEXT: ds_load_2addr_b64 v[0:3], v5 offset1:1903; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)904; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v4, v2905; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0906; ALIGNED-GFX11-NEXT: ds_store_2addr_b64 v5, v[3:4], v[1:2] offset1:1907; ALIGNED-GFX11-NEXT: s_endpgm908;909; UNALIGNED-GFX11-LABEL: test_local_v4_aligned8:910; UNALIGNED-GFX11: ; %bb.0: ; %bb911; UNALIGNED-GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24912; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0913; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)914; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)915; UNALIGNED-GFX11-NEXT: v_lshl_add_u32 v5, v0, 2, s0916; UNALIGNED-GFX11-NEXT: ds_load_2addr_b64 v[0:3], v5 offset1:1917; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)918; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v4, v2919; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v2, v0920; UNALIGNED-GFX11-NEXT: ds_store_2addr_b64 v5, v[3:4], v[1:2] offset1:1921; UNALIGNED-GFX11-NEXT: s_endpgm922bb:923 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()924 %gep = getelementptr inbounds i32, ptr addrspace(3) %arg, i32 %lid925 %load = load <4 x i32>, ptr addrspace(3) %gep, align 8926 %v1 = extractelement <4 x i32> %load, i32 0927 %v2 = extractelement <4 x i32> %load, i32 1928 %v3 = extractelement <4 x i32> %load, i32 2929 %v4 = extractelement <4 x i32> %load, i32 3930 %v5 = insertelement <4 x i32> poison, i32 %v4, i32 0931 %v6 = insertelement <4 x i32> %v5, i32 %v3, i32 1932 %v7 = insertelement <4 x i32> %v6, i32 %v2, i32 2933 %v8 = insertelement <4 x i32> %v7, i32 %v1, i32 3934 store <4 x i32> %v8, ptr addrspace(3) %gep, align 8935 ret void936}937 938define amdgpu_kernel void @test_flat_v4_aligned8(ptr %arg) {939; SPLIT-LABEL: test_flat_v4_aligned8:940; SPLIT: ; %bb.0: ; %bb941; SPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24942; SPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0943; SPLIT-NEXT: s_waitcnt lgkmcnt(0)944; SPLIT-NEXT: v_add_co_u32 v6, s0, s0, v0945; SPLIT-NEXT: v_add_co_ci_u32_e64 v7, s0, s1, 0, s0946; SPLIT-NEXT: v_add_co_u32 v8, vcc_lo, v6, 8947; SPLIT-NEXT: v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo948; SPLIT-NEXT: s_clause 0x1949; SPLIT-NEXT: flat_load_dwordx2 v[0:1], v[6:7]950; SPLIT-NEXT: flat_load_dwordx2 v[3:4], v[8:9]951; SPLIT-NEXT: s_waitcnt vmcnt(1) lgkmcnt(1)952; SPLIT-NEXT: v_mov_b32_e32 v2, v0953; SPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)954; SPLIT-NEXT: v_mov_b32_e32 v5, v3955; SPLIT-NEXT: flat_store_dwordx2 v[8:9], v[1:2]956; SPLIT-NEXT: flat_store_dwordx2 v[6:7], v[4:5]957; SPLIT-NEXT: s_endpgm958;959; ALIGNED-GFX10-LABEL: test_flat_v4_aligned8:960; ALIGNED-GFX10: ; %bb.0: ; %bb961; ALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24962; ALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0963; ALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)964; ALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0965; ALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0966; ALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]967; ALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)968; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2969; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1970; ALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0971; ALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]972; ALIGNED-GFX10-NEXT: s_endpgm973;974; UNALIGNED-GFX10-LABEL: test_flat_v4_aligned8:975; UNALIGNED-GFX10: ; %bb.0: ; %bb976; UNALIGNED-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24977; UNALIGNED-GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0978; UNALIGNED-GFX10-NEXT: s_waitcnt lgkmcnt(0)979; UNALIGNED-GFX10-NEXT: v_add_co_u32 v7, s0, s0, v0980; UNALIGNED-GFX10-NEXT: v_add_co_ci_u32_e64 v8, s0, s1, 0, s0981; UNALIGNED-GFX10-NEXT: flat_load_dwordx4 v[0:3], v[7:8]982; UNALIGNED-GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)983; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v4, v2984; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v5, v1985; UNALIGNED-GFX10-NEXT: v_mov_b32_e32 v6, v0986; UNALIGNED-GFX10-NEXT: flat_store_dwordx4 v[7:8], v[3:6]987; UNALIGNED-GFX10-NEXT: s_endpgm988;989; ALIGNED-GFX11-LABEL: test_flat_v4_aligned8:990; ALIGNED-GFX11: ; %bb.0: ; %bb991; ALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24992; ALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0993; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)994; ALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0995; ALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)996; ALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v0997; ALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)998; ALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s0999; ALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]1000; ALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)1001; ALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v11002; ALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v01003; ALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]1004; ALIGNED-GFX11-NEXT: s_endpgm1005;1006; UNALIGNED-GFX11-LABEL: test_flat_v4_aligned8:1007; UNALIGNED-GFX11: ; %bb.0: ; %bb1008; UNALIGNED-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x241009; UNALIGNED-GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01010; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1011; UNALIGNED-GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v01012; UNALIGNED-GFX11-NEXT: s_waitcnt lgkmcnt(0)1013; UNALIGNED-GFX11-NEXT: v_add_co_u32 v7, s0, s0, v01014; UNALIGNED-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1015; UNALIGNED-GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s1, 0, s01016; UNALIGNED-GFX11-NEXT: flat_load_b128 v[0:3], v[7:8]1017; UNALIGNED-GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)1018; UNALIGNED-GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v11019; UNALIGNED-GFX11-NEXT: v_mov_b32_e32 v6, v01020; UNALIGNED-GFX11-NEXT: flat_store_b128 v[7:8], v[3:6]1021; UNALIGNED-GFX11-NEXT: s_endpgm1022bb:1023 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()1024 %gep = getelementptr inbounds i32, ptr %arg, i32 %lid1025 %load = load <4 x i32>, ptr %gep, align 81026 %v1 = extractelement <4 x i32> %load, i32 01027 %v2 = extractelement <4 x i32> %load, i32 11028 %v3 = extractelement <4 x i32> %load, i32 21029 %v4 = extractelement <4 x i32> %load, i32 31030 %v5 = insertelement <4 x i32> poison, i32 %v4, i32 01031 %v6 = insertelement <4 x i32> %v5, i32 %v3, i32 11032 %v7 = insertelement <4 x i32> %v6, i32 %v2, i32 21033 %v8 = insertelement <4 x i32> %v7, i32 %v1, i32 31034 store <4 x i32> %v8, ptr %gep, align 81035 ret void1036}1037 1038declare i32 @llvm.amdgcn.workitem.id.x()1039