135 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=early-machinelicm -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=early-machinelicm -o - %s | FileCheck -check-prefix=GCN %s4 5---6name: hoist_move7tracksRegLiveness: true8body: |9 ; GCN-LABEL: name: hoist_move10 ; GCN: bb.0:11 ; GCN-NEXT: successors: %bb.1(0x80000000)12 ; GCN-NEXT: {{ $}}13 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec14 ; GCN-NEXT: S_BRANCH %bb.115 ; GCN-NEXT: {{ $}}16 ; GCN-NEXT: bb.1:17 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)18 ; GCN-NEXT: {{ $}}19 ; GCN-NEXT: $exec = S_OR_B64 $exec, 1, implicit-def $scc20 ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.1, implicit $exec21 ; GCN-NEXT: S_BRANCH %bb.222 ; GCN-NEXT: {{ $}}23 ; GCN-NEXT: bb.2:24 ; GCN-NEXT: S_ENDPGM 025 bb.0:26 S_BRANCH %bb.127 28 bb.1:29 %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec30 $exec = S_OR_B64 $exec, 1, implicit-def $scc31 S_CBRANCH_EXECNZ %bb.1, implicit $exec32 S_BRANCH %bb.233 34 bb.2:35 S_ENDPGM 036...37---38name: no_hoist_cmp39tracksRegLiveness: true40body: |41 ; GCN-LABEL: name: no_hoist_cmp42 ; GCN: bb.0:43 ; GCN-NEXT: successors: %bb.1(0x80000000)44 ; GCN-NEXT: {{ $}}45 ; GCN-NEXT: S_BRANCH %bb.146 ; GCN-NEXT: {{ $}}47 ; GCN-NEXT: bb.1:48 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)49 ; GCN-NEXT: {{ $}}50 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 1, 2, implicit $exec51 ; GCN-NEXT: $exec = S_OR_B64 $exec, [[V_CMP_EQ_U32_e64_]], implicit-def $scc52 ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.1, implicit $exec53 ; GCN-NEXT: S_BRANCH %bb.254 ; GCN-NEXT: {{ $}}55 ; GCN-NEXT: bb.2:56 ; GCN-NEXT: S_ENDPGM 057 bb.0:58 S_BRANCH %bb.159 60 bb.1:61 %0:sreg_64 = V_CMP_EQ_U32_e64 1, 2, implicit $exec62 $exec = S_OR_B64 $exec, %0:sreg_64, implicit-def $scc63 S_CBRANCH_EXECNZ %bb.1, implicit $exec64 S_BRANCH %bb.265 66 bb.2:67 S_ENDPGM 068...69---70name: allowable_hoist_cmp71tracksRegLiveness: true72body: |73 ; GCN-LABEL: name: allowable_hoist_cmp74 ; GCN: bb.0:75 ; GCN-NEXT: successors: %bb.1(0x80000000)76 ; GCN-NEXT: {{ $}}77 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 1, 2, implicit $exec78 ; GCN-NEXT: S_BRANCH %bb.179 ; GCN-NEXT: {{ $}}80 ; GCN-NEXT: bb.1:81 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)82 ; GCN-NEXT: {{ $}}83 ; GCN-NEXT: $exec = S_AND_B64 $exec, [[V_CMP_EQ_U32_e64_]], implicit-def $scc84 ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.1, implicit $exec85 ; GCN-NEXT: S_BRANCH %bb.286 ; GCN-NEXT: {{ $}}87 ; GCN-NEXT: bb.2:88 ; GCN-NEXT: S_ENDPGM 089 bb.0:90 S_BRANCH %bb.191 92 bb.1:93 %0:sreg_64 = V_CMP_EQ_U32_e64 1, 2, implicit $exec94 $exec = S_AND_B64 $exec, %0:sreg_64, implicit-def $scc95 S_CBRANCH_EXECNZ %bb.1, implicit $exec96 S_BRANCH %bb.297 98 bb.2:99 S_ENDPGM 0100...101---102name: no_hoist_readfirstlane103tracksRegLiveness: true104body: |105 ; GCN-LABEL: name: no_hoist_readfirstlane106 ; GCN: bb.0:107 ; GCN-NEXT: successors: %bb.1(0x80000000)108 ; GCN-NEXT: {{ $}}109 ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF110 ; GCN-NEXT: S_BRANCH %bb.1111 ; GCN-NEXT: {{ $}}112 ; GCN-NEXT: bb.1:113 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)114 ; GCN-NEXT: {{ $}}115 ; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[DEF]], implicit $exec116 ; GCN-NEXT: $exec = S_OR_B64 $exec, 1, implicit-def $scc117 ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.1, implicit $exec118 ; GCN-NEXT: S_BRANCH %bb.2119 ; GCN-NEXT: {{ $}}120 ; GCN-NEXT: bb.2:121 ; GCN-NEXT: S_ENDPGM 0122 bb.0:123 %0:vgpr_32 = IMPLICIT_DEF124 S_BRANCH %bb.1125 126 bb.1:127 %1:sreg_32_xm0 = V_READFIRSTLANE_B32 %0:vgpr_32, implicit $exec128 $exec = S_OR_B64 $exec, 1, implicit-def $scc129 S_CBRANCH_EXECNZ %bb.1, implicit $exec130 S_BRANCH %bb.2131 132 bb.2:133 S_ENDPGM 0134...135