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1; UNSUPPORTED: expensive_checks2; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \3; RUN: | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s4; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \5; RUN: | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s6; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \7; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -amdgpu-loop-prefetch -debug-pass=Structure < %s 2>&1 \8; RUN: | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s9; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \10; RUN: | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s11; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \12; RUN: | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s13 14; REQUIRES: asserts15 16; GCN-O0:Target Library Information17; GCN-O0-NEXT:Target Pass Configuration18; GCN-O0-NEXT:Machine Module Information19; GCN-O0-NEXT:Target Transform Information20; GCN-O0-NEXT:Assumption Cache Tracker21; GCN-O0-NEXT:Profile summary info22; GCN-O0-NEXT:Argument Register Usage Information Storage23; GCN-O0-NEXT:Create Garbage Collector Module Metadata24; GCN-O0-NEXT:Register Usage Information Storage25; GCN-O0-NEXT:Machine Branch Probability Analysis26; GCN-O0-NEXT: ModulePass Manager27; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering28; GCN-O0-NEXT: FunctionPass Manager29; GCN-O0-NEXT: Expand large div/rem30; GCN-O0-NEXT: Expand fp31; GCN-O0-NEXT: AMDGPU Remove Incompatible Functions32; GCN-O0-NEXT: AMDGPU Printf lowering33; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU34; GCN-O0-NEXT: FunctionPass Manager35; GCN-O0-NEXT: Dominator Tree Construction36; GCN-O0-NEXT: Cycle Info Analysis37; GCN-O0-NEXT: Uniformity Analysis38; GCN-O0-NEXT: AMDGPU Uniform Intrinsic Combine39; GCN-O0-NEXT: Expand variadic functions40; GCN-O0-NEXT: AMDGPU Inline All Functions41; GCN-O0-NEXT: Inliner for always_inline functions42; GCN-O0-NEXT: FunctionPass Manager43; GCN-O0-NEXT: Dominator Tree Construction44; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)45; GCN-O0-NEXT: Function Alias Analysis Results46; GCN-O0-NEXT: Externalize enqueued block runtime handles47; GCN-O0-NEXT: AMDGPU lowering of execution synchronization48; GCN-O0-NEXT: AMDGPU Software lowering of LDS49; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions50; GCN-O0-NEXT: FunctionPass Manager51; GCN-O0-NEXT: Expand Atomic instructions52; GCN-O0-NEXT: Remove unreachable blocks from the CFG53; GCN-O0-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)54; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics55; GCN-O0-NEXT: Expand reduction intrinsics56; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments57; GCN-O0-NEXT: Lower buffer fat pointer operations to buffer resources58; GCN-O0-NEXT: AMDGPU lower intrinsics59; GCN-O0-NEXT: FunctionPass Manager60; GCN-O0-NEXT: Lazy Value Information Analysis61; GCN-O0-NEXT: Lower SwitchInst's to branches62; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators63; GCN-O0-NEXT: Remove unreachable blocks from the CFG64; GCN-O0-NEXT: Post-Dominator Tree Construction65; GCN-O0-NEXT: Dominator Tree Construction66; GCN-O0-NEXT: Cycle Info Analysis67; GCN-O0-NEXT: Uniformity Analysis68; GCN-O0-NEXT: Unify divergent function exit nodes69; GCN-O0-NEXT: Dominator Tree Construction70; GCN-O0-NEXT: Cycle Info Analysis71; GCN-O0-NEXT: Convert irreducible control-flow into natural loops72; GCN-O0-NEXT: Natural Loop Information73; GCN-O0-NEXT: Fixup each natural loop to have a single exit block74; GCN-O0-NEXT: Post-Dominator Tree Construction75; GCN-O0-NEXT: Dominance Frontier Construction76; GCN-O0-NEXT: Detect single entry single exit regions77; GCN-O0-NEXT: Region Pass Manager78; GCN-O0-NEXT: Structurize control flow79; GCN-O0-NEXT: Cycle Info Analysis80; GCN-O0-NEXT: Uniformity Analysis81; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)82; GCN-O0-NEXT: Function Alias Analysis Results83; GCN-O0-NEXT: Memory SSA84; GCN-O0-NEXT: AMDGPU Annotate Uniform Values85; GCN-O0-NEXT: Natural Loop Information86; GCN-O0-NEXT: SI annotate control flow87; GCN-O0-NEXT: Cycle Info Analysis88; GCN-O0-NEXT: Uniformity Analysis89; GCN-O0-NEXT: AMDGPU Rewrite Undef for PHI90; GCN-O0-NEXT: LCSSA Verifier91; GCN-O0-NEXT: Loop-Closed SSA Form Pass92; GCN-O0-NEXT: CallGraph Construction93; GCN-O0-NEXT: Call Graph SCC Pass Manager94; GCN-O0-NEXT: DummyCGSCCPass95; GCN-O0-NEXT: FunctionPass Manager96; GCN-O0-NEXT: Prepare callbr97; GCN-O0-NEXT: Safe Stack instrumentation pass98; GCN-O0-NEXT: Insert stack protectors99; GCN-O0-NEXT: Dominator Tree Construction100; GCN-O0-NEXT: Cycle Info Analysis101; GCN-O0-NEXT: Uniformity Analysis102; GCN-O0-NEXT: Assignment Tracking Analysis103; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection104; GCN-O0-NEXT: MachineDominator Tree Construction105; GCN-O0-NEXT: SI Fix SGPR copies106; GCN-O0-NEXT: MachinePostDominator Tree Construction107; GCN-O0-NEXT: SI Lower i1 Copies108; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions109; GCN-O0-NEXT: Local Stack Slot Allocation110; GCN-O0-NEXT: Register Usage Information Propagation111; GCN-O0-NEXT: Eliminate PHI nodes for register allocation112; GCN-O0-NEXT: SI Lower control flow pseudo instructions113; GCN-O0-NEXT: Two-Address instruction pass114; GCN-O0-NEXT: MachineDominator Tree Construction115; GCN-O0-NEXT: Slot index numbering116; GCN-O0-NEXT: Live Interval Analysis117; GCN-O0-NEXT: SI Whole Quad Mode118; GCN-O0-NEXT: AMDGPU Pre-RA Long Branch Reg119; GCN-O0-NEXT: Fast Register Allocator120; GCN-O0-NEXT: SI lower SGPR spill instructions121; GCN-O0-NEXT: Slot index numbering122; GCN-O0-NEXT: Live Interval Analysis123; GCN-O0-NEXT: Virtual Register Map124; GCN-O0-NEXT: Live Register Matrix125; GCN-O0-NEXT: SI Pre-allocate WWM Registers126; GCN-O0-NEXT: Fast Register Allocator127; GCN-O0-NEXT: SI Lower WWM Copies128; GCN-O0-NEXT: AMDGPU Reserve WWM Registers129; GCN-O0-NEXT: Fast Register Allocator130; GCN-O0-NEXT: SI Fix VGPR copies131; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis132; GCN-O0-NEXT: Fixup Statepoint Caller Saved133; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis134; GCN-O0-NEXT: Machine Optimization Remark Emitter135; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization136; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass137; GCN-O0-NEXT: SI post-RA bundler138; GCN-O0-NEXT: Insert fentry calls139; GCN-O0-NEXT: Insert XRay ops140; GCN-O0-NEXT: SI Memory Legalizer141; GCN-O0-NEXT: MachineDominator Tree Construction142; GCN-O0-NEXT: Machine Natural Loop Construction143; GCN-O0-NEXT: MachinePostDominator Tree Construction144; GCN-O0-NEXT: SI insert wait instructions145; GCN-O0-NEXT: Insert required mode register values146; GCN-O0-NEXT: SI Final Branch Preparation147; GCN-O0-NEXT: Post RA hazard recognizer148; GCN-O0-NEXT: AMDGPU Insert waits for SGPR read hazards149; GCN-O0-NEXT: AMDGPU Lower VGPR Encoding150; GCN-O0-NEXT: Branch relaxation pass151; GCN-O0-NEXT: Register Usage Information Collector Pass152; GCN-O0-NEXT: Remove Loads Into Fake Uses153; GCN-O0-NEXT: Live DEBUG_VALUE analysis154; GCN-O0-NEXT: Machine Sanitizer Binary Metadata155; GCN-O0-NEXT: AMDGPU Preload Kernel Arguments Prolog156; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis157; GCN-O0-NEXT: Machine Optimization Remark Emitter158; GCN-O0-NEXT: Stack Frame Layout Analysis159; GCN-O0-NEXT: Function register usage analysis160; GCN-O0-NEXT: AMDGPU Assembly Printer161; GCN-O0-NEXT: Free MachineFunction162 163; GCN-O1:Target Library Information164; GCN-O1-NEXT:Target Pass Configuration165; GCN-O1-NEXT:Machine Module Information166; GCN-O1-NEXT:Target Transform Information167; GCN-O1-NEXT:Assumption Cache Tracker168; GCN-O1-NEXT:Profile summary info169; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis170; GCN-O1-NEXT:External Alias Analysis171; GCN-O1-NEXT:Type-Based Alias Analysis172; GCN-O1-NEXT:Scoped NoAlias Alias Analysis173; GCN-O1-NEXT:Argument Register Usage Information Storage174; GCN-O1-NEXT:Create Garbage Collector Module Metadata175; GCN-O1-NEXT:Machine Branch Probability Analysis176; GCN-O1-NEXT:Register Usage Information Storage177; GCN-O1-NEXT:Default Regalloc Eviction Advisor178; GCN-O1-NEXT:Default Regalloc Priority Advisor179; GCN-O1-NEXT: ModulePass Manager180; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering181; GCN-O1-NEXT: FunctionPass Manager182; GCN-O1-NEXT: Expand large div/rem183; GCN-O1-NEXT: Expand fp184; GCN-O1-NEXT: AMDGPU Remove Incompatible Functions185; GCN-O1-NEXT: AMDGPU Printf lowering186; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU187; GCN-O1-NEXT: FunctionPass Manager188; GCN-O1-NEXT: Dominator Tree Construction189; GCN-O1-NEXT: Cycle Info Analysis190; GCN-O1-NEXT: Uniformity Analysis191; GCN-O1-NEXT: AMDGPU Uniform Intrinsic Combine192; GCN-O1-NEXT: Expand variadic functions193; GCN-O1-NEXT: AMDGPU Inline All Functions194; GCN-O1-NEXT: Inliner for always_inline functions195; GCN-O1-NEXT: FunctionPass Manager196; GCN-O1-NEXT: Dominator Tree Construction197; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)198; GCN-O1-NEXT: Function Alias Analysis Results199; GCN-O1-NEXT: Externalize enqueued block runtime handles200; GCN-O1-NEXT: AMDGPU lowering of execution synchronization201; GCN-O1-NEXT: AMDGPU Software lowering of LDS202; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions203; GCN-O1-NEXT: FunctionPass Manager204; GCN-O1-NEXT: Dominator Tree Construction205; GCN-O1-NEXT: Cycle Info Analysis206; GCN-O1-NEXT: Uniformity Analysis207; GCN-O1-NEXT: AMDGPU atomic optimizations208; GCN-O1-NEXT: Expand Atomic instructions209; GCN-O1-NEXT: Dominator Tree Construction210; GCN-O1-NEXT: Natural Loop Information211; GCN-O1-NEXT: AMDGPU Promote Alloca212; GCN-O1-NEXT: Cycle Info Analysis213; GCN-O1-NEXT: Uniformity Analysis214; GCN-O1-NEXT: AMDGPU IR optimizations215; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)216; GCN-O1-NEXT: Canonicalize natural loops217; GCN-O1-NEXT: Scalar Evolution Analysis218; GCN-O1-NEXT: Loop Pass Manager219; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops220; GCN-O1-NEXT: Induction Variable Users221; GCN-O1-NEXT: Loop Strength Reduction222; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)223; GCN-O1-NEXT: Function Alias Analysis Results224; GCN-O1-NEXT: Merge contiguous icmps into a memcmp225; GCN-O1-NEXT: Natural Loop Information226; GCN-O1-NEXT: Lazy Branch Probability Analysis227; GCN-O1-NEXT: Lazy Block Frequency Analysis228; GCN-O1-NEXT: Expand memcmp() to load/stores229; GCN-O1-NEXT: Remove unreachable blocks from the CFG230; GCN-O1-NEXT: Natural Loop Information231; GCN-O1-NEXT: Post-Dominator Tree Construction232; GCN-O1-NEXT: Branch Probability Analysis233; GCN-O1-NEXT: Block Frequency Analysis234; GCN-O1-NEXT: Constant Hoisting235; GCN-O1-NEXT: Replace intrinsics with calls to vector library236; GCN-O1-NEXT: Lazy Branch Probability Analysis237; GCN-O1-NEXT: Lazy Block Frequency Analysis238; GCN-O1-NEXT: Optimization Remark Emitter239; GCN-O1-NEXT: Partially inline calls to library functions240; GCN-O1-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)241; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics242; GCN-O1-NEXT: Expand reduction intrinsics243; GCN-O1-NEXT: AMDGPU Preload Kernel Arguments244; GCN-O1-NEXT: FunctionPass Manager245; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments246; GCN-O1-NEXT: Dominator Tree Construction247; GCN-O1-NEXT: Natural Loop Information248; GCN-O1-NEXT: CodeGen Prepare249; GCN-O1-NEXT: Lower buffer fat pointer operations to buffer resources250; GCN-O1-NEXT: AMDGPU lower intrinsics251; GCN-O1-NEXT: FunctionPass Manager252; GCN-O1-NEXT: Lazy Value Information Analysis253; GCN-O1-NEXT: Lower SwitchInst's to branches254; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators255; GCN-O1-NEXT: Remove unreachable blocks from the CFG256; GCN-O1-NEXT: Dominator Tree Construction257; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)258; GCN-O1-NEXT: Function Alias Analysis Results259; GCN-O1-NEXT: Flatten the CFG260; GCN-O1-NEXT: Dominator Tree Construction261; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)262; GCN-O1-NEXT: Function Alias Analysis Results263; GCN-O1-NEXT: Natural Loop Information264; GCN-O1-NEXT: Code sinking265; GCN-O1-NEXT: Cycle Info Analysis266; GCN-O1-NEXT: Uniformity Analysis267; GCN-O1-NEXT: AMDGPU IR late optimizations268; GCN-O1-NEXT: Post-Dominator Tree Construction269; GCN-O1-NEXT: Uniformity Analysis270; GCN-O1-NEXT: Unify divergent function exit nodes271; GCN-O1-NEXT: Dominator Tree Construction272; GCN-O1-NEXT: Cycle Info Analysis273; GCN-O1-NEXT: Convert irreducible control-flow into natural loops274; GCN-O1-NEXT: Natural Loop Information275; GCN-O1-NEXT: Fixup each natural loop to have a single exit block276; GCN-O1-NEXT: Post-Dominator Tree Construction277; GCN-O1-NEXT: Dominance Frontier Construction278; GCN-O1-NEXT: Detect single entry single exit regions279; GCN-O1-NEXT: Region Pass Manager280; GCN-O1-NEXT: Structurize control flow281; GCN-O1-NEXT: Cycle Info Analysis282; GCN-O1-NEXT: Uniformity Analysis283; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)284; GCN-O1-NEXT: Function Alias Analysis Results285; GCN-O1-NEXT: Memory SSA286; GCN-O1-NEXT: AMDGPU Annotate Uniform Values287; GCN-O1-NEXT: Natural Loop Information288; GCN-O1-NEXT: SI annotate control flow289; GCN-O1-NEXT: Cycle Info Analysis290; GCN-O1-NEXT: Uniformity Analysis291; GCN-O1-NEXT: AMDGPU Rewrite Undef for PHI292; GCN-O1-NEXT: LCSSA Verifier293; GCN-O1-NEXT: Loop-Closed SSA Form Pass294; GCN-O1-NEXT: CallGraph Construction295; GCN-O1-NEXT: Call Graph SCC Pass Manager296; GCN-O1-NEXT: DummyCGSCCPass297; GCN-O1-NEXT: FunctionPass Manager298; GCN-O1-NEXT: Dominator Tree Construction299; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)300; GCN-O1-NEXT: Function Alias Analysis Results301; GCN-O1-NEXT: ObjC ARC contraction302; GCN-O1-NEXT: Prepare callbr303; GCN-O1-NEXT: Safe Stack instrumentation pass304; GCN-O1-NEXT: Insert stack protectors305; GCN-O1-NEXT: Cycle Info Analysis306; GCN-O1-NEXT: Uniformity Analysis307; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)308; GCN-O1-NEXT: Function Alias Analysis Results309; GCN-O1-NEXT: Natural Loop Information310; GCN-O1-NEXT: Post-Dominator Tree Construction311; GCN-O1-NEXT: Branch Probability Analysis312; GCN-O1-NEXT: Assignment Tracking Analysis313; GCN-O1-NEXT: Lazy Branch Probability Analysis314; GCN-O1-NEXT: Lazy Block Frequency Analysis315; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection316; GCN-O1-NEXT: MachineDominator Tree Construction317; GCN-O1-NEXT: SI Fix SGPR copies318; GCN-O1-NEXT: MachinePostDominator Tree Construction319; GCN-O1-NEXT: SI Lower i1 Copies320; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions321; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis322; GCN-O1-NEXT: Early Tail Duplication323; GCN-O1-NEXT: Optimize machine instruction PHIs324; GCN-O1-NEXT: Slot index numbering325; GCN-O1-NEXT: Merge disjoint stack slots326; GCN-O1-NEXT: Local Stack Slot Allocation327; GCN-O1-NEXT: Remove dead machine instructions328; GCN-O1-NEXT: MachineDominator Tree Construction329; GCN-O1-NEXT: Machine Natural Loop Construction330; GCN-O1-NEXT: Machine Block Frequency Analysis331; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion332; GCN-O1-NEXT: MachineDominator Tree Construction333; GCN-O1-NEXT: Machine Block Frequency Analysis334; GCN-O1-NEXT: Machine Common Subexpression Elimination335; GCN-O1-NEXT: MachinePostDominator Tree Construction336; GCN-O1-NEXT: Machine Cycle Info Analysis337; GCN-O1-NEXT: Machine code sinking338; GCN-O1-NEXT: Peephole Optimizations339; GCN-O1-NEXT: Remove dead machine instructions340; GCN-O1-NEXT: SI Fold Operands341; GCN-O1-NEXT: GCN DPP Combine342; GCN-O1-NEXT: SI Load Store Optimizer343; GCN-O1-NEXT: Remove dead machine instructions344; GCN-O1-NEXT: SI Shrink Instructions345; GCN-O1-NEXT: Register Usage Information Propagation346; GCN-O1-NEXT: AMDGPU Prepare AGPR Alloc347; GCN-O1-NEXT: Detect Dead Lanes348; GCN-O1-NEXT: Remove dead machine instructions349; GCN-O1-NEXT: Init Undef Pass350; GCN-O1-NEXT: Process Implicit Definitions351; GCN-O1-NEXT: Remove unreachable machine basic blocks352; GCN-O1-NEXT: Live Variable Analysis353; GCN-O1-NEXT: MachineDominator Tree Construction354; GCN-O1-NEXT: SI Optimize VGPR LiveRange355; GCN-O1-NEXT: Eliminate PHI nodes for register allocation356; GCN-O1-NEXT: SI Lower control flow pseudo instructions357; GCN-O1-NEXT: Two-Address instruction pass358; GCN-O1-NEXT: Slot index numbering359; GCN-O1-NEXT: Live Interval Analysis360; GCN-O1-NEXT: Machine Natural Loop Construction361; GCN-O1-NEXT: Register Coalescer362; GCN-O1-NEXT: Rename Disconnected Subregister Components363; GCN-O1-NEXT: Rewrite Partial Register Uses364; GCN-O1-NEXT: Machine Instruction Scheduler365; GCN-O1-NEXT: SI Whole Quad Mode366; GCN-O1-NEXT: SI optimize exec mask operations pre-RA367; GCN-O1-NEXT: AMDGPU Pre-RA Long Branch Reg368; GCN-O1-NEXT: Machine Natural Loop Construction369; GCN-O1-NEXT: Machine Block Frequency Analysis370; GCN-O1-NEXT: Debug Variable Analysis371; GCN-O1-NEXT: Live Stack Slot Analysis372; GCN-O1-NEXT: Virtual Register Map373; GCN-O1-NEXT: Live Register Matrix374; GCN-O1-NEXT: Bundle Machine CFG Edges375; GCN-O1-NEXT: Spill Code Placement Analysis376; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis377; GCN-O1-NEXT: Machine Optimization Remark Emitter378; GCN-O1-NEXT: Greedy Register Allocator379; GCN-O1-NEXT: Virtual Register Rewriter380; GCN-O1-NEXT: Stack Slot Coloring381; GCN-O1-NEXT: SI lower SGPR spill instructions382; GCN-O1-NEXT: Virtual Register Map383; GCN-O1-NEXT: Live Register Matrix384; GCN-O1-NEXT: SI Pre-allocate WWM Registers385; GCN-O1-NEXT: Live Stack Slot Analysis386; GCN-O1-NEXT: Greedy Register Allocator387; GCN-O1-NEXT: SI Lower WWM Copies388; GCN-O1-NEXT: Virtual Register Rewriter389; GCN-O1-NEXT: AMDGPU Reserve WWM Registers390; GCN-O1-NEXT: Virtual Register Map391; GCN-O1-NEXT: Live Register Matrix392; GCN-O1-NEXT: Greedy Register Allocator393; GCN-O1-NEXT: GCN NSA Reassign394; GCN-O1-NEXT: AMDGPU Rewrite AGPR-Copy-MFMA395; GCN-O1-NEXT: Virtual Register Rewriter396; GCN-O1-NEXT: AMDGPU Mark Last Scratch Load397; GCN-O1-NEXT: Stack Slot Coloring398; GCN-O1-NEXT: Machine Copy Propagation Pass399; GCN-O1-NEXT: Machine Loop Invariant Code Motion400; GCN-O1-NEXT: SI Fix VGPR copies401; GCN-O1-NEXT: SI optimize exec mask operations402; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis403; GCN-O1-NEXT: Fixup Statepoint Caller Saved404; GCN-O1-NEXT: PostRA Machine Sink405; GCN-O1-NEXT: Machine Block Frequency Analysis406; GCN-O1-NEXT: MachineDominator Tree Construction407; GCN-O1-NEXT: MachinePostDominator Tree Construction408; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis409; GCN-O1-NEXT: Machine Optimization Remark Emitter410; GCN-O1-NEXT: Shrink Wrapping analysis411; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization412; GCN-O1-NEXT: Machine Late Instructions Cleanup Pass413; GCN-O1-NEXT: Control Flow Optimizer414; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis415; GCN-O1-NEXT: Tail Duplication416; GCN-O1-NEXT: Machine Copy Propagation Pass417; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass418; GCN-O1-NEXT: SI Shrink Instructions419; GCN-O1-NEXT: SI post-RA bundler420; GCN-O1-NEXT: MachineDominator Tree Construction421; GCN-O1-NEXT: Machine Natural Loop Construction422; GCN-O1-NEXT: PostRA Machine Instruction Scheduler423; GCN-O1-NEXT: Machine Block Frequency Analysis424; GCN-O1-NEXT: MachinePostDominator Tree Construction425; GCN-O1-NEXT: Branch Probability Basic Block Placement426; GCN-O1-NEXT: Insert fentry calls427; GCN-O1-NEXT: Insert XRay ops428; GCN-O1-NEXT: GCN Create VOPD Instructions429; GCN-O1-NEXT: SI Memory Legalizer430; GCN-O1-NEXT: MachineDominator Tree Construction431; GCN-O1-NEXT: Machine Natural Loop Construction432; GCN-O1-NEXT: MachinePostDominator Tree Construction433; GCN-O1-NEXT: SI insert wait instructions434; GCN-O1-NEXT: Insert required mode register values435; GCN-O1-NEXT: SI Insert Hard Clauses436; GCN-O1-NEXT: SI Final Branch Preparation437; GCN-O1-NEXT: SI peephole optimizations438; GCN-O1-NEXT: Post RA hazard recognizer439; GCN-O1-NEXT: AMDGPU Insert waits for SGPR read hazards440; GCN-O1-NEXT: AMDGPU Lower VGPR Encoding441; GCN-O1-NEXT: AMDGPU Insert Delay ALU442; GCN-O1-NEXT: Branch relaxation pass443; GCN-O1-NEXT: Register Usage Information Collector Pass444; GCN-O1-NEXT: Remove Loads Into Fake Uses445; GCN-O1-NEXT: Live DEBUG_VALUE analysis446; GCN-O1-NEXT: Machine Sanitizer Binary Metadata447; GCN-O1-NEXT: AMDGPU Preload Kernel Arguments Prolog448; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis449; GCN-O1-NEXT: Machine Optimization Remark Emitter450; GCN-O1-NEXT: Stack Frame Layout Analysis451; GCN-O1-NEXT: Function register usage analysis452; GCN-O1-NEXT: AMDGPU Assembly Printer453; GCN-O1-NEXT: Free MachineFunction454 455; GCN-O1-OPTS:Target Library Information456; GCN-O1-OPTS-NEXT:Target Pass Configuration457; GCN-O1-OPTS-NEXT:Machine Module Information458; GCN-O1-OPTS-NEXT:Target Transform Information459; GCN-O1-OPTS-NEXT:Assumption Cache Tracker460; GCN-O1-OPTS-NEXT:Profile summary info461; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis462; GCN-O1-OPTS-NEXT:External Alias Analysis463; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis464; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis465; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage466; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata467; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis468; GCN-O1-OPTS-NEXT:Register Usage Information Storage469; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor470; GCN-O1-OPTS-NEXT:Default Regalloc Priority Advisor471; GCN-O1-OPTS-NEXT: ModulePass Manager472; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering473; GCN-O1-OPTS-NEXT: FunctionPass Manager474; GCN-O1-OPTS-NEXT: Expand large div/rem475; GCN-O1-OPTS-NEXT: Expand fp476; GCN-O1-OPTS-NEXT: AMDGPU Remove Incompatible Functions477; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering478; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU479; GCN-O1-OPTS-NEXT: FunctionPass Manager480; GCN-O1-OPTS-NEXT: Dominator Tree Construction481; GCN-O1-OPTS-NEXT: Cycle Info Analysis482; GCN-O1-OPTS-NEXT: Uniformity Analysis483; GCN-O1-OPTS-NEXT: AMDGPU Uniform Intrinsic Combine484; GCN-O1-OPTS-NEXT: Expand variadic functions485; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions486; GCN-O1-OPTS-NEXT: Inliner for always_inline functions487; GCN-O1-OPTS-NEXT: FunctionPass Manager488; GCN-O1-OPTS-NEXT: Dominator Tree Construction489; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)490; GCN-O1-OPTS-NEXT: Function Alias Analysis Results491; GCN-O1-OPTS-NEXT: Externalize enqueued block runtime handles492; GCN-O1-OPTS-NEXT: AMDGPU lowering of execution synchronization493; GCN-O1-OPTS-NEXT: AMDGPU Software lowering of LDS494; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions495; GCN-O1-OPTS-NEXT: FunctionPass Manager496; GCN-O1-OPTS-NEXT: Dominator Tree Construction497; GCN-O1-OPTS-NEXT: Cycle Info Analysis498; GCN-O1-OPTS-NEXT: Uniformity Analysis499; GCN-O1-OPTS-NEXT: AMDGPU atomic optimizations500; GCN-O1-OPTS-NEXT: Expand Atomic instructions501; GCN-O1-OPTS-NEXT: Dominator Tree Construction502; GCN-O1-OPTS-NEXT: Natural Loop Information503; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca504; GCN-O1-OPTS-NEXT: Canonicalize natural loops505; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis506; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis507; GCN-O1-OPTS-NEXT: Optimization Remark Emitter508; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis509; GCN-O1-OPTS-NEXT: Loop Data Prefetch510; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE511; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis512; GCN-O1-OPTS-NEXT: Straight line strength reduction513; GCN-O1-OPTS-NEXT: Early CSE514; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis515; GCN-O1-OPTS-NEXT: Nary reassociation516; GCN-O1-OPTS-NEXT: Early CSE517; GCN-O1-OPTS-NEXT: Cycle Info Analysis518; GCN-O1-OPTS-NEXT: Uniformity Analysis519; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations520; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)521; GCN-O1-OPTS-NEXT: Canonicalize natural loops522; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis523; GCN-O1-OPTS-NEXT: Loop Pass Manager524; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops525; GCN-O1-OPTS-NEXT: Induction Variable Users526; GCN-O1-OPTS-NEXT: Loop Strength Reduction527; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)528; GCN-O1-OPTS-NEXT: Function Alias Analysis Results529; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp530; GCN-O1-OPTS-NEXT: Natural Loop Information531; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis532; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis533; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores534; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG535; GCN-O1-OPTS-NEXT: Natural Loop Information536; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction537; GCN-O1-OPTS-NEXT: Branch Probability Analysis538; GCN-O1-OPTS-NEXT: Block Frequency Analysis539; GCN-O1-OPTS-NEXT: Constant Hoisting540; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library541; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis542; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis543; GCN-O1-OPTS-NEXT: Optimization Remark Emitter544; GCN-O1-OPTS-NEXT: Partially inline calls to library functions545; GCN-O1-OPTS-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)546; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics547; GCN-O1-OPTS-NEXT: Expand reduction intrinsics548; GCN-O1-OPTS-NEXT: Early CSE549; GCN-O1-OPTS-NEXT: AMDGPU Preload Kernel Arguments550; GCN-O1-OPTS-NEXT: FunctionPass Manager551; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments552; GCN-O1-OPTS-NEXT: Dominator Tree Construction553; GCN-O1-OPTS-NEXT: Natural Loop Information554; GCN-O1-OPTS-NEXT: CodeGen Prepare555; GCN-O1-OPTS-NEXT: Dominator Tree Construction556; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)557; GCN-O1-OPTS-NEXT: Function Alias Analysis Results558; GCN-O1-OPTS-NEXT: Natural Loop Information559; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis560; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer561; GCN-O1-OPTS-NEXT: Lower buffer fat pointer operations to buffer resources562; GCN-O1-OPTS-NEXT: AMDGPU lower intrinsics563; GCN-O1-OPTS-NEXT: FunctionPass Manager564; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis565; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches566; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators567; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG568; GCN-O1-OPTS-NEXT: Dominator Tree Construction569; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)570; GCN-O1-OPTS-NEXT: Function Alias Analysis Results571; GCN-O1-OPTS-NEXT: Flatten the CFG572; GCN-O1-OPTS-NEXT: Dominator Tree Construction573; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)574; GCN-O1-OPTS-NEXT: Function Alias Analysis Results575; GCN-O1-OPTS-NEXT: Natural Loop Information576; GCN-O1-OPTS-NEXT: Code sinking577; GCN-O1-OPTS-NEXT: Cycle Info Analysis578; GCN-O1-OPTS-NEXT: Uniformity Analysis579; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations580; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction581; GCN-O1-OPTS-NEXT: Uniformity Analysis582; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes583; GCN-O1-OPTS-NEXT: Dominator Tree Construction584; GCN-O1-OPTS-NEXT: Cycle Info Analysis585; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops586; GCN-O1-OPTS-NEXT: Natural Loop Information587; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block588; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction589; GCN-O1-OPTS-NEXT: Dominance Frontier Construction590; GCN-O1-OPTS-NEXT: Detect single entry single exit regions591; GCN-O1-OPTS-NEXT: Region Pass Manager592; GCN-O1-OPTS-NEXT: Structurize control flow593; GCN-O1-OPTS-NEXT: Cycle Info Analysis594; GCN-O1-OPTS-NEXT: Uniformity Analysis595; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)596; GCN-O1-OPTS-NEXT: Function Alias Analysis Results597; GCN-O1-OPTS-NEXT: Memory SSA598; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values599; GCN-O1-OPTS-NEXT: Natural Loop Information600; GCN-O1-OPTS-NEXT: SI annotate control flow601; GCN-O1-OPTS-NEXT: Cycle Info Analysis602; GCN-O1-OPTS-NEXT: Uniformity Analysis603; GCN-O1-OPTS-NEXT: AMDGPU Rewrite Undef for PHI604; GCN-O1-OPTS-NEXT: LCSSA Verifier605; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass606; GCN-O1-OPTS-NEXT: CallGraph Construction607; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager608; GCN-O1-OPTS-NEXT: DummyCGSCCPass609; GCN-O1-OPTS-NEXT: FunctionPass Manager610; GCN-O1-OPTS-NEXT: Dominator Tree Construction611; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)612; GCN-O1-OPTS-NEXT: Function Alias Analysis Results613; GCN-O1-OPTS-NEXT: ObjC ARC contraction614; GCN-O1-OPTS-NEXT: Prepare callbr615; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass616; GCN-O1-OPTS-NEXT: Insert stack protectors617; GCN-O1-OPTS-NEXT: Cycle Info Analysis618; GCN-O1-OPTS-NEXT: Uniformity Analysis619; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)620; GCN-O1-OPTS-NEXT: Function Alias Analysis Results621; GCN-O1-OPTS-NEXT: Natural Loop Information622; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction623; GCN-O1-OPTS-NEXT: Branch Probability Analysis624; GCN-O1-OPTS-NEXT: Assignment Tracking Analysis625; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis626; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis627; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection628; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction629; GCN-O1-OPTS-NEXT: SI Fix SGPR copies630; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction631; GCN-O1-OPTS-NEXT: SI Lower i1 Copies632; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions633; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis634; GCN-O1-OPTS-NEXT: Early Tail Duplication635; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs636; GCN-O1-OPTS-NEXT: Slot index numbering637; GCN-O1-OPTS-NEXT: Merge disjoint stack slots638; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation639; GCN-O1-OPTS-NEXT: Remove dead machine instructions640; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction641; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction642; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis643; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion644; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction645; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis646; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination647; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction648; GCN-O1-OPTS-NEXT: Machine Cycle Info Analysis649; GCN-O1-OPTS-NEXT: Machine code sinking650; GCN-O1-OPTS-NEXT: Peephole Optimizations651; GCN-O1-OPTS-NEXT: Remove dead machine instructions652; GCN-O1-OPTS-NEXT: SI Fold Operands653; GCN-O1-OPTS-NEXT: GCN DPP Combine654; GCN-O1-OPTS-NEXT: SI Load Store Optimizer655; GCN-O1-OPTS-NEXT: SI Peephole SDWA656; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis657; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction658; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion659; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction660; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis661; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination662; GCN-O1-OPTS-NEXT: SI Fold Operands663; GCN-O1-OPTS-NEXT: Remove dead machine instructions664; GCN-O1-OPTS-NEXT: SI Shrink Instructions665; GCN-O1-OPTS-NEXT: Register Usage Information Propagation666; GCN-O1-OPTS-NEXT: AMDGPU Prepare AGPR Alloc667; GCN-O1-OPTS-NEXT: Detect Dead Lanes668; GCN-O1-OPTS-NEXT: Remove dead machine instructions669; GCN-O1-OPTS-NEXT: Init Undef Pass670; GCN-O1-OPTS-NEXT: Process Implicit Definitions671; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks672; GCN-O1-OPTS-NEXT: Live Variable Analysis673; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange674; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation675; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions676; GCN-O1-OPTS-NEXT: Two-Address instruction pass677; GCN-O1-OPTS-NEXT: Slot index numbering678; GCN-O1-OPTS-NEXT: Live Interval Analysis679; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction680; GCN-O1-OPTS-NEXT: Register Coalescer681; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components682; GCN-O1-OPTS-NEXT: Rewrite Partial Register Uses683; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler684; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations685; GCN-O1-OPTS-NEXT: SI Whole Quad Mode686; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA687; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA Long Branch Reg688; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction689; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis690; GCN-O1-OPTS-NEXT: Debug Variable Analysis691; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis692; GCN-O1-OPTS-NEXT: Virtual Register Map693; GCN-O1-OPTS-NEXT: Live Register Matrix694; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges695; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis696; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis697; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter698; GCN-O1-OPTS-NEXT: Greedy Register Allocator699; GCN-O1-OPTS-NEXT: Virtual Register Rewriter700; GCN-O1-OPTS-NEXT: Stack Slot Coloring701; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions702; GCN-O1-OPTS-NEXT: Virtual Register Map703; GCN-O1-OPTS-NEXT: Live Register Matrix704; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers705; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis706; GCN-O1-OPTS-NEXT: Greedy Register Allocator707; GCN-O1-OPTS-NEXT: SI Lower WWM Copies708; GCN-O1-OPTS-NEXT: Virtual Register Rewriter709; GCN-O1-OPTS-NEXT: AMDGPU Reserve WWM Registers710; GCN-O1-OPTS-NEXT: Virtual Register Map711; GCN-O1-OPTS-NEXT: Live Register Matrix712; GCN-O1-OPTS-NEXT: Greedy Register Allocator713; GCN-O1-OPTS-NEXT: GCN NSA Reassign714; GCN-O1-OPTS-NEXT: AMDGPU Rewrite AGPR-Copy-MFMA715; GCN-O1-OPTS-NEXT: Virtual Register Rewriter716; GCN-O1-OPTS-NEXT: AMDGPU Mark Last Scratch Load717; GCN-O1-OPTS-NEXT: Stack Slot Coloring718; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass719; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion720; GCN-O1-OPTS-NEXT: SI Fix VGPR copies721; GCN-O1-OPTS-NEXT: SI optimize exec mask operations722; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis723; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved724; GCN-O1-OPTS-NEXT: PostRA Machine Sink725; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis726; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction727; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction728; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis729; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter730; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis731; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization732; GCN-O1-OPTS-NEXT: Machine Late Instructions Cleanup Pass733; GCN-O1-OPTS-NEXT: Control Flow Optimizer734; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis735; GCN-O1-OPTS-NEXT: Tail Duplication736; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass737; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass738; GCN-O1-OPTS-NEXT: SI Shrink Instructions739; GCN-O1-OPTS-NEXT: SI post-RA bundler740; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction741; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction742; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler743; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis744; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction745; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement746; GCN-O1-OPTS-NEXT: Insert fentry calls747; GCN-O1-OPTS-NEXT: Insert XRay ops748; GCN-O1-OPTS-NEXT: GCN Create VOPD Instructions749; GCN-O1-OPTS-NEXT: SI Memory Legalizer750; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction751; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction752; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction753; GCN-O1-OPTS-NEXT: SI insert wait instructions754; GCN-O1-OPTS-NEXT: Insert required mode register values755; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses756; GCN-O1-OPTS-NEXT: SI Final Branch Preparation757; GCN-O1-OPTS-NEXT: SI peephole optimizations758; GCN-O1-OPTS-NEXT: Post RA hazard recognizer759; GCN-O1-OPTS-NEXT: AMDGPU Insert waits for SGPR read hazards760; GCN-O1-OPTS-NEXT: AMDGPU Lower VGPR Encoding761; GCN-O1-OPTS-NEXT: AMDGPU Insert Delay ALU762; GCN-O1-OPTS-NEXT: Branch relaxation pass763; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass764; GCN-O1-OPTS-NEXT: Remove Loads Into Fake Uses765; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis766; GCN-O1-OPTS-NEXT: Machine Sanitizer Binary Metadata767; GCN-O1-OPTS-NEXT: AMDGPU Preload Kernel Arguments Prolog768; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis769; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter770; GCN-O1-OPTS-NEXT: Stack Frame Layout Analysis771; GCN-O1-OPTS-NEXT: Function register usage analysis772; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer773; GCN-O1-OPTS-NEXT: Free MachineFunction774 775; GCN-O2:Target Library Information776; GCN-O2-NEXT:Target Pass Configuration777; GCN-O2-NEXT:Machine Module Information778; GCN-O2-NEXT:Target Transform Information779; GCN-O2-NEXT:Assumption Cache Tracker780; GCN-O2-NEXT:Profile summary info781; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis782; GCN-O2-NEXT:External Alias Analysis783; GCN-O2-NEXT:Type-Based Alias Analysis784; GCN-O2-NEXT:Scoped NoAlias Alias Analysis785; GCN-O2-NEXT:Argument Register Usage Information Storage786; GCN-O2-NEXT:Create Garbage Collector Module Metadata787; GCN-O2-NEXT:Machine Branch Probability Analysis788; GCN-O2-NEXT:Register Usage Information Storage789; GCN-O2-NEXT:Default Regalloc Eviction Advisor790; GCN-O2-NEXT:Default Regalloc Priority Advisor791; GCN-O2-NEXT: ModulePass Manager792; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering793; GCN-O2-NEXT: FunctionPass Manager794; GCN-O2-NEXT: Expand large div/rem795; GCN-O2-NEXT: Expand fp796; GCN-O2-NEXT: AMDGPU Remove Incompatible Functions797; GCN-O2-NEXT: AMDGPU Printf lowering798; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU799; GCN-O2-NEXT: FunctionPass Manager800; GCN-O2-NEXT: AMDGPU Image Intrinsic Optimizer801; GCN-O2-NEXT: Dominator Tree Construction802; GCN-O2-NEXT: Cycle Info Analysis803; GCN-O2-NEXT: Uniformity Analysis804; GCN-O2-NEXT: AMDGPU Uniform Intrinsic Combine805; GCN-O2-NEXT: Expand variadic functions806; GCN-O2-NEXT: AMDGPU Inline All Functions807; GCN-O2-NEXT: Inliner for always_inline functions808; GCN-O2-NEXT: FunctionPass Manager809; GCN-O2-NEXT: Dominator Tree Construction810; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)811; GCN-O2-NEXT: Function Alias Analysis Results812; GCN-O2-NEXT: Externalize enqueued block runtime handles813; GCN-O2-NEXT: AMDGPU lowering of execution synchronization814; GCN-O2-NEXT: AMDGPU Software lowering of LDS815; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions816; GCN-O2-NEXT: FunctionPass Manager817; GCN-O2-NEXT: Dominator Tree Construction818; GCN-O2-NEXT: Cycle Info Analysis819; GCN-O2-NEXT: Uniformity Analysis820; GCN-O2-NEXT: AMDGPU atomic optimizations821; GCN-O2-NEXT: Expand Atomic instructions822; GCN-O2-NEXT: Dominator Tree Construction823; GCN-O2-NEXT: Natural Loop Information824; GCN-O2-NEXT: AMDGPU Promote Alloca825; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE826; GCN-O2-NEXT: Scalar Evolution Analysis827; GCN-O2-NEXT: Straight line strength reduction828; GCN-O2-NEXT: Early CSE829; GCN-O2-NEXT: Scalar Evolution Analysis830; GCN-O2-NEXT: Nary reassociation831; GCN-O2-NEXT: Early CSE832; GCN-O2-NEXT: Cycle Info Analysis833; GCN-O2-NEXT: Uniformity Analysis834; GCN-O2-NEXT: AMDGPU IR optimizations835; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)836; GCN-O2-NEXT: Function Alias Analysis Results837; GCN-O2-NEXT: Memory SSA838; GCN-O2-NEXT: Canonicalize natural loops839; GCN-O2-NEXT: LCSSA Verifier840; GCN-O2-NEXT: Loop-Closed SSA Form Pass841; GCN-O2-NEXT: Scalar Evolution Analysis842; GCN-O2-NEXT: Lazy Branch Probability Analysis843; GCN-O2-NEXT: Lazy Block Frequency Analysis844; GCN-O2-NEXT: Loop Pass Manager845; GCN-O2-NEXT: Loop Invariant Code Motion846; GCN-O2-NEXT: Loop Pass Manager847; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops848; GCN-O2-NEXT: Induction Variable Users849; GCN-O2-NEXT: Loop Strength Reduction850; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)851; GCN-O2-NEXT: Function Alias Analysis Results852; GCN-O2-NEXT: Merge contiguous icmps into a memcmp853; GCN-O2-NEXT: Natural Loop Information854; GCN-O2-NEXT: Lazy Branch Probability Analysis855; GCN-O2-NEXT: Lazy Block Frequency Analysis856; GCN-O2-NEXT: Expand memcmp() to load/stores857; GCN-O2-NEXT: Remove unreachable blocks from the CFG858; GCN-O2-NEXT: Natural Loop Information859; GCN-O2-NEXT: Post-Dominator Tree Construction860; GCN-O2-NEXT: Branch Probability Analysis861; GCN-O2-NEXT: Block Frequency Analysis862; GCN-O2-NEXT: Constant Hoisting863; GCN-O2-NEXT: Replace intrinsics with calls to vector library864; GCN-O2-NEXT: Lazy Branch Probability Analysis865; GCN-O2-NEXT: Lazy Block Frequency Analysis866; GCN-O2-NEXT: Optimization Remark Emitter867; GCN-O2-NEXT: Partially inline calls to library functions868; GCN-O2-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)869; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics870; GCN-O2-NEXT: Expand reduction intrinsics871; GCN-O2-NEXT: Early CSE872; GCN-O2-NEXT: AMDGPU Preload Kernel Arguments873; GCN-O2-NEXT: FunctionPass Manager874; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments875; GCN-O2-NEXT: Dominator Tree Construction876; GCN-O2-NEXT: Natural Loop Information877; GCN-O2-NEXT: CodeGen Prepare878; GCN-O2-NEXT: Dominator Tree Construction879; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)880; GCN-O2-NEXT: Function Alias Analysis Results881; GCN-O2-NEXT: Natural Loop Information882; GCN-O2-NEXT: Scalar Evolution Analysis883; GCN-O2-NEXT: GPU Load and Store Vectorizer884; GCN-O2-NEXT: Lower buffer fat pointer operations to buffer resources885; GCN-O2-NEXT: AMDGPU lower intrinsics886; GCN-O2-NEXT: FunctionPass Manager887; GCN-O2-NEXT: Lazy Value Information Analysis888; GCN-O2-NEXT: Lower SwitchInst's to branches889; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators890; GCN-O2-NEXT: Remove unreachable blocks from the CFG891; GCN-O2-NEXT: Dominator Tree Construction892; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)893; GCN-O2-NEXT: Function Alias Analysis Results894; GCN-O2-NEXT: Flatten the CFG895; GCN-O2-NEXT: Dominator Tree Construction896; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)897; GCN-O2-NEXT: Function Alias Analysis Results898; GCN-O2-NEXT: Natural Loop Information899; GCN-O2-NEXT: Code sinking900; GCN-O2-NEXT: Cycle Info Analysis901; GCN-O2-NEXT: Uniformity Analysis902; GCN-O2-NEXT: AMDGPU IR late optimizations903; GCN-O2-NEXT: Post-Dominator Tree Construction904; GCN-O2-NEXT: Uniformity Analysis905; GCN-O2-NEXT: Unify divergent function exit nodes906; GCN-O2-NEXT: Dominator Tree Construction907; GCN-O2-NEXT: Cycle Info Analysis908; GCN-O2-NEXT: Convert irreducible control-flow into natural loops909; GCN-O2-NEXT: Natural Loop Information910; GCN-O2-NEXT: Fixup each natural loop to have a single exit block911; GCN-O2-NEXT: Post-Dominator Tree Construction912; GCN-O2-NEXT: Dominance Frontier Construction913; GCN-O2-NEXT: Detect single entry single exit regions914; GCN-O2-NEXT: Region Pass Manager915; GCN-O2-NEXT: Structurize control flow916; GCN-O2-NEXT: Cycle Info Analysis917; GCN-O2-NEXT: Uniformity Analysis918; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)919; GCN-O2-NEXT: Function Alias Analysis Results920; GCN-O2-NEXT: Memory SSA921; GCN-O2-NEXT: AMDGPU Annotate Uniform Values922; GCN-O2-NEXT: Natural Loop Information923; GCN-O2-NEXT: SI annotate control flow924; GCN-O2-NEXT: Cycle Info Analysis925; GCN-O2-NEXT: Uniformity Analysis926; GCN-O2-NEXT: AMDGPU Rewrite Undef for PHI927; GCN-O2-NEXT: LCSSA Verifier928; GCN-O2-NEXT: Loop-Closed SSA Form Pass929; GCN-O2-NEXT: CallGraph Construction930; GCN-O2-NEXT: Call Graph SCC Pass Manager931; GCN-O2-NEXT: Analysis if a function is memory bound932; GCN-O2-NEXT: DummyCGSCCPass933; GCN-O2-NEXT: FunctionPass Manager934; GCN-O2-NEXT: Dominator Tree Construction935; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)936; GCN-O2-NEXT: Function Alias Analysis Results937; GCN-O2-NEXT: ObjC ARC contraction938; GCN-O2-NEXT: Prepare callbr939; GCN-O2-NEXT: Safe Stack instrumentation pass940; GCN-O2-NEXT: Insert stack protectors941; GCN-O2-NEXT: Cycle Info Analysis942; GCN-O2-NEXT: Uniformity Analysis943; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)944; GCN-O2-NEXT: Function Alias Analysis Results945; GCN-O2-NEXT: Natural Loop Information946; GCN-O2-NEXT: Post-Dominator Tree Construction947; GCN-O2-NEXT: Branch Probability Analysis948; GCN-O2-NEXT: Assignment Tracking Analysis949; GCN-O2-NEXT: Lazy Branch Probability Analysis950; GCN-O2-NEXT: Lazy Block Frequency Analysis951; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection952; GCN-O2-NEXT: MachineDominator Tree Construction953; GCN-O2-NEXT: SI Fix SGPR copies954; GCN-O2-NEXT: MachinePostDominator Tree Construction955; GCN-O2-NEXT: SI Lower i1 Copies956; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions957; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis958; GCN-O2-NEXT: Early Tail Duplication959; GCN-O2-NEXT: Optimize machine instruction PHIs960; GCN-O2-NEXT: Slot index numbering961; GCN-O2-NEXT: Merge disjoint stack slots962; GCN-O2-NEXT: Local Stack Slot Allocation963; GCN-O2-NEXT: Remove dead machine instructions964; GCN-O2-NEXT: MachineDominator Tree Construction965; GCN-O2-NEXT: Machine Natural Loop Construction966; GCN-O2-NEXT: Machine Block Frequency Analysis967; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion968; GCN-O2-NEXT: MachineDominator Tree Construction969; GCN-O2-NEXT: Machine Block Frequency Analysis970; GCN-O2-NEXT: Machine Common Subexpression Elimination971; GCN-O2-NEXT: MachinePostDominator Tree Construction972; GCN-O2-NEXT: Machine Cycle Info Analysis973; GCN-O2-NEXT: Machine code sinking974; GCN-O2-NEXT: Peephole Optimizations975; GCN-O2-NEXT: Remove dead machine instructions976; GCN-O2-NEXT: SI Fold Operands977; GCN-O2-NEXT: GCN DPP Combine978; GCN-O2-NEXT: SI Load Store Optimizer979; GCN-O2-NEXT: SI Peephole SDWA980; GCN-O2-NEXT: Machine Block Frequency Analysis981; GCN-O2-NEXT: MachineDominator Tree Construction982; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion983; GCN-O2-NEXT: MachineDominator Tree Construction984; GCN-O2-NEXT: Machine Block Frequency Analysis985; GCN-O2-NEXT: Machine Common Subexpression Elimination986; GCN-O2-NEXT: SI Fold Operands987; GCN-O2-NEXT: Remove dead machine instructions988; GCN-O2-NEXT: SI Shrink Instructions989; GCN-O2-NEXT: Register Usage Information Propagation990; GCN-O2-NEXT: AMDGPU Prepare AGPR Alloc991; GCN-O2-NEXT: Detect Dead Lanes992; GCN-O2-NEXT: Remove dead machine instructions993; GCN-O2-NEXT: Init Undef Pass994; GCN-O2-NEXT: Process Implicit Definitions995; GCN-O2-NEXT: Remove unreachable machine basic blocks996; GCN-O2-NEXT: Live Variable Analysis997; GCN-O2-NEXT: SI Optimize VGPR LiveRange998; GCN-O2-NEXT: Eliminate PHI nodes for register allocation999; GCN-O2-NEXT: SI Lower control flow pseudo instructions1000; GCN-O2-NEXT: Two-Address instruction pass1001; GCN-O2-NEXT: Slot index numbering1002; GCN-O2-NEXT: Live Interval Analysis1003; GCN-O2-NEXT: Machine Natural Loop Construction1004; GCN-O2-NEXT: Register Coalescer1005; GCN-O2-NEXT: Rename Disconnected Subregister Components1006; GCN-O2-NEXT: Rewrite Partial Register Uses1007; GCN-O2-NEXT: Machine Instruction Scheduler1008; GCN-O2-NEXT: AMDGPU Pre-RA optimizations1009; GCN-O2-NEXT: SI Whole Quad Mode1010; GCN-O2-NEXT: SI optimize exec mask operations pre-RA1011; GCN-O2-NEXT: SI Form memory clauses1012; GCN-O2-NEXT: AMDGPU Pre-RA Long Branch Reg1013; GCN-O2-NEXT: Machine Natural Loop Construction1014; GCN-O2-NEXT: Machine Block Frequency Analysis1015; GCN-O2-NEXT: Debug Variable Analysis1016; GCN-O2-NEXT: Live Stack Slot Analysis1017; GCN-O2-NEXT: Virtual Register Map1018; GCN-O2-NEXT: Live Register Matrix1019; GCN-O2-NEXT: Bundle Machine CFG Edges1020; GCN-O2-NEXT: Spill Code Placement Analysis1021; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis1022; GCN-O2-NEXT: Machine Optimization Remark Emitter1023; GCN-O2-NEXT: Greedy Register Allocator1024; GCN-O2-NEXT: Virtual Register Rewriter1025; GCN-O2-NEXT: Stack Slot Coloring1026; GCN-O2-NEXT: SI lower SGPR spill instructions1027; GCN-O2-NEXT: Virtual Register Map1028; GCN-O2-NEXT: Live Register Matrix1029; GCN-O2-NEXT: SI Pre-allocate WWM Registers1030; GCN-O2-NEXT: Live Stack Slot Analysis1031; GCN-O2-NEXT: Greedy Register Allocator1032; GCN-O2-NEXT: SI Lower WWM Copies1033; GCN-O2-NEXT: Virtual Register Rewriter1034; GCN-O2-NEXT: AMDGPU Reserve WWM Registers1035; GCN-O2-NEXT: Virtual Register Map1036; GCN-O2-NEXT: Live Register Matrix1037; GCN-O2-NEXT: Greedy Register Allocator1038; GCN-O2-NEXT: GCN NSA Reassign1039; GCN-O2-NEXT: AMDGPU Rewrite AGPR-Copy-MFMA1040; GCN-O2-NEXT: Virtual Register Rewriter1041; GCN-O2-NEXT: AMDGPU Mark Last Scratch Load1042; GCN-O2-NEXT: Stack Slot Coloring1043; GCN-O2-NEXT: Machine Copy Propagation Pass1044; GCN-O2-NEXT: Machine Loop Invariant Code Motion1045; GCN-O2-NEXT: SI Fix VGPR copies1046; GCN-O2-NEXT: SI optimize exec mask operations1047; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis1048; GCN-O2-NEXT: Fixup Statepoint Caller Saved1049; GCN-O2-NEXT: PostRA Machine Sink1050; GCN-O2-NEXT: Machine Block Frequency Analysis1051; GCN-O2-NEXT: MachineDominator Tree Construction1052; GCN-O2-NEXT: MachinePostDominator Tree Construction1053; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis1054; GCN-O2-NEXT: Machine Optimization Remark Emitter1055; GCN-O2-NEXT: Shrink Wrapping analysis1056; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization1057; GCN-O2-NEXT: Machine Late Instructions Cleanup Pass1058; GCN-O2-NEXT: Control Flow Optimizer1059; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis1060; GCN-O2-NEXT: Tail Duplication1061; GCN-O2-NEXT: Machine Copy Propagation Pass1062; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass1063; GCN-O2-NEXT: SI Shrink Instructions1064; GCN-O2-NEXT: SI post-RA bundler1065; GCN-O2-NEXT: MachineDominator Tree Construction1066; GCN-O2-NEXT: Machine Natural Loop Construction1067; GCN-O2-NEXT: PostRA Machine Instruction Scheduler1068; GCN-O2-NEXT: Machine Block Frequency Analysis1069; GCN-O2-NEXT: MachinePostDominator Tree Construction1070; GCN-O2-NEXT: Branch Probability Basic Block Placement1071; GCN-O2-NEXT: Insert fentry calls1072; GCN-O2-NEXT: Insert XRay ops1073; GCN-O2-NEXT: GCN Create VOPD Instructions1074; GCN-O2-NEXT: SI Memory Legalizer1075; GCN-O2-NEXT: MachineDominator Tree Construction1076; GCN-O2-NEXT: Machine Natural Loop Construction1077; GCN-O2-NEXT: MachinePostDominator Tree Construction1078; GCN-O2-NEXT: SI insert wait instructions1079; GCN-O2-NEXT: Insert required mode register values1080; GCN-O2-NEXT: SI Insert Hard Clauses1081; GCN-O2-NEXT: SI Final Branch Preparation1082; GCN-O2-NEXT: SI peephole optimizations1083; GCN-O2-NEXT: Post RA hazard recognizer1084; GCN-O2-NEXT: AMDGPU Insert waits for SGPR read hazards1085; GCN-O2-NEXT: AMDGPU Lower VGPR Encoding1086; GCN-O2-NEXT: AMDGPU Insert Delay ALU1087; GCN-O2-NEXT: Branch relaxation pass1088; GCN-O2-NEXT: Register Usage Information Collector Pass1089; GCN-O2-NEXT: Remove Loads Into Fake Uses1090; GCN-O2-NEXT: Live DEBUG_VALUE analysis1091; GCN-O2-NEXT: Machine Sanitizer Binary Metadata1092; GCN-O2-NEXT: AMDGPU Preload Kernel Arguments Prolog1093; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis1094; GCN-O2-NEXT: Machine Optimization Remark Emitter1095; GCN-O2-NEXT: Stack Frame Layout Analysis1096; GCN-O2-NEXT: Function register usage analysis1097; GCN-O2-NEXT: AMDGPU Assembly Printer1098; GCN-O2-NEXT: Free MachineFunction1099 1100; GCN-O3:Target Library Information1101; GCN-O3-NEXT:Target Pass Configuration1102; GCN-O3-NEXT:Machine Module Information1103; GCN-O3-NEXT:Target Transform Information1104; GCN-O3-NEXT:Assumption Cache Tracker1105; GCN-O3-NEXT:Profile summary info1106; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis1107; GCN-O3-NEXT:External Alias Analysis1108; GCN-O3-NEXT:Type-Based Alias Analysis1109; GCN-O3-NEXT:Scoped NoAlias Alias Analysis1110; GCN-O3-NEXT:Argument Register Usage Information Storage1111; GCN-O3-NEXT:Create Garbage Collector Module Metadata1112; GCN-O3-NEXT:Machine Branch Probability Analysis1113; GCN-O3-NEXT:Register Usage Information Storage1114; GCN-O3-NEXT:Default Regalloc Eviction Advisor1115; GCN-O3-NEXT:Default Regalloc Priority Advisor1116; GCN-O3-NEXT: ModulePass Manager1117; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering1118; GCN-O3-NEXT: FunctionPass Manager1119; GCN-O3-NEXT: Expand large div/rem1120; GCN-O3-NEXT: Expand fp1121; GCN-O3-NEXT: AMDGPU Remove Incompatible Functions1122; GCN-O3-NEXT: AMDGPU Printf lowering1123; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU1124; GCN-O3-NEXT: FunctionPass Manager1125; GCN-O3-NEXT: AMDGPU Image Intrinsic Optimizer1126; GCN-O3-NEXT: Dominator Tree Construction1127; GCN-O3-NEXT: Cycle Info Analysis1128; GCN-O3-NEXT: Uniformity Analysis1129; GCN-O3-NEXT: AMDGPU Uniform Intrinsic Combine1130; GCN-O3-NEXT: Expand variadic functions1131; GCN-O3-NEXT: AMDGPU Inline All Functions1132; GCN-O3-NEXT: Inliner for always_inline functions1133; GCN-O3-NEXT: FunctionPass Manager1134; GCN-O3-NEXT: Dominator Tree Construction1135; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1136; GCN-O3-NEXT: Function Alias Analysis Results1137; GCN-O3-NEXT: Externalize enqueued block runtime handles1138; GCN-O3-NEXT: AMDGPU lowering of execution synchronization1139; GCN-O3-NEXT: AMDGPU Software lowering of LDS1140; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions1141; GCN-O3-NEXT: FunctionPass Manager1142; GCN-O3-NEXT: Dominator Tree Construction1143; GCN-O3-NEXT: Cycle Info Analysis1144; GCN-O3-NEXT: Uniformity Analysis1145; GCN-O3-NEXT: AMDGPU atomic optimizations1146; GCN-O3-NEXT: Expand Atomic instructions1147; GCN-O3-NEXT: Dominator Tree Construction1148; GCN-O3-NEXT: Natural Loop Information1149; GCN-O3-NEXT: AMDGPU Promote Alloca1150; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE1151; GCN-O3-NEXT: Scalar Evolution Analysis1152; GCN-O3-NEXT: Straight line strength reduction1153; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1154; GCN-O3-NEXT: Function Alias Analysis Results1155; GCN-O3-NEXT: Memory Dependence Analysis1156; GCN-O3-NEXT: Lazy Branch Probability Analysis1157; GCN-O3-NEXT: Lazy Block Frequency Analysis1158; GCN-O3-NEXT: Optimization Remark Emitter1159; GCN-O3-NEXT: Global Value Numbering1160; GCN-O3-NEXT: Scalar Evolution Analysis1161; GCN-O3-NEXT: Nary reassociation1162; GCN-O3-NEXT: Early CSE1163; GCN-O3-NEXT: Cycle Info Analysis1164; GCN-O3-NEXT: Uniformity Analysis1165; GCN-O3-NEXT: AMDGPU IR optimizations1166; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1167; GCN-O3-NEXT: Function Alias Analysis Results1168; GCN-O3-NEXT: Memory SSA1169; GCN-O3-NEXT: Canonicalize natural loops1170; GCN-O3-NEXT: LCSSA Verifier1171; GCN-O3-NEXT: Loop-Closed SSA Form Pass1172; GCN-O3-NEXT: Scalar Evolution Analysis1173; GCN-O3-NEXT: Lazy Branch Probability Analysis1174; GCN-O3-NEXT: Lazy Block Frequency Analysis1175; GCN-O3-NEXT: Loop Pass Manager1176; GCN-O3-NEXT: Loop Invariant Code Motion1177; GCN-O3-NEXT: Loop Pass Manager1178; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops1179; GCN-O3-NEXT: Induction Variable Users1180; GCN-O3-NEXT: Loop Strength Reduction1181; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1182; GCN-O3-NEXT: Function Alias Analysis Results1183; GCN-O3-NEXT: Merge contiguous icmps into a memcmp1184; GCN-O3-NEXT: Natural Loop Information1185; GCN-O3-NEXT: Lazy Branch Probability Analysis1186; GCN-O3-NEXT: Lazy Block Frequency Analysis1187; GCN-O3-NEXT: Expand memcmp() to load/stores1188; GCN-O3-NEXT: Remove unreachable blocks from the CFG1189; GCN-O3-NEXT: Natural Loop Information1190; GCN-O3-NEXT: Post-Dominator Tree Construction1191; GCN-O3-NEXT: Branch Probability Analysis1192; GCN-O3-NEXT: Block Frequency Analysis1193; GCN-O3-NEXT: Constant Hoisting1194; GCN-O3-NEXT: Replace intrinsics with calls to vector library1195; GCN-O3-NEXT: Lazy Branch Probability Analysis1196; GCN-O3-NEXT: Lazy Block Frequency Analysis1197; GCN-O3-NEXT: Optimization Remark Emitter1198; GCN-O3-NEXT: Partially inline calls to library functions1199; GCN-O3-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)1200; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics1201; GCN-O3-NEXT: Expand reduction intrinsics1202; GCN-O3-NEXT: Natural Loop Information1203; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1204; GCN-O3-NEXT: Function Alias Analysis Results1205; GCN-O3-NEXT: Memory Dependence Analysis1206; GCN-O3-NEXT: Lazy Branch Probability Analysis1207; GCN-O3-NEXT: Lazy Block Frequency Analysis1208; GCN-O3-NEXT: Optimization Remark Emitter1209; GCN-O3-NEXT: Global Value Numbering1210; GCN-O3-NEXT: AMDGPU Preload Kernel Arguments1211; GCN-O3-NEXT: FunctionPass Manager1212; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments1213; GCN-O3-NEXT: Dominator Tree Construction1214; GCN-O3-NEXT: Natural Loop Information1215; GCN-O3-NEXT: CodeGen Prepare1216; GCN-O3-NEXT: Dominator Tree Construction1217; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1218; GCN-O3-NEXT: Function Alias Analysis Results1219; GCN-O3-NEXT: Natural Loop Information1220; GCN-O3-NEXT: Scalar Evolution Analysis1221; GCN-O3-NEXT: GPU Load and Store Vectorizer1222; GCN-O3-NEXT: Lower buffer fat pointer operations to buffer resources1223; GCN-O3-NEXT: AMDGPU lower intrinsics1224; GCN-O3-NEXT: FunctionPass Manager1225; GCN-O3-NEXT: Lazy Value Information Analysis1226; GCN-O3-NEXT: Lower SwitchInst's to branches1227; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators1228; GCN-O3-NEXT: Remove unreachable blocks from the CFG1229; GCN-O3-NEXT: Dominator Tree Construction1230; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1231; GCN-O3-NEXT: Function Alias Analysis Results1232; GCN-O3-NEXT: Flatten the CFG1233; GCN-O3-NEXT: Dominator Tree Construction1234; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1235; GCN-O3-NEXT: Function Alias Analysis Results1236; GCN-O3-NEXT: Natural Loop Information1237; GCN-O3-NEXT: Code sinking1238; GCN-O3-NEXT: Cycle Info Analysis1239; GCN-O3-NEXT: Uniformity Analysis1240; GCN-O3-NEXT: AMDGPU IR late optimizations1241; GCN-O3-NEXT: Post-Dominator Tree Construction1242; GCN-O3-NEXT: Uniformity Analysis1243; GCN-O3-NEXT: Unify divergent function exit nodes1244; GCN-O3-NEXT: Dominator Tree Construction1245; GCN-O3-NEXT: Cycle Info Analysis1246; GCN-O3-NEXT: Convert irreducible control-flow into natural loops1247; GCN-O3-NEXT: Natural Loop Information1248; GCN-O3-NEXT: Fixup each natural loop to have a single exit block1249; GCN-O3-NEXT: Post-Dominator Tree Construction1250; GCN-O3-NEXT: Dominance Frontier Construction1251; GCN-O3-NEXT: Detect single entry single exit regions1252; GCN-O3-NEXT: Region Pass Manager1253; GCN-O3-NEXT: Structurize control flow1254; GCN-O3-NEXT: Cycle Info Analysis1255; GCN-O3-NEXT: Uniformity Analysis1256; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1257; GCN-O3-NEXT: Function Alias Analysis Results1258; GCN-O3-NEXT: Memory SSA1259; GCN-O3-NEXT: AMDGPU Annotate Uniform Values1260; GCN-O3-NEXT: Natural Loop Information1261; GCN-O3-NEXT: SI annotate control flow1262; GCN-O3-NEXT: Cycle Info Analysis1263; GCN-O3-NEXT: Uniformity Analysis1264; GCN-O3-NEXT: AMDGPU Rewrite Undef for PHI1265; GCN-O3-NEXT: LCSSA Verifier1266; GCN-O3-NEXT: Loop-Closed SSA Form Pass1267; GCN-O3-NEXT: CallGraph Construction1268; GCN-O3-NEXT: Call Graph SCC Pass Manager1269; GCN-O3-NEXT: Analysis if a function is memory bound1270; GCN-O3-NEXT: DummyCGSCCPass1271; GCN-O3-NEXT: FunctionPass Manager1272; GCN-O3-NEXT: Dominator Tree Construction1273; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1274; GCN-O3-NEXT: Function Alias Analysis Results1275; GCN-O3-NEXT: ObjC ARC contraction1276; GCN-O3-NEXT: Prepare callbr1277; GCN-O3-NEXT: Safe Stack instrumentation pass1278; GCN-O3-NEXT: Insert stack protectors1279; GCN-O3-NEXT: Cycle Info Analysis1280; GCN-O3-NEXT: Uniformity Analysis1281; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)1282; GCN-O3-NEXT: Function Alias Analysis Results1283; GCN-O3-NEXT: Natural Loop Information1284; GCN-O3-NEXT: Post-Dominator Tree Construction1285; GCN-O3-NEXT: Branch Probability Analysis1286; GCN-O3-NEXT: Assignment Tracking Analysis1287; GCN-O3-NEXT: Lazy Branch Probability Analysis1288; GCN-O3-NEXT: Lazy Block Frequency Analysis1289; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection1290; GCN-O3-NEXT: MachineDominator Tree Construction1291; GCN-O3-NEXT: SI Fix SGPR copies1292; GCN-O3-NEXT: MachinePostDominator Tree Construction1293; GCN-O3-NEXT: SI Lower i1 Copies1294; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions1295; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis1296; GCN-O3-NEXT: Early Tail Duplication1297; GCN-O3-NEXT: Optimize machine instruction PHIs1298; GCN-O3-NEXT: Slot index numbering1299; GCN-O3-NEXT: Merge disjoint stack slots1300; GCN-O3-NEXT: Local Stack Slot Allocation1301; GCN-O3-NEXT: Remove dead machine instructions1302; GCN-O3-NEXT: MachineDominator Tree Construction1303; GCN-O3-NEXT: Machine Natural Loop Construction1304; GCN-O3-NEXT: Machine Block Frequency Analysis1305; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion1306; GCN-O3-NEXT: MachineDominator Tree Construction1307; GCN-O3-NEXT: Machine Block Frequency Analysis1308; GCN-O3-NEXT: Machine Common Subexpression Elimination1309; GCN-O3-NEXT: MachinePostDominator Tree Construction1310; GCN-O3-NEXT: Machine Cycle Info Analysis1311; GCN-O3-NEXT: Machine code sinking1312; GCN-O3-NEXT: Peephole Optimizations1313; GCN-O3-NEXT: Remove dead machine instructions1314; GCN-O3-NEXT: SI Fold Operands1315; GCN-O3-NEXT: GCN DPP Combine1316; GCN-O3-NEXT: SI Load Store Optimizer1317; GCN-O3-NEXT: SI Peephole SDWA1318; GCN-O3-NEXT: Machine Block Frequency Analysis1319; GCN-O3-NEXT: MachineDominator Tree Construction1320; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion1321; GCN-O3-NEXT: MachineDominator Tree Construction1322; GCN-O3-NEXT: Machine Block Frequency Analysis1323; GCN-O3-NEXT: Machine Common Subexpression Elimination1324; GCN-O3-NEXT: SI Fold Operands1325; GCN-O3-NEXT: Remove dead machine instructions1326; GCN-O3-NEXT: SI Shrink Instructions1327; GCN-O3-NEXT: Register Usage Information Propagation1328; GCN-O3-NEXT: AMDGPU Prepare AGPR Alloc1329; GCN-O3-NEXT: Detect Dead Lanes1330; GCN-O3-NEXT: Remove dead machine instructions1331; GCN-O3-NEXT: Init Undef Pass1332; GCN-O3-NEXT: Process Implicit Definitions1333; GCN-O3-NEXT: Remove unreachable machine basic blocks1334; GCN-O3-NEXT: Live Variable Analysis1335; GCN-O3-NEXT: SI Optimize VGPR LiveRange1336; GCN-O3-NEXT: Eliminate PHI nodes for register allocation1337; GCN-O3-NEXT: SI Lower control flow pseudo instructions1338; GCN-O3-NEXT: Two-Address instruction pass1339; GCN-O3-NEXT: Slot index numbering1340; GCN-O3-NEXT: Live Interval Analysis1341; GCN-O3-NEXT: Machine Natural Loop Construction1342; GCN-O3-NEXT: Register Coalescer1343; GCN-O3-NEXT: Rename Disconnected Subregister Components1344; GCN-O3-NEXT: Rewrite Partial Register Uses1345; GCN-O3-NEXT: Machine Instruction Scheduler1346; GCN-O3-NEXT: AMDGPU Pre-RA optimizations1347; GCN-O3-NEXT: SI Whole Quad Mode1348; GCN-O3-NEXT: SI optimize exec mask operations pre-RA1349; GCN-O3-NEXT: SI Form memory clauses1350; GCN-O3-NEXT: AMDGPU Pre-RA Long Branch Reg1351; GCN-O3-NEXT: Machine Natural Loop Construction1352; GCN-O3-NEXT: Machine Block Frequency Analysis1353; GCN-O3-NEXT: Debug Variable Analysis1354; GCN-O3-NEXT: Live Stack Slot Analysis1355; GCN-O3-NEXT: Virtual Register Map1356; GCN-O3-NEXT: Live Register Matrix1357; GCN-O3-NEXT: Bundle Machine CFG Edges1358; GCN-O3-NEXT: Spill Code Placement Analysis1359; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis1360; GCN-O3-NEXT: Machine Optimization Remark Emitter1361; GCN-O3-NEXT: Greedy Register Allocator1362; GCN-O3-NEXT: Virtual Register Rewriter1363; GCN-O3-NEXT: Stack Slot Coloring1364; GCN-O3-NEXT: SI lower SGPR spill instructions1365; GCN-O3-NEXT: Virtual Register Map1366; GCN-O3-NEXT: Live Register Matrix1367; GCN-O3-NEXT: SI Pre-allocate WWM Registers1368; GCN-O3-NEXT: Live Stack Slot Analysis1369; GCN-O3-NEXT: Greedy Register Allocator1370; GCN-O3-NEXT: SI Lower WWM Copies1371; GCN-O3-NEXT: Virtual Register Rewriter1372; GCN-O3-NEXT: AMDGPU Reserve WWM Registers1373; GCN-O3-NEXT: Virtual Register Map1374; GCN-O3-NEXT: Live Register Matrix1375; GCN-O3-NEXT: Greedy Register Allocator1376; GCN-O3-NEXT: GCN NSA Reassign1377; GCN-O3-NEXT: AMDGPU Rewrite AGPR-Copy-MFMA1378; GCN-O3-NEXT: Virtual Register Rewriter1379; GCN-O3-NEXT: AMDGPU Mark Last Scratch Load1380; GCN-O3-NEXT: Stack Slot Coloring1381; GCN-O3-NEXT: Machine Copy Propagation Pass1382; GCN-O3-NEXT: Machine Loop Invariant Code Motion1383; GCN-O3-NEXT: SI Fix VGPR copies1384; GCN-O3-NEXT: SI optimize exec mask operations1385; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis1386; GCN-O3-NEXT: Fixup Statepoint Caller Saved1387; GCN-O3-NEXT: PostRA Machine Sink1388; GCN-O3-NEXT: Machine Block Frequency Analysis1389; GCN-O3-NEXT: MachineDominator Tree Construction1390; GCN-O3-NEXT: MachinePostDominator Tree Construction1391; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis1392; GCN-O3-NEXT: Machine Optimization Remark Emitter1393; GCN-O3-NEXT: Shrink Wrapping analysis1394; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization1395; GCN-O3-NEXT: Machine Late Instructions Cleanup Pass1396; GCN-O3-NEXT: Control Flow Optimizer1397; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis1398; GCN-O3-NEXT: Tail Duplication1399; GCN-O3-NEXT: Machine Copy Propagation Pass1400; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass1401; GCN-O3-NEXT: SI Shrink Instructions1402; GCN-O3-NEXT: SI post-RA bundler1403; GCN-O3-NEXT: MachineDominator Tree Construction1404; GCN-O3-NEXT: Machine Natural Loop Construction1405; GCN-O3-NEXT: PostRA Machine Instruction Scheduler1406; GCN-O3-NEXT: Machine Block Frequency Analysis1407; GCN-O3-NEXT: MachinePostDominator Tree Construction1408; GCN-O3-NEXT: Branch Probability Basic Block Placement1409; GCN-O3-NEXT: Insert fentry calls1410; GCN-O3-NEXT: Insert XRay ops1411; GCN-O3-NEXT: GCN Create VOPD Instructions1412; GCN-O3-NEXT: SI Memory Legalizer1413; GCN-O3-NEXT: MachineDominator Tree Construction1414; GCN-O3-NEXT: Machine Natural Loop Construction1415; GCN-O3-NEXT: MachinePostDominator Tree Construction1416; GCN-O3-NEXT: SI insert wait instructions1417; GCN-O3-NEXT: Insert required mode register values1418; GCN-O3-NEXT: SI Insert Hard Clauses1419; GCN-O3-NEXT: SI Final Branch Preparation1420; GCN-O3-NEXT: SI peephole optimizations1421; GCN-O3-NEXT: Post RA hazard recognizer1422; GCN-O3-NEXT: AMDGPU Insert waits for SGPR read hazards1423; GCN-O3-NEXT: AMDGPU Lower VGPR Encoding1424; GCN-O3-NEXT: AMDGPU Insert Delay ALU1425; GCN-O3-NEXT: Branch relaxation pass1426; GCN-O3-NEXT: Register Usage Information Collector Pass1427; GCN-O3-NEXT: Remove Loads Into Fake Uses1428; GCN-O3-NEXT: Live DEBUG_VALUE analysis1429; GCN-O3-NEXT: Machine Sanitizer Binary Metadata1430; GCN-O3-NEXT: AMDGPU Preload Kernel Arguments Prolog1431; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis1432; GCN-O3-NEXT: Machine Optimization Remark Emitter1433; GCN-O3-NEXT: Stack Frame Layout Analysis1434; GCN-O3-NEXT: Function register usage analysis1435; GCN-O3-NEXT: AMDGPU Assembly Printer1436; GCN-O3-NEXT: Free MachineFunction1437 1438define void @empty() {1439 ret void1440}1441