220 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck %s -check-prefix=GFX123 4define float @raw_buffer_atomic_cond_sub_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {5; GFX12-LABEL: raw_buffer_atomic_cond_sub_return:6; GFX12: ; %bb.0: ; %main_body7; GFX12-NEXT: s_wait_loadcnt_dscnt 0x08; GFX12-NEXT: s_wait_expcnt 0x09; GFX12-NEXT: s_wait_samplecnt 0x010; GFX12-NEXT: s_wait_bvhcnt 0x011; GFX12-NEXT: s_wait_kmcnt 0x012; GFX12-NEXT: v_mov_b32_e32 v0, s1613; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], null th:TH_ATOMIC_RETURN14; GFX12-NEXT: s_wait_loadcnt 0x015; GFX12-NEXT: s_setpc_b64 s[30:31]16main_body:17 %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)18 %r = bitcast i32 %orig to float19 ret float %r20}21 22define void @raw_buffer_atomic_cond_sub_no_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {23; GFX12-LABEL: raw_buffer_atomic_cond_sub_no_return:24; GFX12: ; %bb.0: ; %main_body25; GFX12-NEXT: s_wait_loadcnt_dscnt 0x026; GFX12-NEXT: s_wait_expcnt 0x027; GFX12-NEXT: s_wait_samplecnt 0x028; GFX12-NEXT: s_wait_bvhcnt 0x029; GFX12-NEXT: s_wait_kmcnt 0x030; GFX12-NEXT: v_mov_b32_e32 v0, s1631; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], null th:TH_ATOMIC_RETURN32; GFX12-NEXT: s_wait_loadcnt 0x033; GFX12-NEXT: s_setpc_b64 s[30:31]34main_body:35 %unused = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)36 ret void37}38 39define void @raw_buffer_atomic_cond_sub_no_return_forced(<4 x i32> inreg %rsrc, i32 inreg %data) #1 {40; GFX12-LABEL: raw_buffer_atomic_cond_sub_no_return_forced:41; GFX12: ; %bb.0: ; %main_body42; GFX12-NEXT: s_wait_loadcnt_dscnt 0x043; GFX12-NEXT: s_wait_expcnt 0x044; GFX12-NEXT: s_wait_samplecnt 0x045; GFX12-NEXT: s_wait_bvhcnt 0x046; GFX12-NEXT: s_wait_kmcnt 0x047; GFX12-NEXT: v_mov_b32_e32 v0, s1648; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], null49; GFX12-NEXT: s_setpc_b64 s[30:31]50main_body:51 %unused = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)52 ret void53}54 55define float @raw_buffer_atomic_cond_sub_imm_soff_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {56; GFX12-LABEL: raw_buffer_atomic_cond_sub_imm_soff_return:57; GFX12: ; %bb.0: ; %main_body58; GFX12-NEXT: s_wait_loadcnt_dscnt 0x059; GFX12-NEXT: s_wait_expcnt 0x060; GFX12-NEXT: s_wait_samplecnt 0x061; GFX12-NEXT: s_wait_bvhcnt 0x062; GFX12-NEXT: s_wait_kmcnt 0x063; GFX12-NEXT: v_mov_b32_e32 v0, s1664; GFX12-NEXT: s_mov_b32 s4, 465; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], s4 th:TH_ATOMIC_RETURN66; GFX12-NEXT: s_wait_loadcnt 0x067; GFX12-NEXT: s_setpc_b64 s[30:31]68main_body:69 %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 4, i32 0)70 %r = bitcast i32 %orig to float71 ret float %r72}73 74define void @raw_buffer_atomic_cond_sub_imm_soff_no_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {75; GFX12-LABEL: raw_buffer_atomic_cond_sub_imm_soff_no_return:76; GFX12: ; %bb.0: ; %main_body77; GFX12-NEXT: s_wait_loadcnt_dscnt 0x078; GFX12-NEXT: s_wait_expcnt 0x079; GFX12-NEXT: s_wait_samplecnt 0x080; GFX12-NEXT: s_wait_bvhcnt 0x081; GFX12-NEXT: s_wait_kmcnt 0x082; GFX12-NEXT: v_mov_b32_e32 v0, s1683; GFX12-NEXT: s_mov_b32 s4, 484; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], s4 th:TH_ATOMIC_RETURN85; GFX12-NEXT: s_wait_loadcnt 0x086; GFX12-NEXT: s_setpc_b64 s[30:31]87main_body:88 %unused = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 4, i32 0)89 ret void90}91 92define void @raw_buffer_atomic_cond_sub_imm_soff_no_return_forced(<4 x i32> inreg %rsrc, i32 inreg %data) #1 {93; GFX12-LABEL: raw_buffer_atomic_cond_sub_imm_soff_no_return_forced:94; GFX12: ; %bb.0: ; %main_body95; GFX12-NEXT: s_wait_loadcnt_dscnt 0x096; GFX12-NEXT: s_wait_expcnt 0x097; GFX12-NEXT: s_wait_samplecnt 0x098; GFX12-NEXT: s_wait_bvhcnt 0x099; GFX12-NEXT: s_wait_kmcnt 0x0100; GFX12-NEXT: v_mov_b32_e32 v0, s16101; GFX12-NEXT: s_mov_b32 s4, 4102; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, off, s[0:3], s4103; GFX12-NEXT: s_setpc_b64 s[30:31]104main_body:105 %unused = call i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 4, i32 0)106 ret void107}108 109define float @struct_buffer_atomic_cond_sub_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {110; GFX12-LABEL: struct_buffer_atomic_cond_sub_return:111; GFX12: ; %bb.0: ; %main_body112; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0113; GFX12-NEXT: s_wait_expcnt 0x0114; GFX12-NEXT: s_wait_samplecnt 0x0115; GFX12-NEXT: s_wait_bvhcnt 0x0116; GFX12-NEXT: s_wait_kmcnt 0x0117; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s16118; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, v1, s[0:3], null idxen th:TH_ATOMIC_RETURN119; GFX12-NEXT: s_wait_loadcnt 0x0120; GFX12-NEXT: s_setpc_b64 s[30:31]121main_body:122 %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)123 %r = bitcast i32 %orig to float124 ret float %r125}126 127define void @struct_buffer_atomic_cond_sub_no_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {128; GFX12-LABEL: struct_buffer_atomic_cond_sub_no_return:129; GFX12: ; %bb.0: ; %main_body130; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0131; GFX12-NEXT: s_wait_expcnt 0x0132; GFX12-NEXT: s_wait_samplecnt 0x0133; GFX12-NEXT: s_wait_bvhcnt 0x0134; GFX12-NEXT: s_wait_kmcnt 0x0135; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s16136; GFX12-NEXT: buffer_atomic_cond_sub_u32 v1, v0, s[0:3], null idxen th:TH_ATOMIC_RETURN137; GFX12-NEXT: s_wait_loadcnt 0x0138; GFX12-NEXT: s_setpc_b64 s[30:31]139main_body:140 %unused = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)141 ret void142}143 144define void @struct_buffer_atomic_cond_sub_no_return_forced(<4 x i32> inreg %rsrc, i32 inreg %data) #1 {145; GFX12-LABEL: struct_buffer_atomic_cond_sub_no_return_forced:146; GFX12: ; %bb.0: ; %main_body147; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0148; GFX12-NEXT: s_wait_expcnt 0x0149; GFX12-NEXT: s_wait_samplecnt 0x0150; GFX12-NEXT: s_wait_bvhcnt 0x0151; GFX12-NEXT: s_wait_kmcnt 0x0152; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s16153; GFX12-NEXT: buffer_atomic_cond_sub_u32 v1, v0, s[0:3], null idxen154; GFX12-NEXT: s_setpc_b64 s[30:31]155main_body:156 %unused = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)157 ret void158}159 160define float @struct_buffer_atomic_cond_sub_imm_soff_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {161; GFX12-LABEL: struct_buffer_atomic_cond_sub_imm_soff_return:162; GFX12: ; %bb.0: ; %main_body163; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0164; GFX12-NEXT: s_wait_expcnt 0x0165; GFX12-NEXT: s_wait_samplecnt 0x0166; GFX12-NEXT: s_wait_bvhcnt 0x0167; GFX12-NEXT: s_wait_kmcnt 0x0168; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s16169; GFX12-NEXT: s_mov_b32 s4, 4170; GFX12-NEXT: buffer_atomic_cond_sub_u32 v0, v1, s[0:3], s4 idxen th:TH_ATOMIC_RETURN171; GFX12-NEXT: s_wait_loadcnt 0x0172; GFX12-NEXT: s_setpc_b64 s[30:31]173main_body:174 %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 4, i32 0)175 %r = bitcast i32 %orig to float176 ret float %r177}178 179define void @struct_buffer_atomic_cond_sub_imm_soff_no_return(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {180; GFX12-LABEL: struct_buffer_atomic_cond_sub_imm_soff_no_return:181; GFX12: ; %bb.0: ; %main_body182; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0183; GFX12-NEXT: s_wait_expcnt 0x0184; GFX12-NEXT: s_wait_samplecnt 0x0185; GFX12-NEXT: s_wait_bvhcnt 0x0186; GFX12-NEXT: s_wait_kmcnt 0x0187; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s16188; GFX12-NEXT: s_mov_b32 s4, 4189; GFX12-NEXT: buffer_atomic_cond_sub_u32 v1, v0, s[0:3], s4 idxen th:TH_ATOMIC_RETURN190; GFX12-NEXT: s_wait_loadcnt 0x0191; GFX12-NEXT: s_setpc_b64 s[30:31]192main_body:193 %unused = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 4, i32 0)194 ret void195}196 197define void @struct_buffer_atomic_cond_sub_imm_soff_no_return_forced(<4 x i32> inreg %rsrc, i32 inreg %data) #1 {198; GFX12-LABEL: struct_buffer_atomic_cond_sub_imm_soff_no_return_forced:199; GFX12: ; %bb.0: ; %main_body200; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0201; GFX12-NEXT: s_wait_expcnt 0x0202; GFX12-NEXT: s_wait_samplecnt 0x0203; GFX12-NEXT: s_wait_bvhcnt 0x0204; GFX12-NEXT: s_wait_kmcnt 0x0205; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s16206; GFX12-NEXT: s_mov_b32 s4, 4207; GFX12-NEXT: buffer_atomic_cond_sub_u32 v1, v0, s[0:3], s4 idxen208; GFX12-NEXT: s_setpc_b64 s[30:31]209main_body:210 %unused = call i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 4, i32 0)211 ret void212}213 214declare i32 @llvm.amdgcn.raw.buffer.atomic.cond.sub.u32.i32(i32, <4 x i32>, i32, i32, i32) #0215declare i32 @llvm.amdgcn.struct.buffer.atomic.cond.sub.u32.i32(i32, <4 x i32>, i32, i32, i32, i32) #0216 217attributes #0 = { nounwind }218attributes #1 = { nounwind "target-features"="+atomic-csub-no-rtn-insts" }219 220