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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-SDAG %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-SDAG %s4 5; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-GISEL %s6; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-GISEL %s7 8; this test has both gfx1250/1251 run lines to check availability of the intrinsic on both variants.9 10; test behavior with unsupported 'consume' and 'acq_rel' ordering11 12define i32 @test_load_consume(ptr noundef readonly %addr) {13; GCN-LABEL: test_load_consume:14; GCN: ; %bb.0: ; %entry15; GCN-NEXT: s_wait_loadcnt_dscnt 0x016; GCN-NEXT: s_wait_kmcnt 0x017; GCN-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS18; GCN-NEXT: s_wait_loadcnt_dscnt 0x019; GCN-NEXT: s_set_pc_i64 s[30:31]20entry:21 %0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 1, metadata !0)22 ret i32 %023}24 25define i32 @test_load_acqrel(ptr noundef readonly %addr) {26; GCN-LABEL: test_load_acqrel:27; GCN: ; %bb.0: ; %entry28; GCN-NEXT: s_wait_loadcnt_dscnt 0x029; GCN-NEXT: s_wait_kmcnt 0x030; GCN-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS31; GCN-NEXT: s_wait_loadcnt_dscnt 0x032; GCN-NEXT: s_set_pc_i64 s[30:31]33entry:34 %0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 4, metadata !0)35 ret i32 %036}37 38define void @test_store_acqrel(ptr noundef %addr, i32 noundef %val) {39; GCN-LABEL: test_store_acqrel:40; GCN: ; %bb.0: ; %entry41; GCN-NEXT: s_wait_loadcnt_dscnt 0x042; GCN-NEXT: s_wait_kmcnt 0x043; GCN-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS44; GCN-NEXT: s_wait_dscnt 0x045; GCN-NEXT: s_set_pc_i64 s[30:31]46entry:47 tail call void @llvm.amdgcn.cooperative.atomic.store.32x4B.p0(ptr %addr, i32 %val, i32 4, metadata !0)48 ret void49}50 51!0 = !{ !"" }52 53;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:54; GFX1250: {{.*}}55; GFX1250-GISEL: {{.*}}56; GFX1250-SDAG: {{.*}}57; GFX1251: {{.*}}58; GFX1251-GISEL: {{.*}}59; GFX1251-SDAG: {{.*}}60