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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc --global-isel=0 -mtriple=amdgcn -mcpu=tahiti %s -o - | FileCheck %s3; RUN: llc --global-isel=1 -mtriple=amdgcn -mcpu=tahiti %s -o - | FileCheck %s4; RUN: llc --global-isel=0 -mtriple=amdgcn -mcpu=tonga %s -o - | FileCheck %s5; RUN: llc --global-isel=1 -mtriple=amdgcn -mcpu=tonga %s -o - | FileCheck %s6; RUN: llc --global-isel=0 -mtriple=amdgcn -mcpu=gfx90a %s -o - | FileCheck %s7; RUN: llc --global-isel=1 -mtriple=amdgcn -mcpu=gfx90a %s -o - | FileCheck %s8 9declare float @llvm.amdgcn.cvt.off.f32.i4(i32)10 11define amdgpu_cs float @cvt_var(i32 %a) {12; CHECK-LABEL: cvt_var:13; CHECK: ; %bb.0:14; CHECK-NEXT: v_cvt_off_f32_i4_e32 v0, v015; CHECK-NEXT: ; return to shader part epilog16 %ret = call float @llvm.amdgcn.cvt.off.f32.i4(i32 %a)17 ret float %ret18}19 20define amdgpu_cs float @cvt_imm() {21; CHECK-LABEL: cvt_imm:22; CHECK: ; %bb.0:23; CHECK-NEXT: v_cvt_off_f32_i4_e32 v0, 424; CHECK-NEXT: ; return to shader part epilog25 %ret = call float @llvm.amdgcn.cvt.off.f32.i4(i32 4)26 ret float %ret27}28