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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn < %s | FileCheck %s -enable-var-scope -check-prefixes=GCN,SI3; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck %s -enable-var-scope -check-prefixes=GCN,VI4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -enable-var-scope -check-prefixes=GCN,GFX95; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck %s -enable-var-scope -check-prefixes=GFX106; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s -enable-var-scope -check-prefixes=GFX117 8define amdgpu_kernel void @s_cvt_pkrtz_v2f16_f32(ptr addrspace(1) %out, float %x, float %y) #0 {9; SI-LABEL: s_cvt_pkrtz_v2f16_f32:10; SI: ; %bb.0:11; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x912; SI-NEXT: s_mov_b32 s7, 0xf00013; SI-NEXT: s_mov_b32 s6, -114; SI-NEXT: s_waitcnt lgkmcnt(0)15; SI-NEXT: s_mov_b32 s4, s016; SI-NEXT: s_mov_b32 s5, s117; SI-NEXT: v_mov_b32_e32 v0, s318; SI-NEXT: v_cvt_pkrtz_f16_f32_e32 v0, s2, v019; SI-NEXT: buffer_store_dword v0, off, s[4:7], 020; SI-NEXT: s_endpgm21;22; VI-LABEL: s_cvt_pkrtz_v2f16_f32:23; VI: ; %bb.0:24; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2425; VI-NEXT: s_waitcnt lgkmcnt(0)26; VI-NEXT: v_mov_b32_e32 v0, s327; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, s2, v028; VI-NEXT: v_mov_b32_e32 v0, s029; VI-NEXT: v_mov_b32_e32 v1, s130; VI-NEXT: flat_store_dword v[0:1], v231; VI-NEXT: s_endpgm32;33; GFX9-LABEL: s_cvt_pkrtz_v2f16_f32:34; GFX9: ; %bb.0:35; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2436; GFX9-NEXT: v_mov_b32_e32 v0, 037; GFX9-NEXT: s_waitcnt lgkmcnt(0)38; GFX9-NEXT: v_mov_b32_e32 v1, s339; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, s2, v140; GFX9-NEXT: global_store_dword v0, v1, s[0:1]41; GFX9-NEXT: s_endpgm42;43; GFX10-LABEL: s_cvt_pkrtz_v2f16_f32:44; GFX10: ; %bb.0:45; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2446; GFX10-NEXT: v_mov_b32_e32 v0, 047; GFX10-NEXT: s_waitcnt lgkmcnt(0)48; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, s2, s349; GFX10-NEXT: global_store_dword v0, v1, s[0:1]50; GFX10-NEXT: s_endpgm51;52; GFX11-LABEL: s_cvt_pkrtz_v2f16_f32:53; GFX11: ; %bb.0:54; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2455; GFX11-NEXT: v_mov_b32_e32 v0, 056; GFX11-NEXT: s_waitcnt lgkmcnt(0)57; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, s2, s358; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]59; GFX11-NEXT: s_endpgm60 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %y)61 store <2 x half> %result, ptr addrspace(1) %out62 ret void63}64 65define amdgpu_kernel void @s_cvt_pkrtz_samereg_v2f16_f32(ptr addrspace(1) %out, float %x) #0 {66; SI-LABEL: s_cvt_pkrtz_samereg_v2f16_f32:67; SI: ; %bb.0:68; SI-NEXT: s_load_dword s6, s[4:5], 0xb69; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x970; SI-NEXT: s_mov_b32 s3, 0xf00071; SI-NEXT: s_mov_b32 s2, -172; SI-NEXT: s_waitcnt lgkmcnt(0)73; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v0, s6, s674; SI-NEXT: buffer_store_dword v0, off, s[0:3], 075; SI-NEXT: s_endpgm76;77; VI-LABEL: s_cvt_pkrtz_samereg_v2f16_f32:78; VI: ; %bb.0:79; VI-NEXT: s_load_dword s2, s[4:5], 0x2c80; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2481; VI-NEXT: s_waitcnt lgkmcnt(0)82; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, s2, s283; VI-NEXT: v_mov_b32_e32 v0, s084; VI-NEXT: v_mov_b32_e32 v1, s185; VI-NEXT: flat_store_dword v[0:1], v286; VI-NEXT: s_endpgm87;88; GFX9-LABEL: s_cvt_pkrtz_samereg_v2f16_f32:89; GFX9: ; %bb.0:90; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c91; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2492; GFX9-NEXT: v_mov_b32_e32 v0, 093; GFX9-NEXT: s_waitcnt lgkmcnt(0)94; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, s2, s295; GFX9-NEXT: global_store_dword v0, v1, s[0:1]96; GFX9-NEXT: s_endpgm97;98; GFX10-LABEL: s_cvt_pkrtz_samereg_v2f16_f32:99; GFX10: ; %bb.0:100; GFX10-NEXT: s_clause 0x1101; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c102; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24103; GFX10-NEXT: v_mov_b32_e32 v0, 0104; GFX10-NEXT: s_waitcnt lgkmcnt(0)105; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, s2, s2106; GFX10-NEXT: global_store_dword v0, v1, s[0:1]107; GFX10-NEXT: s_endpgm108;109; GFX11-LABEL: s_cvt_pkrtz_samereg_v2f16_f32:110; GFX11: ; %bb.0:111; GFX11-NEXT: s_clause 0x1112; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c113; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24114; GFX11-NEXT: v_mov_b32_e32 v0, 0115; GFX11-NEXT: s_waitcnt lgkmcnt(0)116; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, s2, s2117; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]118; GFX11-NEXT: s_endpgm119 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %x)120 store <2 x half> %result, ptr addrspace(1) %out121 ret void122}123 124define amdgpu_kernel void @s_cvt_pkrtz_undef_undef(ptr addrspace(1) %out) #0 {125; GCN-LABEL: s_cvt_pkrtz_undef_undef:126; GCN: ; %bb.0:127; GCN-NEXT: s_endpgm128;129; GFX10-LABEL: s_cvt_pkrtz_undef_undef:130; GFX10: ; %bb.0:131; GFX10-NEXT: s_endpgm132;133; GFX11-LABEL: s_cvt_pkrtz_undef_undef:134; GFX11: ; %bb.0:135; GFX11-NEXT: s_endpgm136 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float poison, float poison)137 store <2 x half> %result, ptr addrspace(1) %out138 ret void139}140 141define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {142; SI-LABEL: v_cvt_pkrtz_v2f16_f32:143; SI: ; %bb.0:144; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9145; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd146; SI-NEXT: s_mov_b32 s11, 0xf000147; SI-NEXT: s_mov_b32 s10, 0148; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0149; SI-NEXT: v_mov_b32_e32 v1, 0150; SI-NEXT: s_mov_b64 s[6:7], s[10:11]151; SI-NEXT: s_waitcnt lgkmcnt(0)152; SI-NEXT: s_mov_b64 s[8:9], s[2:3]153; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc154; SI-NEXT: s_waitcnt vmcnt(0)155; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 glc156; SI-NEXT: s_waitcnt vmcnt(0)157; SI-NEXT: s_mov_b64 s[2:3], s[10:11]158; SI-NEXT: v_cvt_pkrtz_f16_f32_e32 v2, v2, v3159; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64160; SI-NEXT: s_endpgm161;162; VI-LABEL: v_cvt_pkrtz_v2f16_f32:163; VI: ; %bb.0:164; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24165; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34166; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0167; VI-NEXT: s_waitcnt lgkmcnt(0)168; VI-NEXT: v_mov_b32_e32 v1, s3169; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4170; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc171; VI-NEXT: v_mov_b32_e32 v3, s5172; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4173; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc174; VI-NEXT: flat_load_dword v5, v[0:1] glc175; VI-NEXT: s_waitcnt vmcnt(0)176; VI-NEXT: flat_load_dword v2, v[2:3] glc177; VI-NEXT: s_waitcnt vmcnt(0)178; VI-NEXT: v_mov_b32_e32 v1, s1179; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4180; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc181; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, v5, v2182; VI-NEXT: flat_store_dword v[0:1], v2183; VI-NEXT: s_endpgm184;185; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32:186; GFX9: ; %bb.0:187; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24188; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34189; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0190; GFX9-NEXT: s_waitcnt lgkmcnt(0)191; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc192; GFX9-NEXT: s_waitcnt vmcnt(0)193; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc194; GFX9-NEXT: s_waitcnt vmcnt(0)195; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, v1, v2196; GFX9-NEXT: global_store_dword v0, v1, s[0:1]197; GFX9-NEXT: s_endpgm198;199; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32:200; GFX10: ; %bb.0:201; GFX10-NEXT: s_clause 0x1202; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24203; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34204; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0205; GFX10-NEXT: s_waitcnt lgkmcnt(0)206; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc207; GFX10-NEXT: s_waitcnt vmcnt(0)208; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc209; GFX10-NEXT: s_waitcnt vmcnt(0)210; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e32 v1, v1, v2211; GFX10-NEXT: global_store_dword v0, v1, s[0:1]212; GFX10-NEXT: s_endpgm213;214; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32:215; GFX11: ; %bb.0:216; GFX11-NEXT: s_clause 0x1217; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24218; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34219; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0220; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)221; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0222; GFX11-NEXT: s_waitcnt lgkmcnt(0)223; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc224; GFX11-NEXT: s_waitcnt vmcnt(0)225; GFX11-NEXT: global_load_b32 v2, v0, s[4:5] glc dlc226; GFX11-NEXT: s_waitcnt vmcnt(0)227; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e32 v1, v1, v2228; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]229; GFX11-NEXT: s_endpgm230 %tid = call i32 @llvm.amdgcn.workitem.id.x()231 %tid.ext = sext i32 %tid to i64232 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext233 %b.gep = getelementptr inbounds float, ptr addrspace(1) %b.ptr, i64 %tid.ext234 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext235 %a = load volatile float, ptr addrspace(1) %a.gep236 %b = load volatile float, ptr addrspace(1) %b.gep237 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)238 store <2 x half> %cvt, ptr addrspace(1) %out.gep239 ret void240}241 242define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_reg_imm(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr) #0 {243; SI-LABEL: v_cvt_pkrtz_v2f16_f32_reg_imm:244; SI: ; %bb.0:245; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9246; SI-NEXT: s_mov_b32 s7, 0xf000247; SI-NEXT: s_mov_b32 s6, 0248; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0249; SI-NEXT: v_mov_b32_e32 v1, 0250; SI-NEXT: s_waitcnt lgkmcnt(0)251; SI-NEXT: s_mov_b64 s[4:5], s[2:3]252; SI-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc253; SI-NEXT: s_waitcnt vmcnt(0)254; SI-NEXT: s_mov_b64 s[2:3], s[6:7]255; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v2, v2, 1.0256; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64257; SI-NEXT: s_endpgm258;259; VI-LABEL: v_cvt_pkrtz_v2f16_f32_reg_imm:260; VI: ; %bb.0:261; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24262; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0263; VI-NEXT: s_waitcnt lgkmcnt(0)264; VI-NEXT: v_mov_b32_e32 v1, s3265; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2266; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc267; VI-NEXT: flat_load_dword v3, v[0:1] glc268; VI-NEXT: s_waitcnt vmcnt(0)269; VI-NEXT: v_mov_b32_e32 v1, s1270; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v2271; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc272; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, v3, 1.0273; VI-NEXT: flat_store_dword v[0:1], v2274; VI-NEXT: s_endpgm275;276; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_reg_imm:277; GFX9: ; %bb.0:278; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24279; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0280; GFX9-NEXT: s_waitcnt lgkmcnt(0)281; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc282; GFX9-NEXT: s_waitcnt vmcnt(0)283; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, v1, 1.0284; GFX9-NEXT: global_store_dword v0, v1, s[0:1]285; GFX9-NEXT: s_endpgm286;287; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_reg_imm:288; GFX10: ; %bb.0:289; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24290; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0291; GFX10-NEXT: s_waitcnt lgkmcnt(0)292; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc293; GFX10-NEXT: s_waitcnt vmcnt(0)294; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, v1, 1.0295; GFX10-NEXT: global_store_dword v0, v1, s[0:1]296; GFX10-NEXT: s_endpgm297;298; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_reg_imm:299; GFX11: ; %bb.0:300; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24301; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0302; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)303; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0304; GFX11-NEXT: s_waitcnt lgkmcnt(0)305; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc306; GFX11-NEXT: s_waitcnt vmcnt(0)307; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, v1, 1.0308; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]309; GFX11-NEXT: s_endpgm310 %tid = call i32 @llvm.amdgcn.workitem.id.x()311 %tid.ext = sext i32 %tid to i64312 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext313 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext314 %a = load volatile float, ptr addrspace(1) %a.gep315 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float 1.0)316 store <2 x half> %cvt, ptr addrspace(1) %out.gep317 ret void318}319 320define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_imm_reg(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr) #0 {321; SI-LABEL: v_cvt_pkrtz_v2f16_f32_imm_reg:322; SI: ; %bb.0:323; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9324; SI-NEXT: s_mov_b32 s7, 0xf000325; SI-NEXT: s_mov_b32 s6, 0326; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0327; SI-NEXT: v_mov_b32_e32 v1, 0328; SI-NEXT: s_waitcnt lgkmcnt(0)329; SI-NEXT: s_mov_b64 s[4:5], s[2:3]330; SI-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc331; SI-NEXT: s_waitcnt vmcnt(0)332; SI-NEXT: s_mov_b64 s[2:3], s[6:7]333; SI-NEXT: v_cvt_pkrtz_f16_f32_e32 v2, 1.0, v2334; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64335; SI-NEXT: s_endpgm336;337; VI-LABEL: v_cvt_pkrtz_v2f16_f32_imm_reg:338; VI: ; %bb.0:339; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24340; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0341; VI-NEXT: s_waitcnt lgkmcnt(0)342; VI-NEXT: v_mov_b32_e32 v1, s3343; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2344; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc345; VI-NEXT: flat_load_dword v3, v[0:1] glc346; VI-NEXT: s_waitcnt vmcnt(0)347; VI-NEXT: v_mov_b32_e32 v1, s1348; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v2349; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc350; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, 1.0, v3351; VI-NEXT: flat_store_dword v[0:1], v2352; VI-NEXT: s_endpgm353;354; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_imm_reg:355; GFX9: ; %bb.0:356; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24357; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0358; GFX9-NEXT: s_waitcnt lgkmcnt(0)359; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc360; GFX9-NEXT: s_waitcnt vmcnt(0)361; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, 1.0, v1362; GFX9-NEXT: global_store_dword v0, v1, s[0:1]363; GFX9-NEXT: s_endpgm364;365; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_imm_reg:366; GFX10: ; %bb.0:367; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24368; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0369; GFX10-NEXT: s_waitcnt lgkmcnt(0)370; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc371; GFX10-NEXT: s_waitcnt vmcnt(0)372; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e32 v1, 1.0, v1373; GFX10-NEXT: global_store_dword v0, v1, s[0:1]374; GFX10-NEXT: s_endpgm375;376; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_imm_reg:377; GFX11: ; %bb.0:378; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24379; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0380; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)381; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0382; GFX11-NEXT: s_waitcnt lgkmcnt(0)383; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc384; GFX11-NEXT: s_waitcnt vmcnt(0)385; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e32 v1, 1.0, v1386; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]387; GFX11-NEXT: s_endpgm388 %tid = call i32 @llvm.amdgcn.workitem.id.x()389 %tid.ext = sext i32 %tid to i64390 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext391 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext392 %a = load volatile float, ptr addrspace(1) %a.gep393 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 1.0, float %a)394 store <2 x half> %cvt, ptr addrspace(1) %out.gep395 ret void396}397 398define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {399; SI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo:400; SI: ; %bb.0:401; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9402; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd403; SI-NEXT: s_mov_b32 s11, 0xf000404; SI-NEXT: s_mov_b32 s10, 0405; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0406; SI-NEXT: v_mov_b32_e32 v1, 0407; SI-NEXT: s_mov_b64 s[6:7], s[10:11]408; SI-NEXT: s_waitcnt lgkmcnt(0)409; SI-NEXT: s_mov_b64 s[8:9], s[2:3]410; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc411; SI-NEXT: s_waitcnt vmcnt(0)412; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 glc413; SI-NEXT: s_waitcnt vmcnt(0)414; SI-NEXT: s_mov_b64 s[2:3], s[10:11]415; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v2, -v2, v3416; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64417; SI-NEXT: s_endpgm418;419; VI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo:420; VI: ; %bb.0:421; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24422; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34423; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0424; VI-NEXT: s_waitcnt lgkmcnt(0)425; VI-NEXT: v_mov_b32_e32 v1, s3426; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4427; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc428; VI-NEXT: v_mov_b32_e32 v3, s5429; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4430; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc431; VI-NEXT: flat_load_dword v5, v[0:1] glc432; VI-NEXT: s_waitcnt vmcnt(0)433; VI-NEXT: flat_load_dword v2, v[2:3] glc434; VI-NEXT: s_waitcnt vmcnt(0)435; VI-NEXT: v_mov_b32_e32 v1, s1436; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4437; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc438; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, -v5, v2439; VI-NEXT: flat_store_dword v[0:1], v2440; VI-NEXT: s_endpgm441;442; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo:443; GFX9: ; %bb.0:444; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24445; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34446; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0447; GFX9-NEXT: s_waitcnt lgkmcnt(0)448; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc449; GFX9-NEXT: s_waitcnt vmcnt(0)450; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc451; GFX9-NEXT: s_waitcnt vmcnt(0)452; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, -v1, v2453; GFX9-NEXT: global_store_dword v0, v1, s[0:1]454; GFX9-NEXT: s_endpgm455;456; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo:457; GFX10: ; %bb.0:458; GFX10-NEXT: s_clause 0x1459; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24460; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34461; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0462; GFX10-NEXT: s_waitcnt lgkmcnt(0)463; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc464; GFX10-NEXT: s_waitcnt vmcnt(0)465; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc466; GFX10-NEXT: s_waitcnt vmcnt(0)467; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, -v1, v2468; GFX10-NEXT: global_store_dword v0, v1, s[0:1]469; GFX10-NEXT: s_endpgm470;471; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo:472; GFX11: ; %bb.0:473; GFX11-NEXT: s_clause 0x1474; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24475; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34476; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0477; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)478; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0479; GFX11-NEXT: s_waitcnt lgkmcnt(0)480; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc481; GFX11-NEXT: s_waitcnt vmcnt(0)482; GFX11-NEXT: global_load_b32 v2, v0, s[4:5] glc dlc483; GFX11-NEXT: s_waitcnt vmcnt(0)484; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, -v1, v2485; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]486; GFX11-NEXT: s_endpgm487 %tid = call i32 @llvm.amdgcn.workitem.id.x()488 %tid.ext = sext i32 %tid to i64489 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext490 %b.gep = getelementptr inbounds float, ptr addrspace(1) %b.ptr, i64 %tid.ext491 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext492 %a = load volatile float, ptr addrspace(1) %a.gep493 %b = load volatile float, ptr addrspace(1) %b.gep494 %neg.a = fsub float -0.0, %a495 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %b)496 store <2 x half> %cvt, ptr addrspace(1) %out.gep497 ret void498}499 500define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_hi(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {501; SI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_hi:502; SI: ; %bb.0:503; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9504; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd505; SI-NEXT: s_mov_b32 s11, 0xf000506; SI-NEXT: s_mov_b32 s10, 0507; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0508; SI-NEXT: v_mov_b32_e32 v1, 0509; SI-NEXT: s_mov_b64 s[6:7], s[10:11]510; SI-NEXT: s_waitcnt lgkmcnt(0)511; SI-NEXT: s_mov_b64 s[8:9], s[2:3]512; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc513; SI-NEXT: s_waitcnt vmcnt(0)514; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 glc515; SI-NEXT: s_waitcnt vmcnt(0)516; SI-NEXT: s_mov_b64 s[2:3], s[10:11]517; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v2, v2, -v3518; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64519; SI-NEXT: s_endpgm520;521; VI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_hi:522; VI: ; %bb.0:523; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24524; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34525; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0526; VI-NEXT: s_waitcnt lgkmcnt(0)527; VI-NEXT: v_mov_b32_e32 v1, s3528; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4529; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc530; VI-NEXT: v_mov_b32_e32 v3, s5531; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4532; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc533; VI-NEXT: flat_load_dword v5, v[0:1] glc534; VI-NEXT: s_waitcnt vmcnt(0)535; VI-NEXT: flat_load_dword v2, v[2:3] glc536; VI-NEXT: s_waitcnt vmcnt(0)537; VI-NEXT: v_mov_b32_e32 v1, s1538; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4539; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc540; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, v5, -v2541; VI-NEXT: flat_store_dword v[0:1], v2542; VI-NEXT: s_endpgm543;544; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_hi:545; GFX9: ; %bb.0:546; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24547; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34548; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0549; GFX9-NEXT: s_waitcnt lgkmcnt(0)550; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc551; GFX9-NEXT: s_waitcnt vmcnt(0)552; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc553; GFX9-NEXT: s_waitcnt vmcnt(0)554; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, v1, -v2555; GFX9-NEXT: global_store_dword v0, v1, s[0:1]556; GFX9-NEXT: s_endpgm557;558; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_hi:559; GFX10: ; %bb.0:560; GFX10-NEXT: s_clause 0x1561; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24562; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34563; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0564; GFX10-NEXT: s_waitcnt lgkmcnt(0)565; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc566; GFX10-NEXT: s_waitcnt vmcnt(0)567; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc568; GFX10-NEXT: s_waitcnt vmcnt(0)569; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, v1, -v2570; GFX10-NEXT: global_store_dword v0, v1, s[0:1]571; GFX10-NEXT: s_endpgm572;573; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_hi:574; GFX11: ; %bb.0:575; GFX11-NEXT: s_clause 0x1576; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24577; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34578; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0579; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)580; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0581; GFX11-NEXT: s_waitcnt lgkmcnt(0)582; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc583; GFX11-NEXT: s_waitcnt vmcnt(0)584; GFX11-NEXT: global_load_b32 v2, v0, s[4:5] glc dlc585; GFX11-NEXT: s_waitcnt vmcnt(0)586; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, v1, -v2587; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]588; GFX11-NEXT: s_endpgm589 %tid = call i32 @llvm.amdgcn.workitem.id.x()590 %tid.ext = sext i32 %tid to i64591 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext592 %b.gep = getelementptr inbounds float, ptr addrspace(1) %b.ptr, i64 %tid.ext593 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext594 %a = load volatile float, ptr addrspace(1) %a.gep595 %b = load volatile float, ptr addrspace(1) %b.gep596 %neg.b = fsub float -0.0, %b597 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %neg.b)598 store <2 x half> %cvt, ptr addrspace(1) %out.gep599 ret void600}601 602define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo_hi(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {603; SI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:604; SI: ; %bb.0:605; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9606; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd607; SI-NEXT: s_mov_b32 s11, 0xf000608; SI-NEXT: s_mov_b32 s10, 0609; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0610; SI-NEXT: v_mov_b32_e32 v1, 0611; SI-NEXT: s_mov_b64 s[6:7], s[10:11]612; SI-NEXT: s_waitcnt lgkmcnt(0)613; SI-NEXT: s_mov_b64 s[8:9], s[2:3]614; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc615; SI-NEXT: s_waitcnt vmcnt(0)616; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 glc617; SI-NEXT: s_waitcnt vmcnt(0)618; SI-NEXT: s_mov_b64 s[2:3], s[10:11]619; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v2, -v2, -v3620; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64621; SI-NEXT: s_endpgm622;623; VI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:624; VI: ; %bb.0:625; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24626; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34627; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0628; VI-NEXT: s_waitcnt lgkmcnt(0)629; VI-NEXT: v_mov_b32_e32 v1, s3630; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4631; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc632; VI-NEXT: v_mov_b32_e32 v3, s5633; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4634; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc635; VI-NEXT: flat_load_dword v5, v[0:1] glc636; VI-NEXT: s_waitcnt vmcnt(0)637; VI-NEXT: flat_load_dword v2, v[2:3] glc638; VI-NEXT: s_waitcnt vmcnt(0)639; VI-NEXT: v_mov_b32_e32 v1, s1640; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4641; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc642; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, -v5, -v2643; VI-NEXT: flat_store_dword v[0:1], v2644; VI-NEXT: s_endpgm645;646; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:647; GFX9: ; %bb.0:648; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24649; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34650; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0651; GFX9-NEXT: s_waitcnt lgkmcnt(0)652; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc653; GFX9-NEXT: s_waitcnt vmcnt(0)654; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc655; GFX9-NEXT: s_waitcnt vmcnt(0)656; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, -v1, -v2657; GFX9-NEXT: global_store_dword v0, v1, s[0:1]658; GFX9-NEXT: s_endpgm659;660; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:661; GFX10: ; %bb.0:662; GFX10-NEXT: s_clause 0x1663; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24664; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34665; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0666; GFX10-NEXT: s_waitcnt lgkmcnt(0)667; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc668; GFX10-NEXT: s_waitcnt vmcnt(0)669; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc670; GFX10-NEXT: s_waitcnt vmcnt(0)671; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, -v1, -v2672; GFX10-NEXT: global_store_dword v0, v1, s[0:1]673; GFX10-NEXT: s_endpgm674;675; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:676; GFX11: ; %bb.0:677; GFX11-NEXT: s_clause 0x1678; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24679; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34680; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0681; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)682; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0683; GFX11-NEXT: s_waitcnt lgkmcnt(0)684; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc685; GFX11-NEXT: s_waitcnt vmcnt(0)686; GFX11-NEXT: global_load_b32 v2, v0, s[4:5] glc dlc687; GFX11-NEXT: s_waitcnt vmcnt(0)688; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, -v1, -v2689; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]690; GFX11-NEXT: s_endpgm691 %tid = call i32 @llvm.amdgcn.workitem.id.x()692 %tid.ext = sext i32 %tid to i64693 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext694 %b.gep = getelementptr inbounds float, ptr addrspace(1) %b.ptr, i64 %tid.ext695 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext696 %a = load volatile float, ptr addrspace(1) %a.gep697 %b = load volatile float, ptr addrspace(1) %b.gep698 %neg.a = fsub float -0.0, %a699 %neg.b = fsub float -0.0, %b700 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %neg.b)701 store <2 x half> %cvt, ptr addrspace(1) %out.gep702 ret void703}704 705define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {706; SI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:707; SI: ; %bb.0:708; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9709; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd710; SI-NEXT: s_mov_b32 s11, 0xf000711; SI-NEXT: s_mov_b32 s10, 0712; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v0713; SI-NEXT: v_mov_b32_e32 v1, 0714; SI-NEXT: s_mov_b64 s[6:7], s[10:11]715; SI-NEXT: s_waitcnt lgkmcnt(0)716; SI-NEXT: s_mov_b64 s[8:9], s[2:3]717; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc718; SI-NEXT: s_waitcnt vmcnt(0)719; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 glc720; SI-NEXT: s_waitcnt vmcnt(0)721; SI-NEXT: s_mov_b64 s[2:3], s[10:11]722; SI-NEXT: v_cvt_pkrtz_f16_f32_e64 v2, -|v2|, -v3723; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64724; SI-NEXT: s_endpgm725;726; VI-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:727; VI: ; %bb.0:728; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24729; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34730; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0731; VI-NEXT: s_waitcnt lgkmcnt(0)732; VI-NEXT: v_mov_b32_e32 v1, s3733; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4734; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc735; VI-NEXT: v_mov_b32_e32 v3, s5736; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4737; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc738; VI-NEXT: flat_load_dword v5, v[0:1] glc739; VI-NEXT: s_waitcnt vmcnt(0)740; VI-NEXT: flat_load_dword v2, v[2:3] glc741; VI-NEXT: s_waitcnt vmcnt(0)742; VI-NEXT: v_mov_b32_e32 v1, s1743; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4744; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc745; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, -|v5|, -v2746; VI-NEXT: flat_store_dword v[0:1], v2747; VI-NEXT: s_endpgm748;749; GFX9-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:750; GFX9: ; %bb.0:751; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24752; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34753; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0754; GFX9-NEXT: s_waitcnt lgkmcnt(0)755; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc756; GFX9-NEXT: s_waitcnt vmcnt(0)757; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc758; GFX9-NEXT: s_waitcnt vmcnt(0)759; GFX9-NEXT: v_cvt_pkrtz_f16_f32 v1, -|v1|, -v2760; GFX9-NEXT: global_store_dword v0, v1, s[0:1]761; GFX9-NEXT: s_endpgm762;763; GFX10-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:764; GFX10: ; %bb.0:765; GFX10-NEXT: s_clause 0x1766; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24767; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34768; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0769; GFX10-NEXT: s_waitcnt lgkmcnt(0)770; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc771; GFX10-NEXT: s_waitcnt vmcnt(0)772; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc773; GFX10-NEXT: s_waitcnt vmcnt(0)774; GFX10-NEXT: v_cvt_pkrtz_f16_f32_e64 v1, -|v1|, -v2775; GFX10-NEXT: global_store_dword v0, v1, s[0:1]776; GFX10-NEXT: s_endpgm777;778; GFX11-LABEL: v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:779; GFX11: ; %bb.0:780; GFX11-NEXT: s_clause 0x1781; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24782; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34783; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0784; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)785; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0786; GFX11-NEXT: s_waitcnt lgkmcnt(0)787; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc788; GFX11-NEXT: s_waitcnt vmcnt(0)789; GFX11-NEXT: global_load_b32 v2, v0, s[4:5] glc dlc790; GFX11-NEXT: s_waitcnt vmcnt(0)791; GFX11-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, -|v1|, -v2792; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]793; GFX11-NEXT: s_endpgm794 %tid = call i32 @llvm.amdgcn.workitem.id.x()795 %tid.ext = sext i32 %tid to i64796 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext797 %b.gep = getelementptr inbounds float, ptr addrspace(1) %b.ptr, i64 %tid.ext798 %out.gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i64 %tid.ext799 %a = load volatile float, ptr addrspace(1) %a.gep800 %b = load volatile float, ptr addrspace(1) %b.gep801 %fabs.a = call float @llvm.fabs.f32(float %a)802 %neg.fabs.a = fsub float -0.0, %fabs.a803 %neg.b = fsub float -0.0, %b804 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.fabs.a, float %neg.b)805 store <2 x half> %cvt, ptr addrspace(1) %out.gep806 ret void807}808 809declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #1810declare float @llvm.fabs.f32(float) #1811declare i32 @llvm.amdgcn.workitem.id.x() #1812 813 814attributes #0 = { nounwind }815attributes #1 = { nounwind readnone }816