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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefix=SDAG-REAL16 %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck -check-prefix=SDAG-FAKE16 %s4; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefix=GISEL-REAL16 %s5; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck -check-prefix=GISEL-FAKE16 %s6 7declare i16 @llvm.amdgcn.sat.pk4.i4.i8(i32) #08declare i16 @llvm.amdgcn.sat.pk4.u4.u8(i32) #09 10define amdgpu_kernel void @sat_pk4_i4_i8_f32_v(i32 %src, ptr %out) #1 {11; SDAG-REAL16-LABEL: sat_pk4_i4_i8_f32_v:12; SDAG-REAL16: ; %bb.0:13; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 114; SDAG-REAL16-NEXT: s_clause 0x115; SDAG-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x016; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x817; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 018; SDAG-REAL16-NEXT: s_wait_kmcnt 0x019; SDAG-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, s220; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]21; SDAG-REAL16-NEXT: s_endpgm22;23; SDAG-FAKE16-LABEL: sat_pk4_i4_i8_f32_v:24; SDAG-FAKE16: ; %bb.0:25; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 126; SDAG-FAKE16-NEXT: s_clause 0x127; SDAG-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x028; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x829; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 030; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x031; SDAG-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v1, s232; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]33; SDAG-FAKE16-NEXT: s_endpgm34;35; GISEL-REAL16-LABEL: sat_pk4_i4_i8_f32_v:36; GISEL-REAL16: ; %bb.0:37; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 138; GISEL-REAL16-NEXT: s_clause 0x139; GISEL-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x040; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x841; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 042; GISEL-REAL16-NEXT: s_wait_kmcnt 0x043; GISEL-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, s244; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]45; GISEL-REAL16-NEXT: s_endpgm46;47; GISEL-FAKE16-LABEL: sat_pk4_i4_i8_f32_v:48; GISEL-FAKE16: ; %bb.0:49; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 150; GISEL-FAKE16-NEXT: s_clause 0x151; GISEL-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x052; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x853; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 054; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x055; GISEL-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v0, s256; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]57; GISEL-FAKE16-NEXT: s_endpgm58 %cvt = call i16 @llvm.amdgcn.sat.pk4.i4.i8(i32 %src) #059 store i16 %cvt, ptr %out, align 260 ret void61}62 63define amdgpu_kernel void @sat_pk4_i4_i8_f32_s(i32 inreg %src, ptr %out) #1 {64; SDAG-REAL16-LABEL: sat_pk4_i4_i8_f32_s:65; SDAG-REAL16: ; %bb.0:66; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 167; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x868; SDAG-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, s869; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 070; SDAG-REAL16-NEXT: s_wait_kmcnt 0x071; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]72; SDAG-REAL16-NEXT: s_endpgm73;74; SDAG-FAKE16-LABEL: sat_pk4_i4_i8_f32_s:75; SDAG-FAKE16: ; %bb.0:76; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 177; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x878; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 079; SDAG-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v1, s880; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x081; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]82; SDAG-FAKE16-NEXT: s_endpgm83;84; GISEL-REAL16-LABEL: sat_pk4_i4_i8_f32_s:85; GISEL-REAL16: ; %bb.0:86; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 187; GISEL-REAL16-NEXT: s_clause 0x188; GISEL-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x089; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x890; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 091; GISEL-REAL16-NEXT: s_wait_kmcnt 0x092; GISEL-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, s293; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]94; GISEL-REAL16-NEXT: s_endpgm95;96; GISEL-FAKE16-LABEL: sat_pk4_i4_i8_f32_s:97; GISEL-FAKE16: ; %bb.0:98; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 199; GISEL-FAKE16-NEXT: s_clause 0x1100; GISEL-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x0101; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8102; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0103; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0104; GISEL-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v0, s2105; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]106; GISEL-FAKE16-NEXT: s_endpgm107 %cvt = call i16 @llvm.amdgcn.sat.pk4.i4.i8(i32 %src) #0108 store i16 %cvt, ptr %out, align 2109 ret void110}111 112define amdgpu_kernel void @sat_pk4_i4_i8_f32_i(ptr %out) #1 {113; SDAG-REAL16-LABEL: sat_pk4_i4_i8_f32_i:114; SDAG-REAL16: ; %bb.0:115; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1116; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0117; SDAG-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, 0x64118; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 0119; SDAG-REAL16-NEXT: s_wait_kmcnt 0x0120; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]121; SDAG-REAL16-NEXT: s_endpgm122;123; SDAG-FAKE16-LABEL: sat_pk4_i4_i8_f32_i:124; SDAG-FAKE16: ; %bb.0:125; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1126; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0127; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0128; SDAG-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v1, 0x64129; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0130; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]131; SDAG-FAKE16-NEXT: s_endpgm132;133; GISEL-REAL16-LABEL: sat_pk4_i4_i8_f32_i:134; GISEL-REAL16: ; %bb.0:135; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1136; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0137; GISEL-REAL16-NEXT: v_sat_pk4_i4_i8_e32 v0.l, 0x64138; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 0139; GISEL-REAL16-NEXT: s_wait_kmcnt 0x0140; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]141; GISEL-REAL16-NEXT: s_endpgm142;143; GISEL-FAKE16-LABEL: sat_pk4_i4_i8_f32_i:144; GISEL-FAKE16: ; %bb.0:145; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1146; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0147; GISEL-FAKE16-NEXT: v_sat_pk4_i4_i8_e32 v0, 0x64148; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0149; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0150; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]151; GISEL-FAKE16-NEXT: s_endpgm152 %cvt = call i16 @llvm.amdgcn.sat.pk4.i4.i8(i32 100) #0153 store i16 %cvt, ptr %out, align 2154 ret void155}156 157define amdgpu_kernel void @sat_pk4_u4_u8_f32_v(i32 %src, ptr %out) #1 {158; SDAG-REAL16-LABEL: sat_pk4_u4_u8_f32_v:159; SDAG-REAL16: ; %bb.0:160; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1161; SDAG-REAL16-NEXT: s_clause 0x1162; SDAG-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x0163; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8164; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 0165; SDAG-REAL16-NEXT: s_wait_kmcnt 0x0166; SDAG-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, s2167; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]168; SDAG-REAL16-NEXT: s_endpgm169;170; SDAG-FAKE16-LABEL: sat_pk4_u4_u8_f32_v:171; SDAG-FAKE16: ; %bb.0:172; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1173; SDAG-FAKE16-NEXT: s_clause 0x1174; SDAG-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x0175; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8176; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0177; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0178; SDAG-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v1, s2179; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]180; SDAG-FAKE16-NEXT: s_endpgm181;182; GISEL-REAL16-LABEL: sat_pk4_u4_u8_f32_v:183; GISEL-REAL16: ; %bb.0:184; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1185; GISEL-REAL16-NEXT: s_clause 0x1186; GISEL-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x0187; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8188; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 0189; GISEL-REAL16-NEXT: s_wait_kmcnt 0x0190; GISEL-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, s2191; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]192; GISEL-REAL16-NEXT: s_endpgm193;194; GISEL-FAKE16-LABEL: sat_pk4_u4_u8_f32_v:195; GISEL-FAKE16: ; %bb.0:196; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1197; GISEL-FAKE16-NEXT: s_clause 0x1198; GISEL-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x0199; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8200; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0201; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0202; GISEL-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v0, s2203; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]204; GISEL-FAKE16-NEXT: s_endpgm205 %cvt = call i16 @llvm.amdgcn.sat.pk4.u4.u8(i32 %src) #0206 store i16 %cvt, ptr %out, align 2207 ret void208}209 210define amdgpu_kernel void @sat_pk4_u4_u8_f32_s(i32 inreg %src, ptr %out) #1 {211; SDAG-REAL16-LABEL: sat_pk4_u4_u8_f32_s:212; SDAG-REAL16: ; %bb.0:213; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1214; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8215; SDAG-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, s8216; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 0217; SDAG-REAL16-NEXT: s_wait_kmcnt 0x0218; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]219; SDAG-REAL16-NEXT: s_endpgm220;221; SDAG-FAKE16-LABEL: sat_pk4_u4_u8_f32_s:222; SDAG-FAKE16: ; %bb.0:223; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1224; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8225; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0226; SDAG-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v1, s8227; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0228; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]229; SDAG-FAKE16-NEXT: s_endpgm230;231; GISEL-REAL16-LABEL: sat_pk4_u4_u8_f32_s:232; GISEL-REAL16: ; %bb.0:233; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1234; GISEL-REAL16-NEXT: s_clause 0x1235; GISEL-REAL16-NEXT: s_load_b32 s2, s[4:5], 0x0236; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8237; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 0238; GISEL-REAL16-NEXT: s_wait_kmcnt 0x0239; GISEL-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, s2240; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]241; GISEL-REAL16-NEXT: s_endpgm242;243; GISEL-FAKE16-LABEL: sat_pk4_u4_u8_f32_s:244; GISEL-FAKE16: ; %bb.0:245; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1246; GISEL-FAKE16-NEXT: s_clause 0x1247; GISEL-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x0248; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x8249; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0250; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0251; GISEL-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v0, s2252; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]253; GISEL-FAKE16-NEXT: s_endpgm254 %cvt = call i16 @llvm.amdgcn.sat.pk4.u4.u8(i32 %src) #0255 store i16 %cvt, ptr %out, align 2256 ret void257}258 259define amdgpu_kernel void @sat_pk4_u4_u8_f32_i(ptr %out) #1 {260; SDAG-REAL16-LABEL: sat_pk4_u4_u8_f32_i:261; SDAG-REAL16: ; %bb.0:262; SDAG-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1263; SDAG-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0264; SDAG-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, 0x64265; SDAG-REAL16-NEXT: v_mov_b32_e32 v1, 0266; SDAG-REAL16-NEXT: s_wait_kmcnt 0x0267; SDAG-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]268; SDAG-REAL16-NEXT: s_endpgm269;270; SDAG-FAKE16-LABEL: sat_pk4_u4_u8_f32_i:271; SDAG-FAKE16: ; %bb.0:272; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1273; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0274; SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0275; SDAG-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v1, 0x64276; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0277; SDAG-FAKE16-NEXT: flat_store_b16 v0, v1, s[0:1]278; SDAG-FAKE16-NEXT: s_endpgm279;280; GISEL-REAL16-LABEL: sat_pk4_u4_u8_f32_i:281; GISEL-REAL16: ; %bb.0:282; GISEL-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1283; GISEL-REAL16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0284; GISEL-REAL16-NEXT: v_sat_pk4_u4_u8_e32 v0.l, 0x64285; GISEL-REAL16-NEXT: v_mov_b32_e32 v1, 0286; GISEL-REAL16-NEXT: s_wait_kmcnt 0x0287; GISEL-REAL16-NEXT: flat_store_b16 v1, v0, s[0:1]288; GISEL-REAL16-NEXT: s_endpgm289;290; GISEL-FAKE16-LABEL: sat_pk4_u4_u8_f32_i:291; GISEL-FAKE16: ; %bb.0:292; GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1293; GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0294; GISEL-FAKE16-NEXT: v_sat_pk4_u4_u8_e32 v0, 0x64295; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0296; GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0297; GISEL-FAKE16-NEXT: flat_store_b16 v1, v0, s[0:1]298; GISEL-FAKE16-NEXT: s_endpgm299 %cvt = call i16 @llvm.amdgcn.sat.pk4.u4.u8(i32 100) #0300 store i16 %cvt, ptr %out, align 2301 ret void302}303 304attributes #0 = { nounwind memory(none) }305attributes #1 = { nounwind }306