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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck --check-prefixes=GCN,GFX950-SDAG %s3; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck --check-prefixes=GCN,GFX950-GISEL %s4 5declare <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32(<16 x float> %src0, <16 x float> %src1, float %scale)6declare <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32(<16 x float> %src0, <16 x float> %src1, float %scale)7declare <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half>, i32, float, i32, i1)8declare float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32, float, i32)9declare <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half>, i32, float, i32, i1)10declare float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32, float, i32)11declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16>, float, float, float, i1)12declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16>, float, float, float, i1)13declare <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp8(i32, float, i1)14declare <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.bf8(i32, float, i1)15declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16>, <2 x half>, float, i1)16declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.fb16(<2 x i16>, <2 x bfloat>, float, i1)17declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16>, <2 x half>, float, i1)18declare <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.fb16(<2 x i16>, <2 x bfloat>, float, i1)19declare <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32, float, i32)20declare i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32, float, float, float, i32)21declare <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32, float, i32)22declare <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32, float, i32)23declare <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.fp6(<6 x i32>, float)24declare <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.bf6(<6 x i32>, float)25declare <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.fp6(<6 x i32>, float)26declare <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32>, float)27declare <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.bf6(<6 x i32>, float)28declare <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32>, float)29declare <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp8(i32, float, i1)30declare <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.bf8(i32, float, i1)31declare <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp8(i32, float, i1)32declare <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.bf8(i32, float, i1)33declare i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32, <2 x half>, float, i32)34declare i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32, <2 x bfloat>, float, i32)35 36define amdgpu_ps void @test_scalef32_pk32_fp6_f32_vv(<16 x float> %src, float %scale, ptr addrspace(1) %out) {37; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f32_vv:38; GFX950-SDAG: ; %bb.0:39; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v1840; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v1741; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[0:5], v[0:15], v[0:15], v1642; GFX950-SDAG-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:1643; GFX950-SDAG-NEXT: global_store_dwordx4 v[18:19], v[0:3], off44; GFX950-SDAG-NEXT: s_endpgm45;46; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_f32_vv:47; GFX950-GISEL: ; %bb.0:48; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v1749; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v1850; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[0:5], v[0:15], v[0:15], v1651; GFX950-GISEL-NEXT: global_store_dwordx4 v[20:21], v[0:3], off52; GFX950-GISEL-NEXT: global_store_dwordx2 v[20:21], v[4:5], off offset:1653; GFX950-GISEL-NEXT: s_endpgm54 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32(<16 x float> %src, <16 x float> %src, float %scale)55 store <6 x i32> %cvt, ptr addrspace(1) %out, align 856 ret void57}58 59define amdgpu_ps void @test_scalef32_pk32_fp6_f32_sl(<16 x float> inreg %src, ptr addrspace(1) %out) {60; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f32_sl:61; GFX950-SDAG: ; %bb.0:62; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]63; GFX950-SDAG-NEXT: s_mov_b32 s16, 0x42c8000064; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]65; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]66; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]67; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]68; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]69; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]70; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]71; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[2:7], v[2:17], v[2:17], s1672; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:1673; GFX950-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off74; GFX950-SDAG-NEXT: s_endpgm75;76; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_f32_sl:77; GFX950-GISEL: ; %bb.0:78; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]79; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]80; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]81; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]82; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]83; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]84; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]85; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]86; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, 0x42c8000087; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[2:7], v[2:17], v[2:17], v1888; GFX950-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off89; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:1690; GFX950-GISEL-NEXT: s_endpgm91 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32(<16 x float> %src, <16 x float> %src, float 100.0)92 store <6 x i32> %cvt, ptr addrspace(1) %out, align 893 ret void94}95 96define amdgpu_ps void @test_scalef32_pk32_bf6_f32_vv(<16 x float> %src, float %scale, ptr addrspace(1) %out) {97; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f32_vv:98; GFX950-SDAG: ; %bb.0:99; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v18100; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v17101; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[0:5], v[0:15], v[0:15], v16102; GFX950-SDAG-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:16103; GFX950-SDAG-NEXT: global_store_dwordx4 v[18:19], v[0:3], off104; GFX950-SDAG-NEXT: s_endpgm105;106; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_f32_vv:107; GFX950-GISEL: ; %bb.0:108; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v17109; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v18110; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[0:5], v[0:15], v[0:15], v16111; GFX950-GISEL-NEXT: global_store_dwordx4 v[20:21], v[0:3], off112; GFX950-GISEL-NEXT: global_store_dwordx2 v[20:21], v[4:5], off offset:16113; GFX950-GISEL-NEXT: s_endpgm114 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32(<16 x float> %src, <16 x float> %src, float %scale)115 store <6 x i32> %cvt, ptr addrspace(1) %out, align 8116 ret void117}118 119define amdgpu_ps void @test_scalef32_pk32_bf6_f32_sl(<16 x float> inreg %src, ptr addrspace(1) %out) {120; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f32_sl:121; GFX950-SDAG: ; %bb.0:122; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]123; GFX950-SDAG-NEXT: s_mov_b32 s16, 0x42c80000124; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]125; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]126; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]127; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]128; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]129; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]130; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]131; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[2:7], v[2:17], v[2:17], s16132; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16133; GFX950-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off134; GFX950-SDAG-NEXT: s_endpgm135;136; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_f32_sl:137; GFX950-GISEL: ; %bb.0:138; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]139; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]140; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]141; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]142; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]143; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]144; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]145; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]146; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, 0x42c80000147; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[2:7], v[2:17], v[2:17], v18148; GFX950-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off149; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16150; GFX950-GISEL-NEXT: s_endpgm151 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32(<16 x float> %src, <16 x float> %src, float 100.0)152 store <6 x i32> %cvt, ptr addrspace(1) %out, align 8153 ret void154}155 156define <2 x half> @test_cvt_scalef32_f16_fp8_byte0_dst_lo(i32 %src, float %scale, <2 x half> %old) {157; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte0_dst_lo:158; GCN: ; %bb.0:159; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)160; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1161; GCN-NEXT: v_mov_b32_e32 v0, v2162; GCN-NEXT: s_setpc_b64 s[30:31]163 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 false)164 ret <2 x half> %ret165}166 167define <2 x half> @test_cvt_scalef32_f16_fp8_byte1_dst_lo(i32 %src, float %scale, <2 x half> %old) {168; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte1_dst_lo:169; GCN: ; %bb.0:170; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)171; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[1,0,0]172; GCN-NEXT: v_mov_b32_e32 v0, v2173; GCN-NEXT: s_setpc_b64 s[30:31]174 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 false)175 ret <2 x half> %ret176}177 178define <2 x half> @test_cvt_scalef32_f16_fp8_byte2_dst_lo(i32 %src, float %scale, <2 x half> %old) {179; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte2_dst_lo:180; GCN: ; %bb.0:181; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)182; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[0,1,0]183; GCN-NEXT: v_mov_b32_e32 v0, v2184; GCN-NEXT: s_setpc_b64 s[30:31]185 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 false)186 ret <2 x half> %ret187}188 189define <2 x half> @test_cvt_scalef32_f16_fp8_byte3_dst_lo(i32 %src, float %scale, <2 x half> %old) {190; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte3_dst_lo:191; GCN: ; %bb.0:192; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)193; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[1,1,0]194; GCN-NEXT: v_mov_b32_e32 v0, v2195; GCN-NEXT: s_setpc_b64 s[30:31]196 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 false)197 ret <2 x half> %ret198}199 200define <2 x half> @test_cvt_scalef32_f16_fp8_byte0_dst_hi(i32 %src, float %scale, <2 x half> %old) {201; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte0_dst_hi:202; GCN: ; %bb.0:203; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)204; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[0,0,1]205; GCN-NEXT: s_nop 0206; GCN-NEXT: v_mov_b32_e32 v0, v2207; GCN-NEXT: s_setpc_b64 s[30:31]208 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 true)209 ret <2 x half> %ret210}211 212define <2 x half> @test_cvt_scalef32_f16_fp8_byte1_dst_hi(i32 %src, float %scale, <2 x half> %old) {213; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte1_dst_hi:214; GCN: ; %bb.0:215; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)216; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[1,0,1]217; GCN-NEXT: s_nop 0218; GCN-NEXT: v_mov_b32_e32 v0, v2219; GCN-NEXT: s_setpc_b64 s[30:31]220 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 true)221 ret <2 x half> %ret222}223 224define <2 x half> @test_cvt_scalef32_f16_fp8_byte2_dst_hi(i32 %src, float %scale, <2 x half> %old) {225; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte2_dst_hi:226; GCN: ; %bb.0:227; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)228; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[0,1,1]229; GCN-NEXT: s_nop 0230; GCN-NEXT: v_mov_b32_e32 v0, v2231; GCN-NEXT: s_setpc_b64 s[30:31]232 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 true)233 ret <2 x half> %ret234}235 236define <2 x half> @test_cvt_scalef32_f16_fp8_byte3_dst_hi(i32 %src, float %scale, <2 x half> %old) {237; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte3_dst_hi:238; GCN: ; %bb.0:239; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)240; GCN-NEXT: v_cvt_scalef32_f16_fp8 v2, v0, v1 op_sel:[1,1,1]241; GCN-NEXT: s_nop 0242; GCN-NEXT: v_mov_b32_e32 v0, v2243; GCN-NEXT: s_setpc_b64 s[30:31]244 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 true)245 ret <2 x half> %ret246}247 248define float @test_cvt_scalef32_f32_fp8_byte0(i32 %src, float %scale) {249; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte0:250; GCN: ; %bb.0:251; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)252; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, v0, v1253; GCN-NEXT: s_setpc_b64 s[30:31]254 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 0)255 ret float %ret256}257 258define float @test_cvt_scalef32_f32_fp8_byte1(i32 %src, float %scale) {259; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte1:260; GCN: ; %bb.0:261; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)262; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, v0, v1 op_sel:[1,0,0]263; GCN-NEXT: s_setpc_b64 s[30:31]264 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 1)265 ret float %ret266}267 268define float @test_cvt_scalef32_f32_fp8_byte2(i32 %src, float %scale) {269; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte2:270; GCN: ; %bb.0:271; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)272; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, v0, v1 op_sel:[0,1,0]273; GCN-NEXT: s_setpc_b64 s[30:31]274 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 2)275 ret float %ret276}277 278define float @test_cvt_scalef32_f32_fp8_byte3(i32 %src, float %scale) {279; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte3:280; GCN: ; %bb.0:281; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)282; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, v0, v1 op_sel:[1,1,0]283; GCN-NEXT: s_setpc_b64 s[30:31]284 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 3)285 ret float %ret286}287 288define <2 x half> @test_cvt_scalef32_f16_bf8_byte0_dst_lo(i32 %src, float %scale, <2 x half> %old) {289; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte0_dst_lo:290; GCN: ; %bb.0:291; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)292; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1293; GCN-NEXT: v_mov_b32_e32 v0, v2294; GCN-NEXT: s_setpc_b64 s[30:31]295 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 false)296 ret <2 x half> %ret297}298 299define <2 x half> @test_cvt_scalef32_f16_bf8_byte1_dst_lo(i32 %src, float %scale, <2 x half> %old) {300; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte1_dst_lo:301; GCN: ; %bb.0:302; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)303; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[1,0,0]304; GCN-NEXT: v_mov_b32_e32 v0, v2305; GCN-NEXT: s_setpc_b64 s[30:31]306 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 false)307 ret <2 x half> %ret308}309 310define <2 x half> @test_cvt_scalef32_f16_bf8_byte2_dst_lo(i32 %src, float %scale, <2 x half> %old) {311; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte2_dst_lo:312; GCN: ; %bb.0:313; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)314; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[0,1,0]315; GCN-NEXT: v_mov_b32_e32 v0, v2316; GCN-NEXT: s_setpc_b64 s[30:31]317 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 false)318 ret <2 x half> %ret319}320 321define <2 x half> @test_cvt_scalef32_f16_bf8_byte3_dst_lo(i32 %src, float %scale, <2 x half> %old) {322; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte3_dst_lo:323; GCN: ; %bb.0:324; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)325; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[1,1,0]326; GCN-NEXT: v_mov_b32_e32 v0, v2327; GCN-NEXT: s_setpc_b64 s[30:31]328 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 false)329 ret <2 x half> %ret330}331 332define <2 x half> @test_cvt_scalef32_f16_bf8_byte0_dst_hi(i32 %src, float %scale, <2 x half> %old) {333; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte0_dst_hi:334; GCN: ; %bb.0:335; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)336; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[0,0,1]337; GCN-NEXT: s_nop 0338; GCN-NEXT: v_mov_b32_e32 v0, v2339; GCN-NEXT: s_setpc_b64 s[30:31]340 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 true)341 ret <2 x half> %ret342}343 344define <2 x half> @test_cvt_scalef32_f16_bf8_byte1_dst_hi(i32 %src, float %scale, <2 x half> %old) {345; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte1_dst_hi:346; GCN: ; %bb.0:347; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)348; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[1,0,1]349; GCN-NEXT: s_nop 0350; GCN-NEXT: v_mov_b32_e32 v0, v2351; GCN-NEXT: s_setpc_b64 s[30:31]352 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 true)353 ret <2 x half> %ret354}355 356define <2 x half> @test_cvt_scalef32_f16_bf8_byte2_dst_hi(i32 %src, float %scale, <2 x half> %old) {357; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte2_dst_hi:358; GCN: ; %bb.0:359; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)360; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[0,1,1]361; GCN-NEXT: s_nop 0362; GCN-NEXT: v_mov_b32_e32 v0, v2363; GCN-NEXT: s_setpc_b64 s[30:31]364 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 true)365 ret <2 x half> %ret366}367 368define <2 x half> @test_cvt_scalef32_f16_bf8_byte3_dst_hi(i32 %src, float %scale, <2 x half> %old) {369; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte3_dst_hi:370; GCN: ; %bb.0:371; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)372; GCN-NEXT: v_cvt_scalef32_f16_bf8 v2, v0, v1 op_sel:[1,1,1]373; GCN-NEXT: s_nop 0374; GCN-NEXT: v_mov_b32_e32 v0, v2375; GCN-NEXT: s_setpc_b64 s[30:31]376 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 true)377 ret <2 x half> %ret378}379 380define float @test_cvt_scalef32_f32_bf8_byte0(i32 %src, float %scale) {381; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte0:382; GCN: ; %bb.0:383; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)384; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, v0, v1385; GCN-NEXT: s_setpc_b64 s[30:31]386 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 0)387 ret float %ret388}389 390define float @test_cvt_scalef32_f32_bf8_byte1(i32 %src, float %scale) {391; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte1:392; GCN: ; %bb.0:393; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)394; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, v0, v1 op_sel:[1,0,0]395; GCN-NEXT: s_setpc_b64 s[30:31]396 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 1)397 ret float %ret398}399 400define float @test_cvt_scalef32_f32_bf8_byte2(i32 %src, float %scale) {401; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte2:402; GCN: ; %bb.0:403; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, v0, v1 op_sel:[0,1,0]405; GCN-NEXT: s_setpc_b64 s[30:31]406 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 2)407 ret float %ret408}409 410define float @test_cvt_scalef32_f32_bf8_byte3(i32 %src, float %scale) {411; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte3:412; GCN: ; %bb.0:413; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)414; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, v0, v1 op_sel:[1,1,0]415; GCN-NEXT: s_setpc_b64 s[30:31]416 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 3)417 ret float %ret418}419 420define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word0(<2 x i16> %old, float %src0, float %src1, float %scale) {421; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word0:422; GCN: ; %bb.0:423; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)424; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v0, v1, v2, v3425; GCN-NEXT: s_setpc_b64 s[30:31]426 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 false)427 ret <2 x i16> %ret428}429 430define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word1(<2 x i16> %old, float %src0, float %src1, float %scale) {431; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word1:432; GCN: ; %bb.0:433; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)434; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]435; GCN-NEXT: s_setpc_b64 s[30:31]436 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 true)437 ret <2 x i16> %ret438}439 440define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word0(<2 x i16> %old, float %src0, float %src1, float %scale) {441; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word0:442; GCN: ; %bb.0:443; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)444; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, v1, v2, v3445; GCN-NEXT: s_setpc_b64 s[30:31]446 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 false)447 ret <2 x i16> %ret448}449 450define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word1(<2 x i16> %old, float %src0, float %src1, float %scale) {451; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word1:452; GCN: ; %bb.0:453; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)454; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]455; GCN-NEXT: s_setpc_b64 s[30:31]456 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 true)457 ret <2 x i16> %ret458}459 460define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word1_fabs(<2 x i16> %old, float %src0, float %src1, float %scale) {461; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word1_fabs:462; GCN: ; %bb.0:463; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)464; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1465; GCN-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2466; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]467; GCN-NEXT: s_setpc_b64 s[30:31]468 %fabs.src0 = call float @llvm.fabs.f32(float %src0)469 %fabs.src1 = call float @llvm.fabs.f32(float %src1)470 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %fabs.src0, float %fabs.src1, float %scale, i1 true)471 ret <2 x i16> %ret472}473 474define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word1_fabs(<2 x i16> %old, float %src0, float %src1, float %scale) {475; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word1_fabs:476; GCN: ; %bb.0:477; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)478; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1479; GCN-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2480; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]481; GCN-NEXT: s_setpc_b64 s[30:31]482 %fabs.src0 = call float @llvm.fabs.f32(float %src0)483 %fabs.src1 = call float @llvm.fabs.f32(float %src1)484 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %fabs.src0, float %fabs.src1, float %scale, i1 true)485 ret <2 x i16> %ret486}487 488define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word1_fneg(<2 x i16> %old, float %src0, float %src1, float %scale) {489; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word1_fneg:490; GCN: ; %bb.0:491; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)492; GCN-NEXT: v_xor_b32_e32 v1, 0x80000000, v1493; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2494; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]495; GCN-NEXT: s_setpc_b64 s[30:31]496 %fneg.src0 = fneg float %src0497 %fneg.src1 = fneg float %src1498 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %fneg.src0, float %fneg.src1, float %scale, i1 true)499 ret <2 x i16> %ret500}501 502define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word1_fneg(<2 x i16> %old, float %src0, float %src1, float %scale) {503; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word1_fneg:504; GCN: ; %bb.0:505; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)506; GCN-NEXT: v_xor_b32_e32 v1, 0x80000000, v1507; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2508; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]509; GCN-NEXT: s_setpc_b64 s[30:31]510 %fneg.src0 = fneg float %src0511 %fneg.src1 = fneg float %src1512 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %fneg.src0, float %fneg.src1, float %scale, i1 true)513 ret <2 x i16> %ret514}515 516define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word1_fabs_fneg(<2 x i16> %old, float %src0, float %src1, float %scale) {517; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word1_fabs_fneg:518; GCN: ; %bb.0:519; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)520; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1521; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2522; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]523; GCN-NEXT: s_setpc_b64 s[30:31]524 %fabs.src0 = call float @llvm.fabs.f32(float %src0)525 %fneg.src1 = fneg float %src1526 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %fabs.src0, float %fneg.src1, float %scale, i1 true)527 ret <2 x i16> %ret528}529 530define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word1_fabs_fneg(<2 x i16> %old, float %src0, float %src1, float %scale) {531; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word1_fabs_fneg:532; GCN: ; %bb.0:533; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)534; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1535; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2536; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]537; GCN-NEXT: s_setpc_b64 s[30:31]538 %fabs.src0 = call float @llvm.fabs.f32(float %src0)539 %fneg.src1 = fneg float %src1540 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %fabs.src0, float %fneg.src1, float %scale, i1 true)541 ret <2 x i16> %ret542}543 544define <2 x float> @test_cvt_scalef32_pk_f32_fp8_word0(i32 %src, float %scale) {545; GCN-LABEL: test_cvt_scalef32_pk_f32_fp8_word0:546; GCN: ; %bb.0:547; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)548; GCN-NEXT: v_cvt_scalef32_pk_f32_fp8 v[0:1], v0, v1549; GCN-NEXT: s_setpc_b64 s[30:31]550 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp8(i32 %src, float %scale, i1 false)551 ret <2 x float> %ret552}553 554define <2 x float> @test_cvt_scalef32_pk_f32_fp8_word1(i32 %src, float %scale) {555; GCN-LABEL: test_cvt_scalef32_pk_f32_fp8_word1:556; GCN: ; %bb.0:557; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)558; GCN-NEXT: v_cvt_scalef32_pk_f32_fp8 v[0:1], v0, v1 op_sel:[1,0,0]559; GCN-NEXT: s_setpc_b64 s[30:31]560 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp8(i32 %src, float %scale, i1 true)561 ret <2 x float> %ret562}563 564define <2 x float> @test_cvt_scalef32_pk_f32_bf8_word0(i32 %src, float %scale) {565; GCN-LABEL: test_cvt_scalef32_pk_f32_bf8_word0:566; GCN: ; %bb.0:567; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)568; GCN-NEXT: v_cvt_scalef32_pk_f32_bf8 v[0:1], v0, v1569; GCN-NEXT: s_setpc_b64 s[30:31]570 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.bf8(i32 %src, float %scale, i1 false)571 ret <2 x float> %ret572}573 574define <2 x float> @test_cvt_scalef32_pk_f32_bf8_word1(i32 %src, float %scale) {575; GCN-LABEL: test_cvt_scalef32_pk_f32_bf8_word1:576; GCN: ; %bb.0:577; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)578; GCN-NEXT: v_cvt_scalef32_pk_f32_bf8 v[0:1], v0, v1 op_sel:[1,0,0]579; GCN-NEXT: s_setpc_b64 s[30:31]580 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.bf8(i32 %src, float %scale, i1 true)581 ret <2 x float> %ret582}583 584define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_word0(<2 x i16> %old, <2 x half> %src, float %scale) {585; GCN-LABEL: test_cvt_scalef32_pk_fp8_f16_word0:586; GCN: ; %bb.0:587; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)588; GCN-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, v1, v2589; GCN-NEXT: s_setpc_b64 s[30:31]590 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 false)591 ret <2 x i16> %ret592}593 594define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_word1(<2 x i16> %old, <2 x half> %src, float %scale) {595; GCN-LABEL: test_cvt_scalef32_pk_fp8_f16_word1:596; GCN: ; %bb.0:597; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)598; GCN-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, v1, v2 op_sel:[0,0,1]599; GCN-NEXT: s_setpc_b64 s[30:31]600 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 true)601 ret <2 x i16> %ret602}603 604define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_imm1(<2 x i16> %old, float %scale) {605; GCN-LABEL: test_cvt_scalef32_pk_fp8_f16_imm1:606; GCN: ; %bb.0:607; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)608; GCN-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, 4.0, v1609; GCN-NEXT: s_setpc_b64 s[30:31]610 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> <half 4.0, half 4.0>, float %scale, i1 false)611 ret <2 x i16> %ret612}613 614define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_imm2(<2 x i16> %old, float %scale) {615; GFX950-SDAG-LABEL: test_cvt_scalef32_pk_fp8_f16_imm2:616; GFX950-SDAG: ; %bb.0:617; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)618; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x40004400619; GFX950-SDAG-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, s0, v1620; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]621;622; GFX950-GISEL-LABEL: test_cvt_scalef32_pk_fp8_f16_imm2:623; GFX950-GISEL: ; %bb.0:624; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)625; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, 0x40004400626; GFX950-GISEL-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, v2, v1627; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]628 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> <half 4.0, half 2.0>, float %scale, i1 false)629 ret <2 x i16> %ret630}631 632define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_word0(<2 x i16> %old, <2 x bfloat> %src, float %scale) {633; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_word0:634; GCN: ; %bb.0:635; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)636; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, v1, v2637; GCN-NEXT: s_setpc_b64 s[30:31]638 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 false)639 ret <2 x i16> %ret640}641 642define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_word1(<2 x i16> %old, <2 x bfloat> %src, float %scale) {643; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_word1:644; GCN: ; %bb.0:645; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)646; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, v1, v2 op_sel:[0,0,1]647; GCN-NEXT: s_setpc_b64 s[30:31]648 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 true)649 ret <2 x i16> %ret650}651 652define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_imm1(<2 x i16> %old, float %scale) {653; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_imm1:654; GCN: ; %bb.0:655; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)656; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, 4.0, v1657; GCN-NEXT: s_setpc_b64 s[30:31]658 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> <bfloat 4.0, bfloat 4.0>, float %scale, i1 false)659 ret <2 x i16> %ret660}661 662define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_imm2(<2 x i16> %old, float %scale) {663; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_imm2:664; GCN: ; %bb.0:665; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)666; GCN-NEXT: s_mov_b32 s0, 0x40004080667; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, s0, v1668; GCN-NEXT: s_setpc_b64 s[30:31]669 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> <bfloat 4.0, bfloat 2.0>, float %scale, i1 false)670 ret <2 x i16> %ret671}672 673define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_word0(<2 x i16> %old, <2 x half> %src, float %scale) {674; GCN-LABEL: test_cvt_scalef32_pk_bf8_f16_word0:675; GCN: ; %bb.0:676; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)677; GCN-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, v1, v2678; GCN-NEXT: s_setpc_b64 s[30:31]679 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 false)680 ret <2 x i16> %ret681}682 683define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_word1(<2 x i16> %old, <2 x half> %src, float %scale) {684; GCN-LABEL: test_cvt_scalef32_pk_bf8_f16_word1:685; GCN: ; %bb.0:686; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)687; GCN-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, v1, v2 op_sel:[0,0,1]688; GCN-NEXT: s_setpc_b64 s[30:31]689 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 true)690 ret <2 x i16> %ret691}692 693define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_imm1(<2 x i16> %old, float %scale) {694; GCN-LABEL: test_cvt_scalef32_pk_bf8_f16_imm1:695; GCN: ; %bb.0:696; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)697; GCN-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, 4.0, v1698; GCN-NEXT: s_setpc_b64 s[30:31]699 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> <half 4.0, half 4.0>, float %scale, i1 false)700 ret <2 x i16> %ret701}702 703define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_imm2(<2 x i16> %old, float %scale) {704; GFX950-SDAG-LABEL: test_cvt_scalef32_pk_bf8_f16_imm2:705; GFX950-SDAG: ; %bb.0:706; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)707; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x40004400708; GFX950-SDAG-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, s0, v1709; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]710;711; GFX950-GISEL-LABEL: test_cvt_scalef32_pk_bf8_f16_imm2:712; GFX950-GISEL: ; %bb.0:713; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)714; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, 0x40004400715; GFX950-GISEL-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, v2, v1716; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]717 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> <half 4.0, half 2.0>, float %scale, i1 false)718 ret <2 x i16> %ret719}720 721define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_word0(<2 x i16> %old, <2 x bfloat> %src, float %scale) {722; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_word0:723; GCN: ; %bb.0:724; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)725; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, v1, v2726; GCN-NEXT: s_setpc_b64 s[30:31]727 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 false)728 ret <2 x i16> %ret729}730 731define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_word1(<2 x i16> %old, <2 x bfloat> %src, float %scale) {732; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_word1:733; GCN: ; %bb.0:734; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)735; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, v1, v2 op_sel:[0,0,1]736; GCN-NEXT: s_setpc_b64 s[30:31]737 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 true)738 ret <2 x i16> %ret739}740 741define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_imm1(<2 x i16> %old, float %scale) {742; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_imm1:743; GCN: ; %bb.0:744; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)745; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, 4.0, v1746; GCN-NEXT: s_setpc_b64 s[30:31]747 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> <bfloat 4.0, bfloat 4.0>, float %scale, i1 false)748 ret <2 x i16> %ret749}750 751define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_imm2(<2 x i16> %old, float %scale) {752; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_imm2:753; GCN: ; %bb.0:754; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)755; GCN-NEXT: s_mov_b32 s0, 0x40004080756; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, s0, v1757; GCN-NEXT: s_setpc_b64 s[30:31]758 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> <bfloat 4.0, bfloat 2.0>, float %scale, i1 false)759 ret <2 x i16> %ret760}761 762define <2 x float> @test_cvt_scale_f32_fp4_byte0(i32 %src, float %scale) {763; GCN-LABEL: test_cvt_scale_f32_fp4_byte0:764; GCN: ; %bb.0:765; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)766; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], v0, v1767; GCN-NEXT: s_setpc_b64 s[30:31]768 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 0)769 ret <2 x float> %ret770}771 772define <2 x float> @test_cvt_scale_f32_fp4_byte1(i32 %src, float %scale) {773; GCN-LABEL: test_cvt_scale_f32_fp4_byte1:774; GCN: ; %bb.0:775; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)776; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], v0, v1 op_sel:[1,0,0]777; GCN-NEXT: s_setpc_b64 s[30:31]778 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 1)779 ret <2 x float> %ret780}781 782define <2 x float> @test_cvt_scale_f32_fp4_byte2(i32 %src, float %scale) {783; GCN-LABEL: test_cvt_scale_f32_fp4_byte2:784; GCN: ; %bb.0:785; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)786; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], v0, v1 op_sel:[0,1,0]787; GCN-NEXT: s_setpc_b64 s[30:31]788 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 2)789 ret <2 x float> %ret790}791 792define <2 x float> @test_cvt_scale_f32_fp4_byte3(i32 %src, float %scale) {793; GCN-LABEL: test_cvt_scale_f32_fp4_byte3:794; GCN: ; %bb.0:795; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)796; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], v0, v1 op_sel:[1,1,0]797; GCN-NEXT: s_setpc_b64 s[30:31]798 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 3)799 ret <2 x float> %ret800}801 802define i32 @test_cvt_scale_fp4_f32_byte0(i32 %old, float %src0, float %src1, float %scale) {803; GCN-LABEL: test_cvt_scale_fp4_f32_byte0:804; GCN: ; %bb.0:805; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)806; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3807; GCN-NEXT: s_setpc_b64 s[30:31]808 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 0)809 ret i32 %ret810}811 812define i32 @test_cvt_scale_fp4_f32_byte1(i32 %old, float %src0, float %src1, float %scale) {813; GCN-LABEL: test_cvt_scale_fp4_f32_byte1:814; GCN: ; %bb.0:815; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)816; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,1,0]817; GCN-NEXT: s_setpc_b64 s[30:31]818 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 1)819 ret i32 %ret820}821 822define i32 @test_cvt_scale_fp4_f32_byte2(i32 %old, float %src0, float %src1, float %scale) {823; GCN-LABEL: test_cvt_scale_fp4_f32_byte2:824; GCN: ; %bb.0:825; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)826; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]827; GCN-NEXT: s_setpc_b64 s[30:31]828 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 2)829 ret i32 %ret830}831 832define i32 @test_cvt_scale_fp4_f32_byte3(i32 %old, float %src0, float %src1, float %scale) {833; GCN-LABEL: test_cvt_scale_fp4_f32_byte3:834; GCN: ; %bb.0:835; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)836; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,1,1]837; GCN-NEXT: s_setpc_b64 s[30:31]838 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 3)839 ret i32 %ret840}841 842define i32 @test_cvt_scale_fp4_f32_byte3_fabs(i32 %old, float %src0, float %src1, float %scale) {843; GCN-LABEL: test_cvt_scale_fp4_f32_byte3_fabs:844; GCN: ; %bb.0:845; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)846; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1847; GCN-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2848; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,1,1]849; GCN-NEXT: s_setpc_b64 s[30:31]850 %fabs.src0 = call float @llvm.fabs.f32(float %src0)851 %fabs.src1 = call float @llvm.fabs.f32(float %src1)852 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %fabs.src0, float %fabs.src1, float %scale, i32 3)853 ret i32 %ret854}855 856define i32 @test_cvt_scale_fp4_f32_byte3_fneg(i32 %old, float %src0, float %src1, float %scale) {857; GCN-LABEL: test_cvt_scale_fp4_f32_byte3_fneg:858; GCN: ; %bb.0:859; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)860; GCN-NEXT: v_xor_b32_e32 v1, 0x80000000, v1861; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2862; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,1,1]863; GCN-NEXT: s_setpc_b64 s[30:31]864 %fneg.src0 = fneg float %src0865 %fneg.src1 = fneg float %src1866 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %fneg.src0, float %fneg.src1, float %scale, i32 3)867 ret i32 %ret868}869 870define i32 @test_cvt_scale_fp4_f32_byte3_fabs_fneg(i32 %old, float %src0, float %src1, float %scale) {871; GCN-LABEL: test_cvt_scale_fp4_f32_byte3_fabs_fneg:872; GCN: ; %bb.0:873; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)874; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1875; GCN-NEXT: v_xor_b32_e32 v2, 0x80000000, v2876; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, v1, v2, v3 op_sel:[0,0,1,1]877; GCN-NEXT: s_setpc_b64 s[30:31]878 %fabs.src0 = call float @llvm.fabs.f32(float %src0)879 %fneg.src1 = fneg float %src1880 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %fabs.src0, float %fneg.src1, float %scale, i32 3)881 ret i32 %ret882}883 884define <2 x half> @test_cvt_scale_f16_fp4_byte0(i32 %src, float %scale) {885; GCN-LABEL: test_cvt_scale_f16_fp4_byte0:886; GCN: ; %bb.0:887; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)888; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, v0, v1889; GCN-NEXT: s_setpc_b64 s[30:31]890 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 0)891 ret <2 x half> %ret892}893 894define <2 x half> @test_cvt_scale_f16_fp4_byte1(i32 %src, float %scale) {895; GCN-LABEL: test_cvt_scale_f16_fp4_byte1:896; GCN: ; %bb.0:897; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)898; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, v0, v1 op_sel:[1,0,0]899; GCN-NEXT: s_setpc_b64 s[30:31]900 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 1)901 ret <2 x half> %ret902}903 904define <2 x half> @test_cvt_scale_f16_fp4_byte2(i32 %src, float %scale) {905; GCN-LABEL: test_cvt_scale_f16_fp4_byte2:906; GCN: ; %bb.0:907; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)908; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, v0, v1 op_sel:[0,1,0]909; GCN-NEXT: s_setpc_b64 s[30:31]910 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 2)911 ret <2 x half> %ret912}913 914define <2 x half> @test_cvt_scale_f16_fp4_byte3(i32 %src, float %scale) {915; GCN-LABEL: test_cvt_scale_f16_fp4_byte3:916; GCN: ; %bb.0:917; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)918; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, v0, v1 op_sel:[1,1,0]919; GCN-NEXT: s_setpc_b64 s[30:31]920 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 3)921 ret <2 x half> %ret922}923 924define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte0(i32 %src, float %scale) {925; GCN-LABEL: test_cvt_scale_bf16_fp4_byte0:926; GCN: ; %bb.0:927; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)928; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, v0, v1929; GCN-NEXT: s_setpc_b64 s[30:31]930 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 0)931 ret <2 x bfloat> %ret932}933 934define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte1(i32 %src, float %scale) {935; GCN-LABEL: test_cvt_scale_bf16_fp4_byte1:936; GCN: ; %bb.0:937; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)938; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, v0, v1 op_sel:[1,0,0]939; GCN-NEXT: s_setpc_b64 s[30:31]940 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 1)941 ret <2 x bfloat> %ret942}943 944define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte2(i32 %src, float %scale) {945; GCN-LABEL: test_cvt_scale_bf16_fp4_byte2:946; GCN: ; %bb.0:947; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)948; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, v0, v1 op_sel:[0,1,0]949; GCN-NEXT: s_setpc_b64 s[30:31]950 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 2)951 ret <2 x bfloat> %ret952}953 954define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte3(i32 %src, float %scale) {955; GCN-LABEL: test_cvt_scale_bf16_fp4_byte3:956; GCN: ; %bb.0:957; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)958; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, v0, v1 op_sel:[1,1,0]959; GCN-NEXT: s_setpc_b64 s[30:31]960 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 3)961 ret <2 x bfloat> %ret962}963 964define <32 x float> @test_cvt_scale_pk32_f32_fp6(<6 x i32> %src, float %scale) {965; GFX950-SDAG-LABEL: test_cvt_scale_pk32_f32_fp6:966; GFX950-SDAG: ; %bb.0:967; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)968; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, v6969; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, v5970; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, v4971; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, v3972; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, v2973; GFX950-SDAG-NEXT: v_mov_b32_e32 v33, v1974; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v0975; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[32:37], v38976; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]977;978; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_fp6:979; GFX950-GISEL: ; %bb.0:980; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)981; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v0982; GFX950-GISEL-NEXT: v_mov_b32_e32 v33, v1983; GFX950-GISEL-NEXT: v_mov_b32_e32 v34, v2984; GFX950-GISEL-NEXT: v_mov_b32_e32 v35, v3985; GFX950-GISEL-NEXT: v_mov_b32_e32 v36, v4986; GFX950-GISEL-NEXT: v_mov_b32_e32 v37, v5987; GFX950-GISEL-NEXT: v_mov_b32_e32 v38, v6988; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[32:37], v38989; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]990 %ret = tail call <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.fp6(<6 x i32> %src, float %scale)991 ret <32 x float> %ret992}993 994define <32 x float> @test_cvt_scale_pk32_f32_bf6(<6 x i32> %src, float %scale) {995; GFX950-SDAG-LABEL: test_cvt_scale_pk32_f32_bf6:996; GFX950-SDAG: ; %bb.0:997; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)998; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, v6999; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, v51000; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, v41001; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, v31002; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, v21003; GFX950-SDAG-NEXT: v_mov_b32_e32 v33, v11004; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v01005; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[32:37], v381006; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1007;1008; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_bf6:1009; GFX950-GISEL: ; %bb.0:1010; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1011; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v01012; GFX950-GISEL-NEXT: v_mov_b32_e32 v33, v11013; GFX950-GISEL-NEXT: v_mov_b32_e32 v34, v21014; GFX950-GISEL-NEXT: v_mov_b32_e32 v35, v31015; GFX950-GISEL-NEXT: v_mov_b32_e32 v36, v41016; GFX950-GISEL-NEXT: v_mov_b32_e32 v37, v51017; GFX950-GISEL-NEXT: v_mov_b32_e32 v38, v61018; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[32:37], v381019; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1020 %ret = tail call <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.bf6(<6 x i32> %src, float %scale)1021 ret <32 x float> %ret1022}1023 1024define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_vv(<6 x i32> %src, float %scale) {1025; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_vv:1026; GFX950-SDAG: ; %bb.0:1027; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1028; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, v61029; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, v51030; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, v41031; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v31032; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v21033; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, v11034; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v01035; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v221036; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1037;1038; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_fp6_vv:1039; GFX950-GISEL: ; %bb.0:1040; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1041; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v01042; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, v11043; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v21044; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v31045; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v41046; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v51047; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, v61048; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v221049; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1050 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.fp6(<6 x i32> %src, float %scale)1051 ret <32 x half> %ret1052}1053 1054define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_sl(<6 x i32> inreg %src) {1055; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl:1056; GFX950-SDAG: ; %bb.0:1057; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1058; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s01059; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s11060; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s21061; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s31062; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s161063; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s171064; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c800001065; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], s01066; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1067;1068; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl:1069; GFX950-GISEL: ; %bb.0:1070; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1071; GFX950-GISEL-NEXT: s_mov_b32 s4, s161072; GFX950-GISEL-NEXT: s_mov_b32 s5, s171073; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[4:5]1074; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[2:3]1075; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[0:1]1076; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, 0x42c800001077; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v221078; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1079 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.fp6(<6 x i32> %src, float 100.0)1080 ret <32 x half> %ret1081}1082 1083define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_vv(<6 x i32> %src, float %scale) {1084; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_vv:1085; GCN: ; %bb.0:1086; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1087; GCN-NEXT: v_mov_b32_e32 v22, v61088; GCN-NEXT: v_mov_b32_e32 v21, v51089; GCN-NEXT: v_mov_b32_e32 v20, v41090; GCN-NEXT: v_mov_b32_e32 v19, v31091; GCN-NEXT: v_mov_b32_e32 v18, v21092; GCN-NEXT: v_mov_b32_e32 v17, v11093; GCN-NEXT: v_mov_b32_e32 v16, v01094; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], v221095; GCN-NEXT: s_setpc_b64 s[30:31]1096 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float %scale)1097 ret <32 x bfloat> %ret1098}1099 1100define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_sl(<6 x i32> inreg %src) {1101; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_sl:1102; GCN: ; %bb.0:1103; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1104; GCN-NEXT: v_mov_b32_e32 v16, s01105; GCN-NEXT: v_mov_b32_e32 v17, s11106; GCN-NEXT: v_mov_b32_e32 v18, s21107; GCN-NEXT: v_mov_b32_e32 v19, s31108; GCN-NEXT: v_mov_b32_e32 v20, s161109; GCN-NEXT: v_mov_b32_e32 v21, s171110; GCN-NEXT: s_mov_b32 s0, 0x42c800001111; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], s01112; GCN-NEXT: s_setpc_b64 s[30:31]1113 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float 100.0)1114 ret <32 x bfloat> %ret1115}1116 1117define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_vv(<6 x i32> %src, float %scale) {1118; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_vv:1119; GFX950-SDAG: ; %bb.0:1120; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1121; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, v61122; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, v51123; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, v41124; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v31125; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v21126; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, v11127; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v01128; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v221129; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1130;1131; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_bf6_vv:1132; GFX950-GISEL: ; %bb.0:1133; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1134; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v01135; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, v11136; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v21137; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v31138; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v41139; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v51140; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, v61141; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v221142; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1143 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.bf6(<6 x i32> %src, float %scale)1144 ret <32 x half> %ret1145}1146 1147define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_sl(<6 x i32> inreg %src) {1148; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl:1149; GFX950-SDAG: ; %bb.0:1150; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1151; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s01152; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s11153; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s21154; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s31155; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s161156; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s171157; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c800001158; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], s01159; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1160;1161; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl:1162; GFX950-GISEL: ; %bb.0:1163; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1164; GFX950-GISEL-NEXT: s_mov_b32 s4, s161165; GFX950-GISEL-NEXT: s_mov_b32 s5, s171166; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[4:5]1167; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[2:3]1168; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[0:1]1169; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, 0x42c800001170; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v221171; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1172 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.bf6(<6 x i32> %src, float 100.0)1173 ret <32 x half> %ret1174}1175 1176define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_vv(<6 x i32> %src, float %scale) {1177; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_vv:1178; GCN: ; %bb.0:1179; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1180; GCN-NEXT: v_mov_b32_e32 v22, v61181; GCN-NEXT: v_mov_b32_e32 v21, v51182; GCN-NEXT: v_mov_b32_e32 v20, v41183; GCN-NEXT: v_mov_b32_e32 v19, v31184; GCN-NEXT: v_mov_b32_e32 v18, v21185; GCN-NEXT: v_mov_b32_e32 v17, v11186; GCN-NEXT: v_mov_b32_e32 v16, v01187; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], v221188; GCN-NEXT: s_setpc_b64 s[30:31]1189 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float %scale)1190 ret <32 x bfloat> %ret1191}1192 1193define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_sl(<6 x i32> inreg %src) {1194; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_sl:1195; GCN: ; %bb.0:1196; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1197; GCN-NEXT: v_mov_b32_e32 v16, s01198; GCN-NEXT: v_mov_b32_e32 v17, s11199; GCN-NEXT: v_mov_b32_e32 v18, s21200; GCN-NEXT: v_mov_b32_e32 v19, s31201; GCN-NEXT: v_mov_b32_e32 v20, s161202; GCN-NEXT: v_mov_b32_e32 v21, s171203; GCN-NEXT: s_mov_b32 s0, 0x42c800001204; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], s01205; GCN-NEXT: s_setpc_b64 s[30:31]1206 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float 100.0)1207 ret <32 x bfloat> %ret1208}1209 1210define <2 x half> @test_cvt_scalef32_pk_f16_fp8_word0(i32 %src, float %scale) {1211; GCN-LABEL: test_cvt_scalef32_pk_f16_fp8_word0:1212; GCN: ; %bb.0:1213; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1214; GCN-NEXT: v_cvt_scalef32_pk_f16_fp8 v0, v0, v11215; GCN-NEXT: s_setpc_b64 s[30:31]1216 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp8(i32 %src, float %scale, i1 false)1217 ret <2 x half> %ret1218}1219 1220define <2 x half> @test_cvt_scalef32_pk_f16_fp8_word1(i32 %src, float %scale) {1221; GCN-LABEL: test_cvt_scalef32_pk_f16_fp8_word1:1222; GCN: ; %bb.0:1223; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1224; GCN-NEXT: v_cvt_scalef32_pk_f16_fp8 v0, v0, v1 op_sel:[1,0,0]1225; GCN-NEXT: s_setpc_b64 s[30:31]1226 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp8(i32 %src, float %scale, i1 true)1227 ret <2 x half> %ret1228}1229 1230define <2 x half> @test_cvt_scalef32_pk_f16_bf8_word0(i32 %src, float %scale) {1231; GCN-LABEL: test_cvt_scalef32_pk_f16_bf8_word0:1232; GCN: ; %bb.0:1233; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1234; GCN-NEXT: v_cvt_scalef32_pk_f16_bf8 v0, v0, v11235; GCN-NEXT: s_setpc_b64 s[30:31]1236 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.bf8(i32 %src, float %scale, i1 false)1237 ret <2 x half> %ret1238}1239 1240define <2 x half> @test_cvt_scalef32_pk_f16_bf8_word1(i32 %src, float %scale) {1241; GCN-LABEL: test_cvt_scalef32_pk_f16_bf8_word1:1242; GCN: ; %bb.0:1243; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1244; GCN-NEXT: v_cvt_scalef32_pk_f16_bf8 v0, v0, v1 op_sel:[1,0,0]1245; GCN-NEXT: s_setpc_b64 s[30:31]1246 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.bf8(i32 %src, float %scale, i1 true)1247 ret <2 x half> %ret1248}1249 1250define <2 x bfloat> @test_cvt_scalef32_pk_bf16_fp8_word0(i32 %src, float %scale) {1251; GCN-LABEL: test_cvt_scalef32_pk_bf16_fp8_word0:1252; GCN: ; %bb.0:1253; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1254; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp8 v0, v0, v11255; GCN-NEXT: s_setpc_b64 s[30:31]1256 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp8(i32 %src, float %scale, i1 false)1257 ret <2 x bfloat> %ret1258}1259 1260define <2 x bfloat> @test_cvt_scalef32_pk_bf16_fp8_word1(i32 %src, float %scale) {1261; GCN-LABEL: test_cvt_scalef32_pk_bf16_fp8_word1:1262; GCN: ; %bb.0:1263; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1264; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp8 v0, v0, v1 op_sel:[1,0,0]1265; GCN-NEXT: s_setpc_b64 s[30:31]1266 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp8(i32 %src, float %scale, i1 true)1267 ret <2 x bfloat> %ret1268}1269 1270define <2 x bfloat> @test_cvt_scalef32_pk_bf16_bf8_word0(i32 %src, float %scale) {1271; GCN-LABEL: test_cvt_scalef32_pk_bf16_bf8_word0:1272; GCN: ; %bb.0:1273; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1274; GCN-NEXT: v_cvt_scalef32_pk_bf16_bf8 v0, v0, v11275; GCN-NEXT: s_setpc_b64 s[30:31]1276 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.bf8(i32 %src, float %scale, i1 false)1277 ret <2 x bfloat> %ret1278}1279 1280define <2 x bfloat> @test_cvt_scalef32_pk_bf16_bf8_word1(i32 %src, float %scale) {1281; GCN-LABEL: test_cvt_scalef32_pk_bf16_bf8_word1:1282; GCN: ; %bb.0:1283; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1284; GCN-NEXT: v_cvt_scalef32_pk_bf16_bf8 v0, v0, v1 op_sel:[1,0,0]1285; GCN-NEXT: s_setpc_b64 s[30:31]1286 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.bf8(i32 %src, float %scale, i1 true)1287 ret <2 x bfloat> %ret1288}1289 1290define i32 @test_cvt_scalef32_fp4_f16_byte0(<2 x half> %src0, float %scale, i32 %old) {1291; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte0:1292; GCN: ; %bb.0:1293; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1294; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v2, v0, v11295; GCN-NEXT: v_mov_b32_e32 v0, v21296; GCN-NEXT: s_setpc_b64 s[30:31]1297 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 0)1298 ret i32 %ret1299}1300 1301define i32 @test_cvt_scalef32_fp4_f16_byte1(<2 x half> %src0, float %scale, i32 %old) {1302; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte1:1303; GCN: ; %bb.0:1304; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1305; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v2, v0, v1 op_sel:[0,0,1,0]1306; GCN-NEXT: s_nop 01307; GCN-NEXT: v_mov_b32_e32 v0, v21308; GCN-NEXT: s_setpc_b64 s[30:31]1309 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 1)1310 ret i32 %ret1311}1312 1313define i32 @test_cvt_scalef32_fp4_f16_byte2(<2 x half> %src0, float %scale, i32 %old) {1314; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte2:1315; GCN: ; %bb.0:1316; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1317; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v2, v0, v1 op_sel:[0,0,0,1]1318; GCN-NEXT: s_nop 01319; GCN-NEXT: v_mov_b32_e32 v0, v21320; GCN-NEXT: s_setpc_b64 s[30:31]1321 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 2)1322 ret i32 %ret1323}1324 1325define i32 @test_cvt_scalef32_fp4_f16_byte3(<2 x half> %src0, float %scale, i32 %old) {1326; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte3:1327; GCN: ; %bb.0:1328; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1329; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v2, v0, v1 op_sel:[0,0,1,1]1330; GCN-NEXT: s_nop 01331; GCN-NEXT: v_mov_b32_e32 v0, v21332; GCN-NEXT: s_setpc_b64 s[30:31]1333 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 3)1334 ret i32 %ret1335}1336 1337define i32 @test_cvt_scalef32_fp4_f16_imm1(float %scale, i32 %old) {1338; GCN-LABEL: test_cvt_scalef32_fp4_f16_imm1:1339; GCN: ; %bb.0:1340; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1341; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, 4.0, v01342; GCN-NEXT: v_mov_b32_e32 v0, v11343; GCN-NEXT: s_setpc_b64 s[30:31]1344 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> <half 4.0, half 4.0>, float %scale, i32 0)1345 ret i32 %ret1346}1347 1348define i32 @test_cvt_scalef32_fp4_f16_imm2(float %scale, i32 %old) {1349; GFX950-SDAG-LABEL: test_cvt_scalef32_fp4_f16_imm2:1350; GFX950-SDAG: ; %bb.0:1351; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1352; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x400044001353; GFX950-SDAG-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, s0, v01354; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, v11355; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1356;1357; GFX950-GISEL-LABEL: test_cvt_scalef32_fp4_f16_imm2:1358; GFX950-GISEL: ; %bb.0:1359; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1360; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, 0x400044001361; GFX950-GISEL-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, v2, v01362; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, v11363; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]1364 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> <half 4.0, half 2.0>, float %scale, i32 0)1365 ret i32 %ret1366}1367 1368define i32 @test_cvt_scalef32_fp4_bf16_byte0(<2 x bfloat> %src0, float %scale, i32 %old) {1369; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte0:1370; GCN: ; %bb.0:1371; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1372; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v2, v0, v11373; GCN-NEXT: v_mov_b32_e32 v0, v21374; GCN-NEXT: s_setpc_b64 s[30:31]1375 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 0)1376 ret i32 %ret1377}1378 1379define i32 @test_cvt_scalef32_fp4_bf16_byte1(<2 x bfloat> %src0, float %scale, i32 %old) {1380; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte1:1381; GCN: ; %bb.0:1382; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1383; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v2, v0, v1 op_sel:[0,0,1,0]1384; GCN-NEXT: s_nop 01385; GCN-NEXT: v_mov_b32_e32 v0, v21386; GCN-NEXT: s_setpc_b64 s[30:31]1387 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 1)1388 ret i32 %ret1389}1390 1391define i32 @test_cvt_scalef32_fp4_bf16_byte2(<2 x bfloat> %src0, float %scale, i32 %old) {1392; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte2:1393; GCN: ; %bb.0:1394; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1395; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v2, v0, v1 op_sel:[0,0,0,1]1396; GCN-NEXT: s_nop 01397; GCN-NEXT: v_mov_b32_e32 v0, v21398; GCN-NEXT: s_setpc_b64 s[30:31]1399 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 2)1400 ret i32 %ret1401}1402 1403define i32 @test_cvt_scalef32_fp4_bf16_byte3(<2 x bfloat> %src0, float %scale, i32 %old) {1404; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte3:1405; GCN: ; %bb.0:1406; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1407; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v2, v0, v1 op_sel:[0,0,1,1]1408; GCN-NEXT: s_nop 01409; GCN-NEXT: v_mov_b32_e32 v0, v21410; GCN-NEXT: s_setpc_b64 s[30:31]1411 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 3)1412 ret i32 %ret1413}1414 1415define i32 @test_cvt_scalef32_fp4_bf16_imm1(float %scale, i32 %old) {1416; GCN-LABEL: test_cvt_scalef32_fp4_bf16_imm1:1417; GCN: ; %bb.0:1418; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1419; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, 4.0, v01420; GCN-NEXT: v_mov_b32_e32 v0, v11421; GCN-NEXT: s_setpc_b64 s[30:31]1422 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> <bfloat 4.0, bfloat 4.0>, float %scale, i32 0)1423 ret i32 %ret1424}1425 1426define i32 @test_cvt_scalef32_fp4_bf16_imm2(float %scale, i32 %old) {1427; GCN-LABEL: test_cvt_scalef32_fp4_bf16_imm2:1428; GCN: ; %bb.0:1429; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1430; GCN-NEXT: s_mov_b32 s0, 0x400040801431; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, s0, v01432; GCN-NEXT: v_mov_b32_e32 v0, v11433; GCN-NEXT: s_setpc_b64 s[30:31]1434 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> <bfloat 4.0, bfloat 2.0>, float %scale, i32 0)1435 ret i32 %ret1436}1437 1438define amdgpu_ps void @test_scalef32_pk32_fp6_f32_vv_inreg_src(<16 x float> inreg %src, float %scale, ptr addrspace(1) %out) {1439; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f32_vv_inreg_src:1440; GFX950-SDAG: ; %bb.0:1441; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v21442; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1443; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1444; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1445; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1446; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1447; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1448; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1449; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1450; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v11451; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[0:5], v[2:17], v[2:17], v01452; GFX950-SDAG-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:161453; GFX950-SDAG-NEXT: global_store_dwordx4 v[18:19], v[0:3], off1454; GFX950-SDAG-NEXT: s_endpgm1455;1456; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_f32_vv_inreg_src:1457; GFX950-GISEL: ; %bb.0:1458; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v21459; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1460; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1461; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1462; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1463; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1464; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1465; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1466; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1467; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v11468; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[0:5], v[2:17], v[2:17], v01469; GFX950-GISEL-NEXT: global_store_dwordx4 v[18:19], v[0:3], off1470; GFX950-GISEL-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:161471; GFX950-GISEL-NEXT: s_endpgm1472 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32(<16 x float> %src, <16 x float> %src, float %scale)1473 store <6 x i32> %cvt, ptr addrspace(1) %out, align 81474 ret void1475}1476 1477define amdgpu_ps void @test_scalef32_pk32_fp6_f32_sl_inreg_src(<16 x float> inreg %src, ptr addrspace(1) %out) {1478; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f32_sl_inreg_src:1479; GFX950-SDAG: ; %bb.0:1480; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1481; GFX950-SDAG-NEXT: s_mov_b32 s16, 0x42c800001482; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1483; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1484; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1485; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1486; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1487; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1488; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1489; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[2:7], v[2:17], v[2:17], s161490; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:161491; GFX950-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off1492; GFX950-SDAG-NEXT: s_endpgm1493;1494; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_f32_sl_inreg_src:1495; GFX950-GISEL: ; %bb.0:1496; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1497; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1498; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1499; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1500; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1501; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1502; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1503; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1504; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, 0x42c800001505; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_fp6_f32 v[2:7], v[2:17], v[2:17], v181506; GFX950-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off1507; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:161508; GFX950-GISEL-NEXT: s_endpgm1509 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32(<16 x float> %src, <16 x float> %src, float 100.0)1510 store <6 x i32> %cvt, ptr addrspace(1) %out, align 81511 ret void1512}1513 1514define amdgpu_ps void @test_scalef32_pk32_bf6_f32_vv_inreg_src(<16 x float> inreg %src, float %scale, ptr addrspace(1) %out) {1515; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f32_vv_inreg_src:1516; GFX950-SDAG: ; %bb.0:1517; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v21518; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1519; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1520; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1521; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1522; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1523; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1524; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1525; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1526; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v11527; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[0:5], v[2:17], v[2:17], v01528; GFX950-SDAG-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:161529; GFX950-SDAG-NEXT: global_store_dwordx4 v[18:19], v[0:3], off1530; GFX950-SDAG-NEXT: s_endpgm1531;1532; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_f32_vv_inreg_src:1533; GFX950-GISEL: ; %bb.0:1534; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v21535; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1536; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1537; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1538; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1539; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1540; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1541; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1542; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1543; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v11544; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[0:5], v[2:17], v[2:17], v01545; GFX950-GISEL-NEXT: global_store_dwordx4 v[18:19], v[0:3], off1546; GFX950-GISEL-NEXT: global_store_dwordx2 v[18:19], v[4:5], off offset:161547; GFX950-GISEL-NEXT: s_endpgm1548 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32(<16 x float> %src, <16 x float> %src, float %scale)1549 store <6 x i32> %cvt, ptr addrspace(1) %out, align 81550 ret void1551}1552 1553define amdgpu_ps void @test_scalef32_pk32_bf6_f32_sl_inreg_src(<16 x float> inreg inreg %src, ptr addrspace(1) %out) {1554; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f32_sl_inreg_src:1555; GFX950-SDAG: ; %bb.0:1556; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1557; GFX950-SDAG-NEXT: s_mov_b32 s16, 0x42c800001558; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1559; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1560; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1561; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1562; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1563; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1564; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1565; GFX950-SDAG-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[2:7], v[2:17], v[2:17], s161566; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:161567; GFX950-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off1568; GFX950-SDAG-NEXT: s_endpgm1569;1570; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_f32_sl_inreg_src:1571; GFX950-GISEL: ; %bb.0:1572; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]1573; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]1574; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]1575; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]1576; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]1577; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]1578; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]1579; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]1580; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, 0x42c800001581; GFX950-GISEL-NEXT: v_cvt_scalef32_2xpk16_bf6_f32 v[2:7], v[2:17], v[2:17], v181582; GFX950-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off1583; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:161584; GFX950-GISEL-NEXT: s_endpgm1585 %cvt = tail call <6 x i32> @llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32(<16 x float> %src, <16 x float> %src, float 100.0)1586 store <6 x i32> %cvt, ptr addrspace(1) %out, align 81587 ret void1588}1589 1590define <2 x half> @test_cvt_scalef32_f16_fp8_byte0_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1591; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte0_dst_lo_inreg_src:1592; GCN: ; %bb.0:1593; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1594; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v01595; GCN-NEXT: v_mov_b32_e32 v0, v11596; GCN-NEXT: s_setpc_b64 s[30:31]1597 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 false)1598 ret <2 x half> %ret1599}1600 1601define <2 x half> @test_cvt_scalef32_f16_fp8_byte1_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1602; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte1_dst_lo_inreg_src:1603; GCN: ; %bb.0:1604; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1605; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[1,0,0]1606; GCN-NEXT: v_mov_b32_e32 v0, v11607; GCN-NEXT: s_setpc_b64 s[30:31]1608 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 false)1609 ret <2 x half> %ret1610}1611 1612define <2 x half> @test_cvt_scalef32_f16_fp8_byte2_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1613; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte2_dst_lo_inreg_src:1614; GCN: ; %bb.0:1615; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1616; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[0,1,0]1617; GCN-NEXT: v_mov_b32_e32 v0, v11618; GCN-NEXT: s_setpc_b64 s[30:31]1619 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 false)1620 ret <2 x half> %ret1621}1622 1623define <2 x half> @test_cvt_scalef32_f16_fp8_byte3_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1624; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte3_dst_lo_inreg_src:1625; GCN: ; %bb.0:1626; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1627; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[1,1,0]1628; GCN-NEXT: v_mov_b32_e32 v0, v11629; GCN-NEXT: s_setpc_b64 s[30:31]1630 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 false)1631 ret <2 x half> %ret1632}1633 1634define <2 x half> @test_cvt_scalef32_f16_fp8_byte0_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1635; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte0_dst_hi_inreg_src:1636; GCN: ; %bb.0:1637; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1638; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[0,0,1]1639; GCN-NEXT: s_nop 01640; GCN-NEXT: v_mov_b32_e32 v0, v11641; GCN-NEXT: s_setpc_b64 s[30:31]1642 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 true)1643 ret <2 x half> %ret1644}1645 1646define <2 x half> @test_cvt_scalef32_f16_fp8_byte1_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1647; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte1_dst_hi_inreg_src:1648; GCN: ; %bb.0:1649; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1650; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[1,0,1]1651; GCN-NEXT: s_nop 01652; GCN-NEXT: v_mov_b32_e32 v0, v11653; GCN-NEXT: s_setpc_b64 s[30:31]1654 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 true)1655 ret <2 x half> %ret1656}1657 1658define <2 x half> @test_cvt_scalef32_f16_fp8_byte2_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1659; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte2_dst_hi_inreg_src:1660; GCN: ; %bb.0:1661; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1662; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[0,1,1]1663; GCN-NEXT: s_nop 01664; GCN-NEXT: v_mov_b32_e32 v0, v11665; GCN-NEXT: s_setpc_b64 s[30:31]1666 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 true)1667 ret <2 x half> %ret1668}1669 1670define <2 x half> @test_cvt_scalef32_f16_fp8_byte3_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1671; GCN-LABEL: test_cvt_scalef32_f16_fp8_byte3_dst_hi_inreg_src:1672; GCN: ; %bb.0:1673; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1674; GCN-NEXT: v_cvt_scalef32_f16_fp8 v1, s0, v0 op_sel:[1,1,1]1675; GCN-NEXT: s_nop 01676; GCN-NEXT: v_mov_b32_e32 v0, v11677; GCN-NEXT: s_setpc_b64 s[30:31]1678 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.fp8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 true)1679 ret <2 x half> %ret1680}1681 1682define float @test_cvt_scalef32_f32_fp8_byte0_inreg_src(i32 inreg %src, float %scale) {1683; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte0_inreg_src:1684; GCN: ; %bb.0:1685; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1686; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, s0, v01687; GCN-NEXT: s_setpc_b64 s[30:31]1688 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 0)1689 ret float %ret1690}1691 1692define float @test_cvt_scalef32_f32_fp8_byte1_inreg_src(i32 inreg %src, float %scale) {1693; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte1_inreg_src:1694; GCN: ; %bb.0:1695; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1696; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, s0, v0 op_sel:[1,0,0]1697; GCN-NEXT: s_setpc_b64 s[30:31]1698 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 1)1699 ret float %ret1700}1701 1702define float @test_cvt_scalef32_f32_fp8_byte2_inreg_src(i32 inreg %src, float %scale) {1703; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte2_inreg_src:1704; GCN: ; %bb.0:1705; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1706; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, s0, v0 op_sel:[0,1,0]1707; GCN-NEXT: s_setpc_b64 s[30:31]1708 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 2)1709 ret float %ret1710}1711 1712define float @test_cvt_scalef32_f32_fp8_byte3_inreg_src(i32 inreg %src, float %scale) {1713; GCN-LABEL: test_cvt_scalef32_f32_fp8_byte3_inreg_src:1714; GCN: ; %bb.0:1715; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1716; GCN-NEXT: v_cvt_scalef32_f32_fp8 v0, s0, v0 op_sel:[1,1,0]1717; GCN-NEXT: s_setpc_b64 s[30:31]1718 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.fp8(i32 %src, float %scale, i32 3)1719 ret float %ret1720}1721 1722define <2 x half> @test_cvt_scalef32_f16_bf8_byte0_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1723; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte0_dst_lo_inreg_src:1724; GCN: ; %bb.0:1725; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1726; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v01727; GCN-NEXT: v_mov_b32_e32 v0, v11728; GCN-NEXT: s_setpc_b64 s[30:31]1729 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 false)1730 ret <2 x half> %ret1731}1732 1733define <2 x half> @test_cvt_scalef32_f16_bf8_byte1_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1734; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte1_dst_lo_inreg_src:1735; GCN: ; %bb.0:1736; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1737; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[1,0,0]1738; GCN-NEXT: v_mov_b32_e32 v0, v11739; GCN-NEXT: s_setpc_b64 s[30:31]1740 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 false)1741 ret <2 x half> %ret1742}1743 1744define <2 x half> @test_cvt_scalef32_f16_bf8_byte2_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1745; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte2_dst_lo_inreg_src:1746; GCN: ; %bb.0:1747; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1748; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[0,1,0]1749; GCN-NEXT: v_mov_b32_e32 v0, v11750; GCN-NEXT: s_setpc_b64 s[30:31]1751 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 false)1752 ret <2 x half> %ret1753}1754 1755define <2 x half> @test_cvt_scalef32_f16_bf8_byte3_dst_lo_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1756; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte3_dst_lo_inreg_src:1757; GCN: ; %bb.0:1758; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1759; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[1,1,0]1760; GCN-NEXT: v_mov_b32_e32 v0, v11761; GCN-NEXT: s_setpc_b64 s[30:31]1762 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 false)1763 ret <2 x half> %ret1764}1765 1766define <2 x half> @test_cvt_scalef32_f16_bf8_byte0_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1767; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte0_dst_hi_inreg_src:1768; GCN: ; %bb.0:1769; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1770; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[0,0,1]1771; GCN-NEXT: s_nop 01772; GCN-NEXT: v_mov_b32_e32 v0, v11773; GCN-NEXT: s_setpc_b64 s[30:31]1774 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 0, i1 true)1775 ret <2 x half> %ret1776}1777 1778define <2 x half> @test_cvt_scalef32_f16_bf8_byte1_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1779; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte1_dst_hi_inreg_src:1780; GCN: ; %bb.0:1781; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1782; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[1,0,1]1783; GCN-NEXT: s_nop 01784; GCN-NEXT: v_mov_b32_e32 v0, v11785; GCN-NEXT: s_setpc_b64 s[30:31]1786 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 1, i1 true)1787 ret <2 x half> %ret1788}1789 1790define <2 x half> @test_cvt_scalef32_f16_bf8_byte2_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1791; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte2_dst_hi_inreg_src:1792; GCN: ; %bb.0:1793; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1794; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[0,1,1]1795; GCN-NEXT: s_nop 01796; GCN-NEXT: v_mov_b32_e32 v0, v11797; GCN-NEXT: s_setpc_b64 s[30:31]1798 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 2, i1 true)1799 ret <2 x half> %ret1800}1801 1802define <2 x half> @test_cvt_scalef32_f16_bf8_byte3_dst_hi_inreg_src(i32 inreg %src, float %scale, <2 x half> %old) {1803; GCN-LABEL: test_cvt_scalef32_f16_bf8_byte3_dst_hi_inreg_src:1804; GCN: ; %bb.0:1805; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1806; GCN-NEXT: v_cvt_scalef32_f16_bf8 v1, s0, v0 op_sel:[1,1,1]1807; GCN-NEXT: s_nop 01808; GCN-NEXT: v_mov_b32_e32 v0, v11809; GCN-NEXT: s_setpc_b64 s[30:31]1810 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.f16.bf8(<2 x half> %old, i32 %src, float %scale, i32 3, i1 true)1811 ret <2 x half> %ret1812}1813 1814define float @test_cvt_scalef32_f32_bf8_byte0_inreg_src(i32 inreg %src, float %scale) {1815; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte0_inreg_src:1816; GCN: ; %bb.0:1817; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1818; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, s0, v01819; GCN-NEXT: s_setpc_b64 s[30:31]1820 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 0)1821 ret float %ret1822}1823 1824define float @test_cvt_scalef32_f32_bf8_byte1_inreg_src(i32 inreg %src, float %scale) {1825; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte1_inreg_src:1826; GCN: ; %bb.0:1827; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1828; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, s0, v0 op_sel:[1,0,0]1829; GCN-NEXT: s_setpc_b64 s[30:31]1830 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 1)1831 ret float %ret1832}1833 1834define float @test_cvt_scalef32_f32_bf8_byte2_inreg_src(i32 inreg %src, float %scale) {1835; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte2_inreg_src:1836; GCN: ; %bb.0:1837; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1838; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, s0, v0 op_sel:[0,1,0]1839; GCN-NEXT: s_setpc_b64 s[30:31]1840 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 2)1841 ret float %ret1842}1843 1844define float @test_cvt_scalef32_f32_bf8_byte3_inreg_src(i32 inreg %src, float %scale) {1845; GCN-LABEL: test_cvt_scalef32_f32_bf8_byte3_inreg_src:1846; GCN: ; %bb.0:1847; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1848; GCN-NEXT: v_cvt_scalef32_f32_bf8 v0, s0, v0 op_sel:[1,1,0]1849; GCN-NEXT: s_setpc_b64 s[30:31]1850 %ret = tail call float @llvm.amdgcn.cvt.scalef32.f32.bf8(i32 %src, float %scale, i32 3)1851 ret float %ret1852}1853 1854define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word0_inreg_src(<2 x i16> inreg %old, float %src0, float %src1, float %scale) {1855; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word0_inreg_src:1856; GCN: ; %bb.0:1857; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1858; GCN-NEXT: v_mov_b32_e32 v3, s01859; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v3, v0, v1, v21860; GCN-NEXT: v_mov_b32_e32 v0, v31861; GCN-NEXT: s_setpc_b64 s[30:31]1862 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 false)1863 ret <2 x i16> %ret1864}1865 1866define <2 x i16> @test_cvt_scalef32_pk_fp8_f32_word1_inreg_src(<2 x i16> inreg %old, float %src0, float %src1, float %scale) {1867; GCN-LABEL: test_cvt_scalef32_pk_fp8_f32_word1_inreg_src:1868; GCN: ; %bb.0:1869; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1870; GCN-NEXT: v_mov_b32_e32 v3, s01871; GCN-NEXT: v_cvt_scalef32_pk_fp8_f32 v3, v0, v1, v2 op_sel:[0,0,0,1]1872; GCN-NEXT: s_nop 01873; GCN-NEXT: v_mov_b32_e32 v0, v31874; GCN-NEXT: s_setpc_b64 s[30:31]1875 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 true)1876 ret <2 x i16> %ret1877}1878 1879define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word0_inreg_src(<2 x i16> inreg %old, float %src0, float %src1, float %scale) {1880; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word0_inreg_src:1881; GCN: ; %bb.0:1882; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1883; GCN-NEXT: v_mov_b32_e32 v3, s01884; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v3, v0, v1, v21885; GCN-NEXT: v_mov_b32_e32 v0, v31886; GCN-NEXT: s_setpc_b64 s[30:31]1887 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 false)1888 ret <2 x i16> %ret1889}1890 1891define <2 x i16> @test_cvt_scalef32_pk_bf8_f32_word1_inreg_src(<2 x i16> %old, float inreg %src0, float %src1, float %scale) {1892; GCN-LABEL: test_cvt_scalef32_pk_bf8_f32_word1_inreg_src:1893; GCN: ; %bb.0:1894; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1895; GCN-NEXT: v_cvt_scalef32_pk_bf8_f32 v0, s0, v1, v2 op_sel:[0,0,0,1]1896; GCN-NEXT: s_setpc_b64 s[30:31]1897 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f32(<2 x i16> %old, float %src0, float %src1, float %scale, i1 true)1898 ret <2 x i16> %ret1899}1900 1901define <2 x float> @test_cvt_scalef32_pk_f32_fp8_word0_inreg_src(i32 inreg %src, float %scale) {1902; GCN-LABEL: test_cvt_scalef32_pk_f32_fp8_word0_inreg_src:1903; GCN: ; %bb.0:1904; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1905; GCN-NEXT: v_cvt_scalef32_pk_f32_fp8 v[0:1], s0, v01906; GCN-NEXT: s_setpc_b64 s[30:31]1907 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp8(i32 %src, float %scale, i1 false)1908 ret <2 x float> %ret1909}1910 1911define <2 x float> @test_cvt_scalef32_pk_f32_fp8_word1_inreg_src(i32 inreg %src, float %scale) {1912; GCN-LABEL: test_cvt_scalef32_pk_f32_fp8_word1_inreg_src:1913; GCN: ; %bb.0:1914; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1915; GCN-NEXT: v_cvt_scalef32_pk_f32_fp8 v[0:1], s0, v0 op_sel:[1,0,0]1916; GCN-NEXT: s_setpc_b64 s[30:31]1917 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp8(i32 %src, float %scale, i1 true)1918 ret <2 x float> %ret1919}1920 1921define <2 x float> @test_cvt_scalef32_pk_f32_bf8_word0_inreg_src(i32 inreg %src, float %scale) {1922; GCN-LABEL: test_cvt_scalef32_pk_f32_bf8_word0_inreg_src:1923; GCN: ; %bb.0:1924; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1925; GCN-NEXT: v_cvt_scalef32_pk_f32_bf8 v[0:1], s0, v01926; GCN-NEXT: s_setpc_b64 s[30:31]1927 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.bf8(i32 %src, float %scale, i1 false)1928 ret <2 x float> %ret1929}1930 1931define <2 x float> @test_cvt_scalef32_pk_f32_bf8_word1_inreg_src(i32 inreg %src, float %scale) {1932; GCN-LABEL: test_cvt_scalef32_pk_f32_bf8_word1_inreg_src:1933; GCN: ; %bb.0:1934; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1935; GCN-NEXT: v_cvt_scalef32_pk_f32_bf8 v[0:1], s0, v0 op_sel:[1,0,0]1936; GCN-NEXT: s_setpc_b64 s[30:31]1937 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.bf8(i32 %src, float %scale, i1 true)1938 ret <2 x float> %ret1939}1940 1941define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_word0_inreg_src(<2 x i16> %old, <2 x half> inreg %src, float %scale) {1942; GCN-LABEL: test_cvt_scalef32_pk_fp8_f16_word0_inreg_src:1943; GCN: ; %bb.0:1944; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1945; GCN-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, s0, v11946; GCN-NEXT: s_setpc_b64 s[30:31]1947 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 false)1948 ret <2 x i16> %ret1949}1950 1951define <2 x i16> @test_cvt_scalef32_pk_fp8_f16_word1_inreg_src(<2 x i16> %old, <2 x half> inreg %src, float %scale) {1952; GCN-LABEL: test_cvt_scalef32_pk_fp8_f16_word1_inreg_src:1953; GCN: ; %bb.0:1954; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1955; GCN-NEXT: v_cvt_scalef32_pk_fp8_f16 v0, s0, v1 op_sel:[0,0,1]1956; GCN-NEXT: s_setpc_b64 s[30:31]1957 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 true)1958 ret <2 x i16> %ret1959}1960 1961define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_word0_inreg_src(<2 x i16> %old, <2 x bfloat> inreg %src, float %scale) {1962; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_word0_inreg_src:1963; GCN: ; %bb.0:1964; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1965; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, s0, v11966; GCN-NEXT: s_setpc_b64 s[30:31]1967 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 false)1968 ret <2 x i16> %ret1969}1970 1971define <2 x i16> @test_cvt_scalef32_pk_fp8_bf16_word1_inreg_src(<2 x i16> %old, <2 x bfloat> inreg %src, float %scale) {1972; GCN-LABEL: test_cvt_scalef32_pk_fp8_bf16_word1_inreg_src:1973; GCN: ; %bb.0:1974; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1975; GCN-NEXT: v_cvt_scalef32_pk_fp8_bf16 v0, s0, v1 op_sel:[0,0,1]1976; GCN-NEXT: s_setpc_b64 s[30:31]1977 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.fp8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 true)1978 ret <2 x i16> %ret1979}1980 1981define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_word0_inreg_src(<2 x i16> %old, <2 x half> inreg %src, float %scale) {1982; GCN-LABEL: test_cvt_scalef32_pk_bf8_f16_word0_inreg_src:1983; GCN: ; %bb.0:1984; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1985; GCN-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, s0, v11986; GCN-NEXT: s_setpc_b64 s[30:31]1987 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 false)1988 ret <2 x i16> %ret1989}1990 1991define <2 x i16> @test_cvt_scalef32_pk_bf8_f16_word1_inreg_src(<2 x i16> %old, <2 x half> inreg %src, float %scale) {1992; GCN-LABEL: test_cvt_scalef32_pk_bf8_f16_word1_inreg_src:1993; GCN: ; %bb.0:1994; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1995; GCN-NEXT: v_cvt_scalef32_pk_bf8_f16 v0, s0, v1 op_sel:[0,0,1]1996; GCN-NEXT: s_setpc_b64 s[30:31]1997 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.f16(<2 x i16> %old, <2 x half> %src, float %scale, i1 true)1998 ret <2 x i16> %ret1999}2000 2001define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_word0_inreg_src(<2 x i16> %old, <2 x bfloat> inreg %src, float %scale) {2002; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_word0_inreg_src:2003; GCN: ; %bb.0:2004; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2005; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, s0, v12006; GCN-NEXT: s_setpc_b64 s[30:31]2007 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 false)2008 ret <2 x i16> %ret2009}2010 2011define <2 x i16> @test_cvt_scalef32_pk_bf8_bf16_word1_inreg_src(<2 x i16> %old, <2 x bfloat> inreg %src, float %scale) {2012; GCN-LABEL: test_cvt_scalef32_pk_bf8_bf16_word1_inreg_src:2013; GCN: ; %bb.0:2014; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2015; GCN-NEXT: v_cvt_scalef32_pk_bf8_bf16 v0, s0, v1 op_sel:[0,0,1]2016; GCN-NEXT: s_setpc_b64 s[30:31]2017 %ret = tail call <2 x i16> @llvm.amdgcn.cvt.scalef32.pk.bf8.bf16(<2 x i16> %old, <2 x bfloat> %src, float %scale, i1 true)2018 ret <2 x i16> %ret2019}2020 2021define <2 x float> @test_cvt_scale_f32_fp4_byte0_inreg_src(i32 inreg %src, float %scale) {2022; GCN-LABEL: test_cvt_scale_f32_fp4_byte0_inreg_src:2023; GCN: ; %bb.0:2024; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2025; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], s0, v02026; GCN-NEXT: s_setpc_b64 s[30:31]2027 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 0)2028 ret <2 x float> %ret2029}2030 2031define <2 x float> @test_cvt_scale_f32_fp4_byte1_inreg_src(i32 inreg %src, float %scale) {2032; GCN-LABEL: test_cvt_scale_f32_fp4_byte1_inreg_src:2033; GCN: ; %bb.0:2034; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2035; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], s0, v0 op_sel:[1,0,0]2036; GCN-NEXT: s_setpc_b64 s[30:31]2037 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 1)2038 ret <2 x float> %ret2039}2040 2041define <2 x float> @test_cvt_scale_f32_fp4_byte2_inreg_src(i32 inreg %src, float %scale) {2042; GCN-LABEL: test_cvt_scale_f32_fp4_byte2_inreg_src:2043; GCN: ; %bb.0:2044; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2045; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], s0, v0 op_sel:[0,1,0]2046; GCN-NEXT: s_setpc_b64 s[30:31]2047 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 2)2048 ret <2 x float> %ret2049}2050 2051define <2 x float> @test_cvt_scale_f32_fp4_byte3_inreg_src(i32 inreg %src, float %scale) {2052; GCN-LABEL: test_cvt_scale_f32_fp4_byte3_inreg_src:2053; GCN: ; %bb.0:2054; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2055; GCN-NEXT: v_cvt_scalef32_pk_f32_fp4 v[0:1], s0, v0 op_sel:[1,1,0]2056; GCN-NEXT: s_setpc_b64 s[30:31]2057 %ret = tail call <2 x float> @llvm.amdgcn.cvt.scalef32.pk.f32.fp4(i32 %src, float %scale, i32 3)2058 ret <2 x float> %ret2059}2060 2061define i32 @test_cvt_scale_fp4_f32_byte0_inreg_src(i32 %old, float inreg %src0, float %src1, float %scale) {2062; GCN-LABEL: test_cvt_scale_fp4_f32_byte0_inreg_src:2063; GCN: ; %bb.0:2064; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2065; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, s0, v1, v22066; GCN-NEXT: s_setpc_b64 s[30:31]2067 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 0)2068 ret i32 %ret2069}2070 2071define i32 @test_cvt_scale_fp4_f32_byte1_inreg_src(i32 %old, float inreg %src0, float %src1, float %scale) {2072; GCN-LABEL: test_cvt_scale_fp4_f32_byte1_inreg_src:2073; GCN: ; %bb.0:2074; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2075; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, s0, v1, v2 op_sel:[0,0,1,0]2076; GCN-NEXT: s_setpc_b64 s[30:31]2077 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 1)2078 ret i32 %ret2079}2080 2081define i32 @test_cvt_scale_fp4_f32_byte2_inreg_src(i32 %old, float inreg %src0, float %src1, float %scale) {2082; GCN-LABEL: test_cvt_scale_fp4_f32_byte2_inreg_src:2083; GCN: ; %bb.0:2084; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2085; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, s0, v1, v2 op_sel:[0,0,0,1]2086; GCN-NEXT: s_setpc_b64 s[30:31]2087 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 2)2088 ret i32 %ret2089}2090 2091define i32 @test_cvt_scale_fp4_f32_byte3_inreg_src(i32 %old, float inreg %src0, float %src1, float %scale) {2092; GCN-LABEL: test_cvt_scale_fp4_f32_byte3_inreg_src:2093; GCN: ; %bb.0:2094; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2095; GCN-NEXT: v_cvt_scalef32_pk_fp4_f32 v0, s0, v1, v2 op_sel:[0,0,1,1]2096; GCN-NEXT: s_setpc_b64 s[30:31]2097 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f32(i32 %old, float %src0, float %src1, float %scale, i32 3)2098 ret i32 %ret2099}2100 2101define <2 x half> @test_cvt_scale_f16_fp4_byte0_inreg_src(i32 inreg %src, float %scale) {2102; GCN-LABEL: test_cvt_scale_f16_fp4_byte0_inreg_src:2103; GCN: ; %bb.0:2104; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2105; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, s0, v02106; GCN-NEXT: s_setpc_b64 s[30:31]2107 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 0)2108 ret <2 x half> %ret2109}2110 2111define <2 x half> @test_cvt_scale_f16_fp4_byte1_inreg_src(i32 inreg %src, float %scale) {2112; GCN-LABEL: test_cvt_scale_f16_fp4_byte1_inreg_src:2113; GCN: ; %bb.0:2114; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2115; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, s0, v0 op_sel:[1,0,0]2116; GCN-NEXT: s_setpc_b64 s[30:31]2117 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 1)2118 ret <2 x half> %ret2119}2120 2121define <2 x half> @test_cvt_scale_f16_fp4_byte2_inreg_src(i32 inreg %src, float %scale) {2122; GCN-LABEL: test_cvt_scale_f16_fp4_byte2_inreg_src:2123; GCN: ; %bb.0:2124; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2125; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, s0, v0 op_sel:[0,1,0]2126; GCN-NEXT: s_setpc_b64 s[30:31]2127 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 2)2128 ret <2 x half> %ret2129}2130 2131define <2 x half> @test_cvt_scale_f16_fp4_byte3_inreg_src(i32 inreg %src, float %scale) {2132; GCN-LABEL: test_cvt_scale_f16_fp4_byte3_inreg_src:2133; GCN: ; %bb.0:2134; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2135; GCN-NEXT: v_cvt_scalef32_pk_f16_fp4 v0, s0, v0 op_sel:[1,1,0]2136; GCN-NEXT: s_setpc_b64 s[30:31]2137 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp4(i32 %src, float %scale, i32 3)2138 ret <2 x half> %ret2139}2140 2141define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte0_inreg_src(i32 inreg %src, float %scale) {2142; GCN-LABEL: test_cvt_scale_bf16_fp4_byte0_inreg_src:2143; GCN: ; %bb.0:2144; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2145; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, s0, v02146; GCN-NEXT: s_setpc_b64 s[30:31]2147 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 0)2148 ret <2 x bfloat> %ret2149}2150 2151define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte1_inreg_src(i32 inreg %src, float %scale) {2152; GCN-LABEL: test_cvt_scale_bf16_fp4_byte1_inreg_src:2153; GCN: ; %bb.0:2154; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2155; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, s0, v0 op_sel:[1,0,0]2156; GCN-NEXT: s_setpc_b64 s[30:31]2157 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 1)2158 ret <2 x bfloat> %ret2159}2160 2161define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte2_inreg_src(i32 inreg %src, float %scale) {2162; GCN-LABEL: test_cvt_scale_bf16_fp4_byte2_inreg_src:2163; GCN: ; %bb.0:2164; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2165; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, s0, v0 op_sel:[0,1,0]2166; GCN-NEXT: s_setpc_b64 s[30:31]2167 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 2)2168 ret <2 x bfloat> %ret2169}2170 2171define <2 x bfloat> @test_cvt_scale_bf16_fp4_byte3_inreg_src(i32 inreg %src, float %scale) {2172; GCN-LABEL: test_cvt_scale_bf16_fp4_byte3_inreg_src:2173; GCN: ; %bb.0:2174; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2175; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp4 v0, s0, v0 op_sel:[1,1,0]2176; GCN-NEXT: s_setpc_b64 s[30:31]2177 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp4(i32 %src, float %scale, i32 3)2178 ret <2 x bfloat> %ret2179}2180 2181define <32 x float> @test_cvt_scale_pk32_f32_fp6_inreg_src(<6 x i32> inreg %src, float %scale) {2182; GFX950-SDAG-LABEL: test_cvt_scale_pk32_f32_fp6_inreg_src:2183; GFX950-SDAG: ; %bb.0:2184; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2185; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v02186; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, s02187; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, s12188; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, s22189; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, s32190; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, s162191; GFX950-SDAG-NEXT: v_mov_b32_e32 v39, s172192; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[34:39], v322193; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2194;2195; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_fp6_inreg_src:2196; GFX950-GISEL: ; %bb.0:2197; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2198; GFX950-GISEL-NEXT: s_mov_b32 s4, s162199; GFX950-GISEL-NEXT: s_mov_b32 s5, s172200; GFX950-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[4:5]2201; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v02202; GFX950-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[2:3]2203; GFX950-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[0:1]2204; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[34:39], v322205; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2206 %ret = tail call <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.fp6(<6 x i32> %src, float %scale)2207 ret <32 x float> %ret2208}2209 2210define <32 x float> @test_cvt_scale_pk32_f32_bf6_inreg_src(<6 x i32> inreg %src, float %scale) {2211; GFX950-SDAG-LABEL: test_cvt_scale_pk32_f32_bf6_inreg_src:2212; GFX950-SDAG: ; %bb.0:2213; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2214; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v02215; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, s02216; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, s12217; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, s22218; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, s32219; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, s162220; GFX950-SDAG-NEXT: v_mov_b32_e32 v39, s172221; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[34:39], v322222; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2223;2224; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_bf6_inreg_src:2225; GFX950-GISEL: ; %bb.0:2226; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2227; GFX950-GISEL-NEXT: s_mov_b32 s4, s162228; GFX950-GISEL-NEXT: s_mov_b32 s5, s172229; GFX950-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[4:5]2230; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v02231; GFX950-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[2:3]2232; GFX950-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[0:1]2233; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[34:39], v322234; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2235 %ret = tail call <32 x float> @llvm.amdgcn.cvt.scalef32.pk32.f32.bf6(<6 x i32> %src, float %scale)2236 ret <32 x float> %ret2237}2238 2239define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_vv_inreg_src(<6 x i32> inreg %src, float %scale) {2240; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_vv_inreg_src:2241; GFX950-SDAG: ; %bb.0:2242; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2243; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v02244; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s02245; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s12246; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s22247; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s32248; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s162249; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s172250; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[18:23], v162251; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2252;2253; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_fp6_vv_inreg_src:2254; GFX950-GISEL: ; %bb.0:2255; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2256; GFX950-GISEL-NEXT: s_mov_b32 s4, s162257; GFX950-GISEL-NEXT: s_mov_b32 s5, s172258; GFX950-GISEL-NEXT: v_mov_b64_e32 v[22:23], s[4:5]2259; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v02260; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[2:3]2261; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[0:1]2262; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[18:23], v162263; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2264 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.fp6(<6 x i32> %src, float %scale)2265 ret <32 x half> %ret2266}2267 2268define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_sl_inreg_src(<6 x i32> inreg inreg %src) {2269; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl_inreg_src:2270; GFX950-SDAG: ; %bb.0:2271; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2272; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s02273; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s12274; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s22275; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s32276; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s162277; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s172278; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c800002279; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], s02280; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2281;2282; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl_inreg_src:2283; GFX950-GISEL: ; %bb.0:2284; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2285; GFX950-GISEL-NEXT: s_mov_b32 s4, s162286; GFX950-GISEL-NEXT: s_mov_b32 s5, s172287; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[4:5]2288; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[2:3]2289; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[0:1]2290; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, 0x42c800002291; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v222292; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2293 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.fp6(<6 x i32> %src, float 100.0)2294 ret <32 x half> %ret2295}2296 2297define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_vv_inreg_src(<6 x i32> inreg %src, float %scale) {2298; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_vv_inreg_src:2299; GCN: ; %bb.0:2300; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2301; GCN-NEXT: v_mov_b32_e32 v16, v02302; GCN-NEXT: v_mov_b32_e32 v18, s02303; GCN-NEXT: v_mov_b32_e32 v19, s12304; GCN-NEXT: v_mov_b32_e32 v20, s22305; GCN-NEXT: v_mov_b32_e32 v21, s32306; GCN-NEXT: v_mov_b32_e32 v22, s162307; GCN-NEXT: v_mov_b32_e32 v23, s172308; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[18:23], v162309; GCN-NEXT: s_setpc_b64 s[30:31]2310 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float %scale)2311 ret <32 x bfloat> %ret2312}2313 2314define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_sl_inreg_src(<6 x i32> inreg inreg %src) {2315; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_sl_inreg_src:2316; GCN: ; %bb.0:2317; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2318; GCN-NEXT: v_mov_b32_e32 v16, s02319; GCN-NEXT: v_mov_b32_e32 v17, s12320; GCN-NEXT: v_mov_b32_e32 v18, s22321; GCN-NEXT: v_mov_b32_e32 v19, s32322; GCN-NEXT: v_mov_b32_e32 v20, s162323; GCN-NEXT: v_mov_b32_e32 v21, s172324; GCN-NEXT: s_mov_b32 s0, 0x42c800002325; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], s02326; GCN-NEXT: s_setpc_b64 s[30:31]2327 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float 100.0)2328 ret <32 x bfloat> %ret2329}2330 2331define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_vv_inreg_src(<6 x i32> inreg %src, float %scale) {2332; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_vv_inreg_src:2333; GFX950-SDAG: ; %bb.0:2334; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2335; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v02336; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s02337; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s12338; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s22339; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s32340; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s162341; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s172342; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[18:23], v162343; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2344;2345; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_bf6_vv_inreg_src:2346; GFX950-GISEL: ; %bb.0:2347; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2348; GFX950-GISEL-NEXT: s_mov_b32 s4, s162349; GFX950-GISEL-NEXT: s_mov_b32 s5, s172350; GFX950-GISEL-NEXT: v_mov_b64_e32 v[22:23], s[4:5]2351; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v02352; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[2:3]2353; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[0:1]2354; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[18:23], v162355; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2356 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.bf6(<6 x i32> %src, float %scale)2357 ret <32 x half> %ret2358}2359 2360define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_sl_inreg_src(<6 x i32> inreg inreg %src) {2361; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl_inreg_src:2362; GFX950-SDAG: ; %bb.0:2363; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2364; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s02365; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s12366; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s22367; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s32368; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s162369; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s172370; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c800002371; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], s02372; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2373;2374; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl_inreg_src:2375; GFX950-GISEL: ; %bb.0:2376; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2377; GFX950-GISEL-NEXT: s_mov_b32 s4, s162378; GFX950-GISEL-NEXT: s_mov_b32 s5, s172379; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], s[4:5]2380; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], s[2:3]2381; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[0:1]2382; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, 0x42c800002383; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v222384; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]2385 %ret = tail call <32 x half> @llvm.amdgcn.cvt.scalef32.pk32.f16.bf6(<6 x i32> %src, float 100.0)2386 ret <32 x half> %ret2387}2388 2389define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_vv_inreg_src(<6 x i32> inreg %src, float %scale) {2390; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_vv_inreg_src:2391; GCN: ; %bb.0:2392; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2393; GCN-NEXT: v_mov_b32_e32 v16, v02394; GCN-NEXT: v_mov_b32_e32 v18, s02395; GCN-NEXT: v_mov_b32_e32 v19, s12396; GCN-NEXT: v_mov_b32_e32 v20, s22397; GCN-NEXT: v_mov_b32_e32 v21, s32398; GCN-NEXT: v_mov_b32_e32 v22, s162399; GCN-NEXT: v_mov_b32_e32 v23, s172400; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[18:23], v162401; GCN-NEXT: s_setpc_b64 s[30:31]2402 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float %scale)2403 ret <32 x bfloat> %ret2404}2405 2406define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_sl_inreg_src(<6 x i32> inreg inreg %src) {2407; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_sl_inreg_src:2408; GCN: ; %bb.0:2409; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2410; GCN-NEXT: v_mov_b32_e32 v16, s02411; GCN-NEXT: v_mov_b32_e32 v17, s12412; GCN-NEXT: v_mov_b32_e32 v18, s22413; GCN-NEXT: v_mov_b32_e32 v19, s32414; GCN-NEXT: v_mov_b32_e32 v20, s162415; GCN-NEXT: v_mov_b32_e32 v21, s172416; GCN-NEXT: s_mov_b32 s0, 0x42c800002417; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], s02418; GCN-NEXT: s_setpc_b64 s[30:31]2419 %ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float 100.0)2420 ret <32 x bfloat> %ret2421}2422 2423define <2 x half> @test_cvt_scalef32_pk_f16_fp8_word0_inreg_src(i32 inreg %src, float %scale) {2424; GCN-LABEL: test_cvt_scalef32_pk_f16_fp8_word0_inreg_src:2425; GCN: ; %bb.0:2426; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2427; GCN-NEXT: v_cvt_scalef32_pk_f16_fp8 v0, s0, v02428; GCN-NEXT: s_setpc_b64 s[30:31]2429 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp8(i32 %src, float %scale, i1 false)2430 ret <2 x half> %ret2431}2432 2433define <2 x half> @test_cvt_scalef32_pk_f16_fp8_word1_inreg_src(i32 inreg %src, float %scale) {2434; GCN-LABEL: test_cvt_scalef32_pk_f16_fp8_word1_inreg_src:2435; GCN: ; %bb.0:2436; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2437; GCN-NEXT: v_cvt_scalef32_pk_f16_fp8 v0, s0, v0 op_sel:[1,0,0]2438; GCN-NEXT: s_setpc_b64 s[30:31]2439 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.fp8(i32 %src, float %scale, i1 true)2440 ret <2 x half> %ret2441}2442 2443define <2 x half> @test_cvt_scalef32_pk_f16_bf8_word0_inreg_src(i32 inreg %src, float %scale) {2444; GCN-LABEL: test_cvt_scalef32_pk_f16_bf8_word0_inreg_src:2445; GCN: ; %bb.0:2446; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2447; GCN-NEXT: v_cvt_scalef32_pk_f16_bf8 v0, s0, v02448; GCN-NEXT: s_setpc_b64 s[30:31]2449 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.bf8(i32 %src, float %scale, i1 false)2450 ret <2 x half> %ret2451}2452 2453define <2 x half> @test_cvt_scalef32_pk_f16_bf8_word1_inreg_src(i32 inreg %src, float %scale) {2454; GCN-LABEL: test_cvt_scalef32_pk_f16_bf8_word1_inreg_src:2455; GCN: ; %bb.0:2456; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2457; GCN-NEXT: v_cvt_scalef32_pk_f16_bf8 v0, s0, v0 op_sel:[1,0,0]2458; GCN-NEXT: s_setpc_b64 s[30:31]2459 %ret = tail call <2 x half> @llvm.amdgcn.cvt.scalef32.pk.f16.bf8(i32 %src, float %scale, i1 true)2460 ret <2 x half> %ret2461}2462 2463define <2 x bfloat> @test_cvt_scalef32_pk_bf16_fp8_word0_inreg_src(i32 inreg %src, float %scale) {2464; GCN-LABEL: test_cvt_scalef32_pk_bf16_fp8_word0_inreg_src:2465; GCN: ; %bb.0:2466; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2467; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp8 v0, s0, v02468; GCN-NEXT: s_setpc_b64 s[30:31]2469 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp8(i32 %src, float %scale, i1 false)2470 ret <2 x bfloat> %ret2471}2472 2473define <2 x bfloat> @test_cvt_scalef32_pk_bf16_fp8_word1_inreg_src(i32 inreg %src, float %scale) {2474; GCN-LABEL: test_cvt_scalef32_pk_bf16_fp8_word1_inreg_src:2475; GCN: ; %bb.0:2476; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2477; GCN-NEXT: v_cvt_scalef32_pk_bf16_fp8 v0, s0, v0 op_sel:[1,0,0]2478; GCN-NEXT: s_setpc_b64 s[30:31]2479 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.fp8(i32 %src, float %scale, i1 true)2480 ret <2 x bfloat> %ret2481}2482 2483define <2 x bfloat> @test_cvt_scalef32_pk_bf16_bf8_word0_inreg_src(i32 inreg %src, float %scale) {2484; GCN-LABEL: test_cvt_scalef32_pk_bf16_bf8_word0_inreg_src:2485; GCN: ; %bb.0:2486; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2487; GCN-NEXT: v_cvt_scalef32_pk_bf16_bf8 v0, s0, v02488; GCN-NEXT: s_setpc_b64 s[30:31]2489 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.bf8(i32 %src, float %scale, i1 false)2490 ret <2 x bfloat> %ret2491}2492 2493define <2 x bfloat> @test_cvt_scalef32_pk_bf16_bf8_word1_inreg_src(i32 inreg %src, float %scale) {2494; GCN-LABEL: test_cvt_scalef32_pk_bf16_bf8_word1_inreg_src:2495; GCN: ; %bb.0:2496; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2497; GCN-NEXT: v_cvt_scalef32_pk_bf16_bf8 v0, s0, v0 op_sel:[1,0,0]2498; GCN-NEXT: s_setpc_b64 s[30:31]2499 %ret = tail call <2 x bfloat> @llvm.amdgcn.cvt.scalef32.pk.bf16.bf8(i32 %src, float %scale, i1 true)2500 ret <2 x bfloat> %ret2501}2502 2503define i32 @test_cvt_scalef32_fp4_f16_byte0_inreg_src(<2 x half> inreg %src0, float %scale, i32 %old) {2504; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte0_inreg_src:2505; GCN: ; %bb.0:2506; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2507; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, s0, v02508; GCN-NEXT: v_mov_b32_e32 v0, v12509; GCN-NEXT: s_setpc_b64 s[30:31]2510 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 0)2511 ret i32 %ret2512}2513 2514define i32 @test_cvt_scalef32_fp4_f16_byte1_inreg_src(<2 x half> inreg %src0, float %scale, i32 %old) {2515; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte1_inreg_src:2516; GCN: ; %bb.0:2517; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2518; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, s0, v0 op_sel:[0,0,1,0]2519; GCN-NEXT: s_nop 02520; GCN-NEXT: v_mov_b32_e32 v0, v12521; GCN-NEXT: s_setpc_b64 s[30:31]2522 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 1)2523 ret i32 %ret2524}2525 2526define i32 @test_cvt_scalef32_fp4_f16_byte2_inreg_src(<2 x half> inreg %src0, float %scale, i32 %old) {2527; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte2_inreg_src:2528; GCN: ; %bb.0:2529; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2530; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, s0, v0 op_sel:[0,0,0,1]2531; GCN-NEXT: s_nop 02532; GCN-NEXT: v_mov_b32_e32 v0, v12533; GCN-NEXT: s_setpc_b64 s[30:31]2534 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 2)2535 ret i32 %ret2536}2537 2538define i32 @test_cvt_scalef32_fp4_f16_byte3_inreg_src(<2 x half> inreg %src0, float %scale, i32 %old) {2539; GCN-LABEL: test_cvt_scalef32_fp4_f16_byte3_inreg_src:2540; GCN: ; %bb.0:2541; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2542; GCN-NEXT: v_cvt_scalef32_pk_fp4_f16 v1, s0, v0 op_sel:[0,0,1,1]2543; GCN-NEXT: s_nop 02544; GCN-NEXT: v_mov_b32_e32 v0, v12545; GCN-NEXT: s_setpc_b64 s[30:31]2546 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.f16(i32 %old, <2 x half> %src0, float %scale, i32 3)2547 ret i32 %ret2548}2549 2550define i32 @test_cvt_scalef32_fp4_bf16_byte0_inreg_src(<2 x bfloat> inreg %src0, float %scale, i32 %old) {2551; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte0_inreg_src:2552; GCN: ; %bb.0:2553; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2554; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, s0, v02555; GCN-NEXT: v_mov_b32_e32 v0, v12556; GCN-NEXT: s_setpc_b64 s[30:31]2557 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 0)2558 ret i32 %ret2559}2560 2561define i32 @test_cvt_scalef32_fp4_bf16_byte1_inreg_src(<2 x bfloat> inreg %src0, float %scale, i32 %old) {2562; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte1_inreg_src:2563; GCN: ; %bb.0:2564; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2565; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, s0, v0 op_sel:[0,0,1,0]2566; GCN-NEXT: s_nop 02567; GCN-NEXT: v_mov_b32_e32 v0, v12568; GCN-NEXT: s_setpc_b64 s[30:31]2569 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 1)2570 ret i32 %ret2571}2572 2573define i32 @test_cvt_scalef32_fp4_bf16_byte2_inreg_src(<2 x bfloat> inreg %src0, float %scale, i32 %old) {2574; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte2_inreg_src:2575; GCN: ; %bb.0:2576; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2577; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, s0, v0 op_sel:[0,0,0,1]2578; GCN-NEXT: s_nop 02579; GCN-NEXT: v_mov_b32_e32 v0, v12580; GCN-NEXT: s_setpc_b64 s[30:31]2581 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 2)2582 ret i32 %ret2583}2584 2585define i32 @test_cvt_scalef32_fp4_bf16_byte3_inreg_src(<2 x bfloat> inreg %src0, float %scale, i32 %old) {2586; GCN-LABEL: test_cvt_scalef32_fp4_bf16_byte3_inreg_src:2587; GCN: ; %bb.0:2588; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2589; GCN-NEXT: v_cvt_scalef32_pk_fp4_bf16 v1, s0, v0 op_sel:[0,0,1,1]2590; GCN-NEXT: s_nop 02591; GCN-NEXT: v_mov_b32_e32 v0, v12592; GCN-NEXT: s_setpc_b64 s[30:31]2593 %ret = tail call i32 @llvm.amdgcn.cvt.scalef32.pk.fp4.bf16(i32 %old, <2 x bfloat> %src0, float %scale, i32 3)2594 ret i32 %ret2595}2596