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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck %s3; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck %s4 5define amdgpu_gs void @test_ds_bvh_stack_push4_pop1(i32 %addr, i32 %data0, <4 x i32> %data1) {6; CHECK-LABEL: test_ds_bvh_stack_push4_pop1:7; CHECK: ; %bb.0:8; CHECK-NEXT: ds_bvh_stack_push4_pop1_rtn_b32 v1, v0, v1, v[2:5]9; CHECK-NEXT: s_wait_dscnt 0x010; CHECK-NEXT: export prim v1, off, off, off done11; CHECK-NEXT: s_endpgm12 %pair = call { i32, i32 } @llvm.amdgcn.ds.bvh.stack.push4.pop1.rtn(i32 %addr, i32 %data0, <4 x i32> %data1, i32 0)13 %vdst = extractvalue { i32, i32 } %pair, 014 %newaddr = extractvalue { i32, i32 } %pair, 115 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst, i32 %newaddr, i32 poison, i32 poison, i1 true, i1 false)16 ret void17}18 19define amdgpu_gs void @test_ds_bvh_stack_push4_pop1_1(i32 %addr, i32 %data0, <4 x i32> %data1) {20; CHECK-LABEL: test_ds_bvh_stack_push4_pop1_1:21; CHECK: ; %bb.0:22; CHECK-NEXT: ds_bvh_stack_push4_pop1_rtn_b32 v1, v0, v1, v[2:5] offset:123; CHECK-NEXT: s_wait_dscnt 0x024; CHECK-NEXT: export prim v1, off, off, off done25; CHECK-NEXT: s_endpgm26 %pair = call { i32, i32 } @llvm.amdgcn.ds.bvh.stack.push4.pop1.rtn(i32 %addr, i32 %data0, <4 x i32> %data1, i32 1)27 %vdst = extractvalue { i32, i32 } %pair, 028 %newaddr = extractvalue { i32, i32 } %pair, 129 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst, i32 %newaddr, i32 poison, i32 poison, i1 true, i1 false)30 ret void31}32 33define amdgpu_gs void @test_ds_bvh_stack_push8_pop1(i32 %addr, i32 %data0, <8 x i32> %data1) {34; CHECK-LABEL: test_ds_bvh_stack_push8_pop1:35; CHECK: ; %bb.0:36; CHECK-NEXT: ds_bvh_stack_push8_pop1_rtn_b32 v1, v0, v1, v[2:9]37; CHECK-NEXT: s_wait_dscnt 0x038; CHECK-NEXT: export prim v1, off, off, off done39; CHECK-NEXT: s_endpgm40 %pair = call { i32, i32 } @llvm.amdgcn.ds.bvh.stack.push8.pop1.rtn(i32 %addr, i32 %data0, <8 x i32> %data1, i32 0)41 %vdst = extractvalue { i32, i32 } %pair, 042 %newaddr = extractvalue { i32, i32 } %pair, 143 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst, i32 %newaddr, i32 poison, i32 poison, i1 true, i1 false)44 ret void45}46 47define amdgpu_gs void @test_ds_bvh_stack_push8_pop1_1(i32 %addr, i32 %data0, <8 x i32> %data1) {48; CHECK-LABEL: test_ds_bvh_stack_push8_pop1_1:49; CHECK: ; %bb.0:50; CHECK-NEXT: ds_bvh_stack_push8_pop1_rtn_b32 v1, v0, v1, v[2:9] offset:151; CHECK-NEXT: s_wait_dscnt 0x052; CHECK-NEXT: export prim v1, off, off, off done53; CHECK-NEXT: s_endpgm54 %pair = call { i32, i32 } @llvm.amdgcn.ds.bvh.stack.push8.pop1.rtn(i32 %addr, i32 %data0, <8 x i32> %data1, i32 1)55 %vdst = extractvalue { i32, i32 } %pair, 056 %newaddr = extractvalue { i32, i32 } %pair, 157 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst, i32 %newaddr, i32 poison, i32 poison, i1 true, i1 false)58 ret void59}60 61define amdgpu_gs void @test_ds_bvh_stack_push8_pop2(i32 %addr, i32 %data0, <8 x i32> %data1, ptr addrspace(1) %out1, ptr addrspace(1) %out2) {62; CHECK-LABEL: test_ds_bvh_stack_push8_pop2:63; CHECK: ; %bb.0:64; CHECK-NEXT: ds_bvh_stack_push8_pop2_rtn_b64 v[1:2], v0, v1, v[2:9]65; CHECK-NEXT: s_wait_dscnt 0x066; CHECK-NEXT: export prim v1, off, off, off done67; CHECK-NEXT: s_endpgm68 %pair = call { i64, i32 } @llvm.amdgcn.ds.bvh.stack.push8.pop2.rtn(i32 %addr, i32 %data0, <8 x i32> %data1, i32 0)69 %vdst = extractvalue { i64, i32 } %pair, 070 %newaddr = extractvalue { i64, i32 } %pair, 171 %vdst.v2i32 = bitcast i64 %vdst to <2 x i32>72 %vdst.lo = extractelement <2 x i32> %vdst.v2i32, i32 073 %vdst.hi = extractelement <2 x i32> %vdst.v2i32, i32 174 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst.lo, i32 %vdst.hi, i32 %newaddr, i32 poison, i1 true, i1 false)75 ret void76}77 78define amdgpu_gs void @test_ds_bvh_stack_push8_pop2_1(i32 %addr, i32 %data0, <8 x i32> %data1, ptr addrspace(1) %out1, ptr addrspace(1) %out2) {79; CHECK-LABEL: test_ds_bvh_stack_push8_pop2_1:80; CHECK: ; %bb.0:81; CHECK-NEXT: ds_bvh_stack_push8_pop2_rtn_b64 v[1:2], v0, v1, v[2:9] offset:182; CHECK-NEXT: s_wait_dscnt 0x083; CHECK-NEXT: export prim v1, off, off, off done84; CHECK-NEXT: s_endpgm85 %pair = call { i64, i32 } @llvm.amdgcn.ds.bvh.stack.push8.pop2.rtn(i32 %addr, i32 %data0, <8 x i32> %data1, i32 1)86 %vdst = extractvalue { i64, i32 } %pair, 087 %newaddr = extractvalue { i64, i32 } %pair, 188 %vdst.v2i32 = bitcast i64 %vdst to <2 x i32>89 %vdst.lo = extractelement <2 x i32> %vdst.v2i32, i32 090 %vdst.hi = extractelement <2 x i32> %vdst.v2i32, i32 191 call void @llvm.amdgcn.exp.i32(i32 20, i32 1, i32 %vdst.lo, i32 %vdst.hi, i32 %newaddr, i32 poison, i1 true, i1 false)92 ret void93}94