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1; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,LOOP %s2; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,LOOP %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefixes=GCN,LOOP %s4; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefixes=GCN,LOOP %s5; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,LOOP %s6; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,LOOP %s7; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s8; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s9; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s10; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s11; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s12; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,NOLOOP %s13 14; GCN-LABEL: {{^}}gws_sema_br_offset0:15; NOLOOP-DAG: s_load_{{dword|b32}} [[BAR_NUM:s[0-9]+]]16; NOLOOP-DAG: s_mov_b32 m0, 0{{$}}17; NOLOOP: v_mov_b32_e32 v0, [[BAR_NUM]]18; NOLOOP: ds_gws_sema_br v0 gds{{$}}19 20; LOOP: s_mov_b32 m0, 0{{$}}21; LOOP: [[LOOP:.LBB[0-9]+_[0-9]+]]:22; LOOP-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS, 8, 1), 023; LOOP-NEXT: ds_gws_sema_br v0 gds24; LOOP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; LOOP-NEXT: s_getreg_b32 [[GETREG:s[0-9]+]], hwreg(HW_REG_TRAPSTS, 8, 1)26; LOOP-NEXT: s_cmp_lg_u32 [[GETREG]], 027; LOOP-NEXT: s_cbranch_scc1 [[LOOP]]28define amdgpu_kernel void @gws_sema_br_offset0(i32 %val) #0 {29 call void @llvm.amdgcn.ds.gws.sema.br(i32 %val, i32 0)30 ret void31}32 33declare void @llvm.amdgcn.ds.gws.sema.br(i32, i32) #034 35attributes #0 = { convergent inaccessiblememonly nounwind }36