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1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s2; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s3; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s4; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s5; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s6; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -o - < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s7 8; GCN-LABEL: {{^}}gws_sema_p_offset0:9; NOLOOP-DAG: s_mov_b32 m0, 0{{$}}10; NOLOOP: ds_gws_sema_p gds{{$}}11 12; LOOP: s_mov_b32 m0, 0{{$}}13; LOOP: [[LOOP:.LBB[0-9]+_[0-9]+]]:14; LOOP-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS, 8, 1), 015; LOOP-NEXT: ds_gws_sema_p gds16; LOOP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)17; LOOP-NEXT: s_getreg_b32 [[GETREG:s[0-9]+]], hwreg(HW_REG_TRAPSTS, 8, 1)18; LOOP-NEXT: s_cmp_lg_u32 [[GETREG]], 019; LOOP-NEXT: s_cbranch_scc1 [[LOOP]]20define amdgpu_kernel void @gws_sema_p_offset0(i32 %val) #0 {21 call void @llvm.amdgcn.ds.gws.sema.p(i32 0)22 ret void23}24 25declare void @llvm.amdgcn.ds.gws.sema.p(i32) #026 27attributes #0 = { convergent inaccessiblememonly nounwind }28