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1; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefixes=GCN,FUNC %s2; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefixes=GCN,FUNC %s3; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VIGFX9,FUNC %s4; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VIGFX9,FUNC %s5; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,VIGFX9,FUNC %s6; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,VIGFX9,FUNC %s7 8; FUNC-LABEL: {{^}}ds_ordered_swap:9; GCN: s_mov_b32 m0, s010; VIGFX9-NEXT: s_nop 011; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v0 offset:4868 gds12; GCN-NEXT: s_waitcnt expcnt(0) lgkmcnt(0)13define amdgpu_cs float @ds_ordered_swap(ptr addrspace(2) inreg %gds, i32 %value) {14 %val = call i32@llvm.amdgcn.ds.ordered.swap(ptr addrspace(2) %gds, i32 %value, i32 0, i32 0, i1 false, i32 1, i1 true, i1 true)15 %r = bitcast i32 %val to float16 ret float %r17}18 19; FUNC-LABEL: {{^}}ds_ordered_swap_conditional:20; GCN: v_cmp_ne_u32_e32 vcc, 0, v[[VALUE:[0-9]+]]21; GCN: s_and_saveexec_b64 s[[SAVED:\[[0-9]+:[0-9]+\]]], vcc22; // We have to use s_cbranch, because ds_ordered_count has side effects with EXEC=023; GCN: s_cbranch_execz [[BB:.LBB._.]]24; GCN: s_mov_b32 m0, s025; VIGFX9-NEXT: s_nop 026; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[VALUE]] offset:4868 gds27; GCN-NEXT: s_waitcnt lgkmcnt(0)28; GCN-NEXT: [[BB]]:29; // Wait for expcnt(0) before modifying EXEC30; GCN-NEXT: s_waitcnt expcnt(0)31; GCN-NEXT: s_or_b64 exec, exec, s[[SAVED]]32define amdgpu_cs float @ds_ordered_swap_conditional(ptr addrspace(2) inreg %gds, i32 %value) {33entry:34 %c = icmp ne i32 %value, 035 br i1 %c, label %if-true, label %endif36 37if-true:38 %val = call i32@llvm.amdgcn.ds.ordered.swap(ptr addrspace(2) %gds, i32 %value, i32 0, i32 0, i1 false, i32 1, i1 true, i1 true)39 br label %endif40 41endif:42 %v = phi i32 [ %val, %if-true ], [ poison, %entry ]43 %r = bitcast i32 %v to float44 ret float %r45}46 47declare i32 @llvm.amdgcn.ds.ordered.swap(ptr addrspace(2) nocapture, i32, i32, i32, i1, i32, i1, i1)48