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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s --check-prefixes=GFX11,SDAG-GFX11,SDAG-GFX11-TRUE163; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s --check-prefixes=GFX11,SDAG-GFX11,SDAG-GFX11-FAKE164; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s --check-prefixes=GFX11,GISEL-GFX11,GISEL-GFX11-TRUE165; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s --check-prefixes=GFX11,GISEL-GFX11,GISEL-GFX11-FAKE166 7declare half @llvm.amdgcn.fdot2.f16.f16(<2 x half> %a, <2 x half> %b, half %c)8 9define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f16_f16(10; SDAG-GFX11-TRUE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16:11; SDAG-GFX11-TRUE16: ; %bb.0: ; %entry12; SDAG-GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2413; SDAG-GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 014; SDAG-GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)15; SDAG-GFX11-TRUE16-NEXT: s_load_b32 s2, s[2:3], 0x016; SDAG-GFX11-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x017; SDAG-GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[6:7]18; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)19; SDAG-GFX11-TRUE16-NEXT: v_dot2_f16_f16 v0.l, s2, s3, v0.l20; SDAG-GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]21; SDAG-GFX11-TRUE16-NEXT: s_endpgm22;23; SDAG-GFX11-FAKE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16:24; SDAG-GFX11-FAKE16: ; %bb.0: ; %entry25; SDAG-GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2426; SDAG-GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 027; SDAG-GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)28; SDAG-GFX11-FAKE16-NEXT: s_load_b32 s2, s[2:3], 0x029; SDAG-GFX11-FAKE16-NEXT: s_load_b32 s3, s[4:5], 0x030; SDAG-GFX11-FAKE16-NEXT: global_load_u16 v1, v0, s[6:7]31; SDAG-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)32; SDAG-GFX11-FAKE16-NEXT: v_dot2_f16_f16 v1, s2, s3, v133; SDAG-GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]34; SDAG-GFX11-FAKE16-NEXT: s_endpgm35;36; GISEL-GFX11-TRUE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16:37; GISEL-GFX11-TRUE16: ; %bb.0: ; %entry38; GISEL-GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2439; GISEL-GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 040; GISEL-GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)41; GISEL-GFX11-TRUE16-NEXT: s_load_b32 s2, s[2:3], 0x042; GISEL-GFX11-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x043; GISEL-GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[6:7]44; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)45; GISEL-GFX11-TRUE16-NEXT: v_dot2_f16_f16 v0.l, s2, s3, v0.l46; GISEL-GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]47; GISEL-GFX11-TRUE16-NEXT: s_endpgm48;49; GISEL-GFX11-FAKE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16:50; GISEL-GFX11-FAKE16: ; %bb.0: ; %entry51; GISEL-GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2452; GISEL-GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 053; GISEL-GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)54; GISEL-GFX11-FAKE16-NEXT: s_load_b32 s2, s[2:3], 0x055; GISEL-GFX11-FAKE16-NEXT: s_load_b32 s3, s[4:5], 0x056; GISEL-GFX11-FAKE16-NEXT: global_load_u16 v1, v0, s[6:7]57; GISEL-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)58; GISEL-GFX11-FAKE16-NEXT: v_dot2_f16_f16 v1, s2, s3, v159; GISEL-GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]60; GISEL-GFX11-FAKE16-NEXT: s_endpgm61 ptr addrspace(1) %r,62 ptr addrspace(1) %a,63 ptr addrspace(1) %b,64 ptr addrspace(1) %c) {65entry:66 %a.val = load <2 x half>, ptr addrspace(1) %a67 %b.val = load <2 x half>, ptr addrspace(1) %b68 %c.val = load half, ptr addrspace(1) %c69 %r.val = call half @llvm.amdgcn.fdot2.f16.f16(<2 x half> %a.val, <2 x half> %b.val, half %c.val)70 store half %r.val, ptr addrspace(1) %r71 ret void72}73 74define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f16_f16_dpp(75; SDAG-GFX11-TRUE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16_dpp:76; SDAG-GFX11-TRUE16: ; %bb.0: ; %entry77; SDAG-GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2478; SDAG-GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)79; SDAG-GFX11-TRUE16-NEXT: scratch_load_b32 v1, off, s180; SDAG-GFX11-TRUE16-NEXT: scratch_load_b32 v2, off, s281; SDAG-GFX11-TRUE16-NEXT: scratch_load_d16_b16 v0, off, s382; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)83; SDAG-GFX11-TRUE16-NEXT: v_mov_b32_dpp v1, v1 quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:184; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)85; SDAG-GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)86; SDAG-GFX11-TRUE16-NEXT: v_dot2_f16_f16 v0.l, v1, v2, v0.l87; SDAG-GFX11-TRUE16-NEXT: scratch_store_b16 off, v0, s088; SDAG-GFX11-TRUE16-NEXT: s_endpgm89;90; SDAG-GFX11-FAKE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16_dpp:91; SDAG-GFX11-FAKE16: ; %bb.0: ; %entry92; SDAG-GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2493; SDAG-GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)94; SDAG-GFX11-FAKE16-NEXT: scratch_load_b32 v0, off, s295; SDAG-GFX11-FAKE16-NEXT: scratch_load_u16 v1, off, s396; SDAG-GFX11-FAKE16-NEXT: scratch_load_b32 v2, off, s197; SDAG-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)98; SDAG-GFX11-FAKE16-NEXT: v_dot2_f16_f16_e64_dpp v0, v2, v0, v1 quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:199; SDAG-GFX11-FAKE16-NEXT: scratch_store_b16 off, v0, s0100; SDAG-GFX11-FAKE16-NEXT: s_endpgm101;102; GISEL-GFX11-TRUE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16_dpp:103; GISEL-GFX11-TRUE16: ; %bb.0: ; %entry104; GISEL-GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24105; GISEL-GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)106; GISEL-GFX11-TRUE16-NEXT: scratch_load_b32 v1, off, s1107; GISEL-GFX11-TRUE16-NEXT: scratch_load_b32 v2, off, s2108; GISEL-GFX11-TRUE16-NEXT: scratch_load_d16_b16 v0, off, s3109; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)110; GISEL-GFX11-TRUE16-NEXT: v_mov_b32_dpp v1, v1 quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:1111; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)112; GISEL-GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)113; GISEL-GFX11-TRUE16-NEXT: v_dot2_f16_f16 v0.l, v1, v2, v0.l114; GISEL-GFX11-TRUE16-NEXT: scratch_store_b16 off, v0, s0115; GISEL-GFX11-TRUE16-NEXT: s_endpgm116;117; GISEL-GFX11-FAKE16-LABEL: test_llvm_amdgcn_fdot2_f16_f16_dpp:118; GISEL-GFX11-FAKE16: ; %bb.0: ; %entry119; GISEL-GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24120; GISEL-GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)121; GISEL-GFX11-FAKE16-NEXT: scratch_load_b32 v0, off, s1122; GISEL-GFX11-FAKE16-NEXT: scratch_load_b32 v1, off, s2123; GISEL-GFX11-FAKE16-NEXT: scratch_load_u16 v2, off, s3124; GISEL-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)125; GISEL-GFX11-FAKE16-NEXT: v_dot2_f16_f16_e64_dpp v0, v0, v1, v2 quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:1126; GISEL-GFX11-FAKE16-NEXT: scratch_store_b16 off, v0, s0127; GISEL-GFX11-FAKE16-NEXT: s_endpgm128 ptr addrspace(5) %r,129 ptr addrspace(5) %a,130 ptr addrspace(5) %b,131 ptr addrspace(5) %c) {132entry:133 %a.val = load <2 x half>, ptr addrspace(5) %a134 %b.val = load <2 x half>, ptr addrspace(5) %b135 %c.val = load half, ptr addrspace(5) %c136 %a.val.i32 = bitcast <2 x half> %a.val to i32137 %dpp = call i32 @llvm.amdgcn.update.dpp.i32(i32 %a.val.i32, i32 %a.val.i32, i32 1, i32 15, i32 15, i1 1)138 %a.val.dpp.v2half = bitcast i32 %dpp to <2 x half>139 %r.val = call half @llvm.amdgcn.fdot2.f16.f16(<2 x half> %a.val.dpp.v2half, <2 x half> %b.val, half %c.val)140 store half %r.val, ptr addrspace(5) %r141 ret void142}143 144declare i32 @llvm.amdgcn.update.dpp.i32(i32, i32, i32, i32, i32, i1)145;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:146; GFX11: {{.*}}147; GISEL-GFX11: {{.*}}148; SDAG-GFX11: {{.*}}149