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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s --check-prefixes=GFX113; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s --check-prefixes=GFX114; RUN: llc -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck %s --check-prefixes=GFX9505; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck %s --check-prefixes=GFX950-ISEL6 7declare float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %a, <2 x bfloat> %b, float %c, i1 %clamp)8 9define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_clamp(10; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_clamp:11; GFX11: ; %bb.0: ; %entry12; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x2413; GFX11-NEXT: s_waitcnt lgkmcnt(0)14; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x015; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x016; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x017; GFX11-NEXT: s_waitcnt lgkmcnt(0)18; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s619; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)20; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v0 clamp21; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]22; GFX11-NEXT: s_endpgm23;24; GFX950-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_clamp:25; GFX950: ; %bb.0: ; %entry26; GFX950-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2427; GFX950-NEXT: v_mov_b32_e32 v0, 028; GFX950-NEXT: s_waitcnt lgkmcnt(0)29; GFX950-NEXT: s_load_dword s0, s[12:13], 0x030; GFX950-NEXT: s_load_dword s1, s[14:15], 0x031; GFX950-NEXT: s_load_dword s2, s[10:11], 0x032; GFX950-NEXT: s_waitcnt lgkmcnt(0)33; GFX950-NEXT: v_mov_b32_e32 v1, s034; GFX950-NEXT: v_mov_b32_e32 v2, s135; GFX950-NEXT: v_dot2_f32_bf16 v1, s2, v1, v2 clamp36; GFX950-NEXT: s_nop 237; GFX950-NEXT: global_store_dword v0, v1, s[8:9]38; GFX950-NEXT: s_endpgm39;40; GFX950-ISEL-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_clamp:41; GFX950-ISEL: ; %bb.0: ; %entry42; GFX950-ISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2443; GFX950-ISEL-NEXT: v_mov_b32_e32 v0, 044; GFX950-ISEL-NEXT: s_waitcnt lgkmcnt(0)45; GFX950-ISEL-NEXT: s_load_dword s0, s[12:13], 0x046; GFX950-ISEL-NEXT: s_load_dword s1, s[14:15], 0x047; GFX950-ISEL-NEXT: s_load_dword s2, s[10:11], 0x048; GFX950-ISEL-NEXT: s_waitcnt lgkmcnt(0)49; GFX950-ISEL-NEXT: v_mov_b32_e32 v1, s050; GFX950-ISEL-NEXT: v_mov_b32_e32 v2, s151; GFX950-ISEL-NEXT: v_dot2_f32_bf16 v1, s2, v1, v2 clamp52; GFX950-ISEL-NEXT: s_nop 253; GFX950-ISEL-NEXT: global_store_dword v0, v1, s[8:9]54; GFX950-ISEL-NEXT: s_endpgm55 ptr addrspace(1) %r,56 ptr addrspace(1) %a,57 ptr addrspace(1) %b,58 ptr addrspace(1) %c) {59entry:60 %a.val = load <2 x bfloat>, ptr addrspace(1) %a61 %b.val = load <2 x bfloat>, ptr addrspace(1) %b62 %c.val = load float, ptr addrspace(1) %c63 %r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %a.val, <2 x bfloat> %b.val, float %c.val, i1 1)64 store float %r.val, ptr addrspace(1) %r65 ret void66}67 68 69define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_no_clamp(70; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_no_clamp:71; GFX11: ; %bb.0: ; %entry72; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x2473; GFX11-NEXT: s_waitcnt lgkmcnt(0)74; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x075; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x076; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x077; GFX11-NEXT: s_waitcnt lgkmcnt(0)78; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s679; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)80; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v081; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]82; GFX11-NEXT: s_endpgm83;84; GFX950-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_no_clamp:85; GFX950: ; %bb.0: ; %entry86; GFX950-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2487; GFX950-NEXT: v_mov_b32_e32 v0, 088; GFX950-NEXT: s_waitcnt lgkmcnt(0)89; GFX950-NEXT: s_load_dword s0, s[12:13], 0x090; GFX950-NEXT: s_load_dword s1, s[14:15], 0x091; GFX950-NEXT: s_load_dword s2, s[10:11], 0x092; GFX950-NEXT: s_waitcnt lgkmcnt(0)93; GFX950-NEXT: v_mov_b32_e32 v1, s094; GFX950-NEXT: v_mov_b32_e32 v2, s195; GFX950-NEXT: v_dot2c_f32_bf16_e32 v2, s2, v196; GFX950-NEXT: s_nop 297; GFX950-NEXT: global_store_dword v0, v2, s[8:9]98; GFX950-NEXT: s_endpgm99;100; GFX950-ISEL-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_no_clamp:101; GFX950-ISEL: ; %bb.0: ; %entry102; GFX950-ISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24103; GFX950-ISEL-NEXT: v_mov_b32_e32 v0, 0104; GFX950-ISEL-NEXT: s_waitcnt lgkmcnt(0)105; GFX950-ISEL-NEXT: s_load_dword s0, s[12:13], 0x0106; GFX950-ISEL-NEXT: s_load_dword s1, s[14:15], 0x0107; GFX950-ISEL-NEXT: s_load_dword s2, s[10:11], 0x0108; GFX950-ISEL-NEXT: s_waitcnt lgkmcnt(0)109; GFX950-ISEL-NEXT: v_mov_b32_e32 v1, s0110; GFX950-ISEL-NEXT: v_mov_b32_e32 v2, s1111; GFX950-ISEL-NEXT: v_dot2c_f32_bf16_e32 v2, s2, v1112; GFX950-ISEL-NEXT: s_nop 2113; GFX950-ISEL-NEXT: global_store_dword v0, v2, s[8:9]114; GFX950-ISEL-NEXT: s_endpgm115 ptr addrspace(1) %r,116 ptr addrspace(1) %a,117 ptr addrspace(1) %b,118 ptr addrspace(1) %c) {119entry:120 %a.val = load <2 x bfloat>, ptr addrspace(1) %a121 %b.val = load <2 x bfloat>, ptr addrspace(1) %b122 %c.val = load float, ptr addrspace(1) %c123 %r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %a.val, <2 x bfloat> %b.val, float %c.val, i1 0)124 store float %r.val, ptr addrspace(1) %r125 ret void126}127