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1; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck %s --check-prefixes=GCN,GFX9,GFX9062; RUN: llc -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck %s --check-prefixes=GCN,GFX9,GFX9423; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 < %s | FileCheck %s --check-prefixes=GCN,GFX104; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 < %s | FileCheck %s --check-prefixes=GCN,GFX105; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-vopd=0 < %s | FileCheck %s --check-prefixes=GCN,GFX106; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-vopd=0 < %s | FileCheck %s --check-prefixes=GCN,GFX127 8declare float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %c, i1 %clamp)9 10; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_clamp11; GFX9: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}12; GFX10: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}13; GFX12: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}14define amdgpu_kernel void @test_llvm_amdgcn_fdot2_clamp(15 ptr addrspace(1) %r,16 ptr addrspace(1) %a,17 ptr addrspace(1) %b,18 ptr addrspace(1) %c) {19entry:20 %a.val = load <2 x half>, ptr addrspace(1) %a21 %b.val = load <2 x half>, ptr addrspace(1) %b22 %c.val = load float, ptr addrspace(1) %c23 %r.val = call float @llvm.amdgcn.fdot2(<2 x half> %a.val, <2 x half> %b.val, float %c.val, i1 1)24 store float %r.val, ptr addrspace(1) %r25 ret void26}27 28; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_no_clamp29; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}30; GFX942: v_dot2c_f32_f16_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}31; GFX10: {{v_dot2c_f32_f16|v_dot2acc_f32_f16}} v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}32; GFX12: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}33define amdgpu_kernel void @test_llvm_amdgcn_fdot2_no_clamp(34 ptr addrspace(1) %r,35 ptr addrspace(1) %a,36 ptr addrspace(1) %b,37 ptr addrspace(1) %c) {38entry:39 %a.val = load <2 x half>, ptr addrspace(1) %a40 %b.val = load <2 x half>, ptr addrspace(1) %b41 %c.val = load float, ptr addrspace(1) %c42 %r.val = call float @llvm.amdgcn.fdot2(<2 x half> %a.val, <2 x half> %b.val, float %c.val, i1 0)43 store float %r.val, ptr addrspace(1) %r44 ret void45}46 47; GFX9-LABEL: {{^}}fdot2_inline_literal48; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 1.049; GFX942: v_dot2c_f32_f16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}50; GFX12: v_dot2_f32_f16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 1.0{{$}}51define float @fdot2_inline_literal(<2 x half> %a, <2 x half> %b) {52 %ret = tail call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float 1.0, i1 false)53 ret float %ret54}55