117 lines · plain
1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefix=GCN %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefix=GCN %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefix=GCN %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefix=GCN %s5 6declare float @llvm.amdgcn.fmad.ftz.f32(float %a, float %b, float %c)7 8; GCN-LABEL: {{^}}mad_f32:9; GCN: v_ma{{[dc]}}_f3210define amdgpu_kernel void @mad_f32(11 ptr addrspace(1) %r,12 ptr addrspace(1) %a,13 ptr addrspace(1) %b,14 ptr addrspace(1) %c) {15 %a.val = load float, ptr addrspace(1) %a16 %b.val = load float, ptr addrspace(1) %b17 %c.val = load float, ptr addrspace(1) %c18 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float %c.val)19 store float %r.val, ptr addrspace(1) %r20 ret void21}22 23; GCN-LABEL: {{^}}mad_f32_imm_a:24; GCN: v_madmk_f32 {{v[0-9]+}}, {{v[0-9]+}}, 0x41000000,25define amdgpu_kernel void @mad_f32_imm_a(26 ptr addrspace(1) %r,27 ptr addrspace(1) %b,28 ptr addrspace(1) %c) {29 %b.val = load float, ptr addrspace(1) %b30 %c.val = load float, ptr addrspace(1) %c31 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float 8.0, float %b.val, float %c.val)32 store float %r.val, ptr addrspace(1) %r33 ret void34}35 36; GCN-LABEL: {{^}}mad_f32_imm_b:37; GCN: v_mov_b32_e32 [[KB:v[0-9]+]], 0x4100000038; GCN: v_mac_f32_e32 {{v[0-9]+}}, {{[s][0-9]+}}, [[KB]]39define amdgpu_kernel void @mad_f32_imm_b(40 ptr addrspace(1) %r,41 ptr addrspace(1) %a,42 ptr addrspace(1) %c) {43 %a.val = load float, ptr addrspace(1) %a44 %c.val = load float, ptr addrspace(1) %c45 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float 8.0, float %c.val)46 store float %r.val, ptr addrspace(1) %r47 ret void48}49 50; GCN-LABEL: {{^}}mad_f32_imm_c:51; GCN: v_mov_b32_e32 [[C:v[0-9]+]], 0x4100000052; GCN: s_load_dword [[B:s[0-9]+]]53; GCN: s_load_dword [[A:s[0-9]+]]54; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], [[B]]55; GCN: v_mac_f32_e32 [[C]], {{s[0-9]+}}, [[VB]]{{$}}56define amdgpu_kernel void @mad_f32_imm_c(57 ptr addrspace(1) %r,58 ptr addrspace(1) %a,59 ptr addrspace(1) %b) {60 %a.val = load float, ptr addrspace(1) %a61 %b.val = load float, ptr addrspace(1) %b62 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float 8.0)63 store float %r.val, ptr addrspace(1) %r64 ret void65}66 67; GCN-LABEL: {{^}}mad_f32_neg_b:68; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}69define amdgpu_kernel void @mad_f32_neg_b(70 ptr addrspace(1) %r,71 ptr addrspace(1) %a,72 ptr addrspace(1) %b,73 ptr addrspace(1) %c) {74 %a.val = load float, ptr addrspace(1) %a75 %b.val = load float, ptr addrspace(1) %b76 %c.val = load float, ptr addrspace(1) %c77 %neg.b = fneg float %b.val78 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.b, float %c.val)79 store float %r.val, ptr addrspace(1) %r80 ret void81}82 83; GCN-LABEL: {{^}}mad_f32_abs_b:84; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, |v{{[0-9]+}}|, v{{[0-9]+}}85define amdgpu_kernel void @mad_f32_abs_b(86 ptr addrspace(1) %r,87 ptr addrspace(1) %a,88 ptr addrspace(1) %b,89 ptr addrspace(1) %c) {90 %a.val = load float, ptr addrspace(1) %a91 %b.val = load float, ptr addrspace(1) %b92 %c.val = load float, ptr addrspace(1) %c93 %abs.b = call float @llvm.fabs.f32(float %b.val)94 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %abs.b, float %c.val)95 store float %r.val, ptr addrspace(1) %r96 ret void97}98 99; GCN-LABEL: {{^}}mad_f32_neg_abs_b:100; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -|v{{[0-9]+}}|, v{{[0-9]+}}101define amdgpu_kernel void @mad_f32_neg_abs_b(102 ptr addrspace(1) %r,103 ptr addrspace(1) %a,104 ptr addrspace(1) %b,105 ptr addrspace(1) %c) {106 %a.val = load float, ptr addrspace(1) %a107 %b.val = load float, ptr addrspace(1) %b108 %c.val = load float, ptr addrspace(1) %c109 %abs.b = call float @llvm.fabs.f32(float %b.val)110 %neg.abs.b = fneg float %abs.b111 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.abs.b, float %c.val)112 store float %r.val, ptr addrspace(1) %r113 ret void114}115 116declare float @llvm.fabs.f32(float)117