62 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-GISEL %s4 5declare i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1), i64)6 7define amdgpu_kernel void @global_atomic_ordered_add_b64_no_rtn(ptr addrspace(1) %addr, i64 %in) {8; GFX12-SDAG-LABEL: global_atomic_ordered_add_b64_no_rtn:9; GFX12-SDAG: ; %bb.0: ; %entry10; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x2411; GFX12-SDAG-NEXT: s_wait_kmcnt 0x012; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s313; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s214; GFX12-SDAG-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:-32 th:TH_ATOMIC_RETURN15; GFX12-SDAG-NEXT: s_endpgm16;17; GFX12-GISEL-LABEL: global_atomic_ordered_add_b64_no_rtn:18; GFX12-GISEL: ; %bb.0: ; %entry19; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x2420; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 021; GFX12-GISEL-NEXT: s_wait_kmcnt 0x022; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s323; GFX12-GISEL-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:-32 th:TH_ATOMIC_RETURN24; GFX12-GISEL-NEXT: s_endpgm25entry:26 %gep = getelementptr i64, ptr addrspace(1) %addr, i32 -427 %unused = call i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1) %gep, i64 %in)28 ret void29}30 31define amdgpu_kernel void @global_atomic_ordered_add_b64_rtn(ptr addrspace(1) %addr, i64 %in, ptr addrspace(1) %use) {32; GFX12-SDAG-LABEL: global_atomic_ordered_add_b64_rtn:33; GFX12-SDAG: ; %bb.0: ; %entry34; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x2435; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 036; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x3437; GFX12-SDAG-NEXT: s_wait_kmcnt 0x038; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s339; GFX12-SDAG-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:32 th:TH_ATOMIC_RETURN40; GFX12-SDAG-NEXT: s_wait_loadcnt 0x041; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]42; GFX12-SDAG-NEXT: s_endpgm43;44; GFX12-GISEL-LABEL: global_atomic_ordered_add_b64_rtn:45; GFX12-GISEL: ; %bb.0: ; %entry46; GFX12-GISEL-NEXT: s_clause 0x147; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x2448; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x3449; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 050; GFX12-GISEL-NEXT: s_wait_kmcnt 0x051; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s352; GFX12-GISEL-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:32 th:TH_ATOMIC_RETURN53; GFX12-GISEL-NEXT: s_wait_loadcnt 0x054; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]55; GFX12-GISEL-NEXT: s_endpgm56entry:57 %gep = getelementptr i64, ptr addrspace(1) %addr, i32 458 %val = call i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1) %gep, i64 %in)59 store i64 %val, ptr addrspace(1) %use60 ret void61}62