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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s4 5declare void @llvm.amdgcn.global.store.async.from.lds.b8(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)6declare void @llvm.amdgcn.global.store.async.from.lds.b32(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)7declare void @llvm.amdgcn.global.store.async.from.lds.b64(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)8declare void @llvm.amdgcn.global.store.async.from.lds.b128(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)9 10define amdgpu_ps void @global_store_async_from_lds_b8_vaddr(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr) {11; GFX1250-SDAG-LABEL: global_store_async_from_lds_b8_vaddr:12; GFX1250-SDAG: ; %bb.0: ; %entry13; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 114; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], 32, v[0:1]15; GFX1250-SDAG-NEXT: global_store_async_from_lds_b8 v[0:1], v2, off offset:16 th:TH_STORE_NT16; GFX1250-SDAG-NEXT: s_endpgm17;18; GFX1250-GISEL-LABEL: global_store_async_from_lds_b8_vaddr:19; GFX1250-GISEL: ; %bb.0: ; %entry20; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 121; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3222; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)23; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo24; GFX1250-GISEL-NEXT: global_store_async_from_lds_b8 v[0:1], v2, off offset:16 th:TH_STORE_NT25; GFX1250-GISEL-NEXT: s_endpgm26entry:27 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 428 call void @llvm.amdgcn.global.store.async.from.lds.b8(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 1)29 ret void30}31 32define amdgpu_ps void @global_store_async_from_lds_b8_saddr(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr) {33; GFX1250-LABEL: global_store_async_from_lds_b8_saddr:34; GFX1250: ; %bb.0: ; %entry35; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 136; GFX1250-NEXT: v_mov_b32_e32 v1, 3237; GFX1250-NEXT: global_store_async_from_lds_b8 v1, v0, s[0:1] offset:1638; GFX1250-NEXT: s_endpgm39entry:40 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 441 call void @llvm.amdgcn.global.store.async.from.lds.b8(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)42 ret void43}44 45define amdgpu_ps void @global_store_async_from_lds_b32(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr) {46; GFX1250-SDAG-LABEL: global_store_async_from_lds_b32:47; GFX1250-SDAG: ; %bb.0: ; %entry48; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 149; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], 32, v[0:1]50; GFX1250-SDAG-NEXT: global_store_async_from_lds_b32 v[0:1], v2, off offset:16 th:TH_STORE_HT scope:SCOPE_SE51; GFX1250-SDAG-NEXT: s_endpgm52;53; GFX1250-GISEL-LABEL: global_store_async_from_lds_b32:54; GFX1250-GISEL: ; %bb.0: ; %entry55; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 156; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3257; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)58; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo59; GFX1250-GISEL-NEXT: global_store_async_from_lds_b32 v[0:1], v2, off offset:16 th:TH_STORE_HT scope:SCOPE_SE60; GFX1250-GISEL-NEXT: s_endpgm61entry:62 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 463 call void @llvm.amdgcn.global.store.async.from.lds.b32(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 10)64 ret void65}66 67define amdgpu_ps void @global_store_async_from_lds_b32_saddr(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr) {68; GFX1250-LABEL: global_store_async_from_lds_b32_saddr:69; GFX1250: ; %bb.0: ; %entry70; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 171; GFX1250-NEXT: v_mov_b32_e32 v1, 3272; GFX1250-NEXT: global_store_async_from_lds_b32 v1, v0, s[0:1] offset:1673; GFX1250-NEXT: s_endpgm74entry:75 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 476 call void @llvm.amdgcn.global.store.async.from.lds.b32(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)77 ret void78}79 80define amdgpu_ps void @global_store_async_from_lds_b64_vaddr(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr) {81; GFX1250-SDAG-LABEL: global_store_async_from_lds_b64_vaddr:82; GFX1250-SDAG: ; %bb.0: ; %entry83; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 184; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], 32, v[0:1]85; GFX1250-SDAG-NEXT: global_store_async_from_lds_b64 v[0:1], v2, off offset:16 th:TH_STORE_NT_HT scope:SCOPE_DEV86; GFX1250-SDAG-NEXT: s_endpgm87;88; GFX1250-GISEL-LABEL: global_store_async_from_lds_b64_vaddr:89; GFX1250-GISEL: ; %bb.0: ; %entry90; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 191; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3292; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)93; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo94; GFX1250-GISEL-NEXT: global_store_async_from_lds_b64 v[0:1], v2, off offset:16 th:TH_STORE_NT_HT scope:SCOPE_DEV95; GFX1250-GISEL-NEXT: s_endpgm96entry:97 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 498 call void @llvm.amdgcn.global.store.async.from.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 22)99 ret void100}101 102define amdgpu_ps void @global_store_async_from_lds_b64_saddr(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr) {103; GFX1250-LABEL: global_store_async_from_lds_b64_saddr:104; GFX1250: ; %bb.0: ; %entry105; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1106; GFX1250-NEXT: v_mov_b32_e32 v1, 32107; GFX1250-NEXT: global_store_async_from_lds_b64 v1, v0, s[0:1] offset:16108; GFX1250-NEXT: s_endpgm109entry:110 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4111 call void @llvm.amdgcn.global.store.async.from.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)112 ret void113}114 115define amdgpu_ps void @global_store_async_from_lds_b128_vaddr(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr) {116; GFX1250-SDAG-LABEL: global_store_async_from_lds_b128_vaddr:117; GFX1250-SDAG: ; %bb.0: ; %entry118; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1119; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], 32, v[0:1]120; GFX1250-SDAG-NEXT: global_store_async_from_lds_b128 v[0:1], v2, off offset:16 th:TH_STORE_BYPASS scope:SCOPE_SYS121; GFX1250-SDAG-NEXT: s_endpgm122;123; GFX1250-GISEL-LABEL: global_store_async_from_lds_b128_vaddr:124; GFX1250-GISEL: ; %bb.0: ; %entry125; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1126; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, 32127; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)128; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo129; GFX1250-GISEL-NEXT: global_store_async_from_lds_b128 v[0:1], v2, off offset:16 th:TH_STORE_BYPASS scope:SCOPE_SYS130; GFX1250-GISEL-NEXT: s_endpgm131entry:132 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4133 call void @llvm.amdgcn.global.store.async.from.lds.b128(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 27)134 ret void135}136 137define amdgpu_ps void @global_store_async_from_lds_b128_saddr(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr) {138; GFX1250-LABEL: global_store_async_from_lds_b128_saddr:139; GFX1250: ; %bb.0: ; %entry140; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1141; GFX1250-NEXT: v_mov_b32_e32 v1, 32142; GFX1250-NEXT: global_store_async_from_lds_b128 v1, v0, s[0:1] offset:16143; GFX1250-NEXT: s_endpgm144entry:145 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4146 call void @llvm.amdgcn.global.store.async.from.lds.b128(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)147 ret void148}149 150define amdgpu_ps void @global_store_async_from_lds_b32_saddr_scale_offset(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr, i32 %idx) {151; GFX1250-LABEL: global_store_async_from_lds_b32_saddr_scale_offset:152; GFX1250: ; %bb.0: ; %entry153; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1154; GFX1250-NEXT: global_store_async_from_lds_b32 v1, v0, s[0:1] offset:16 scale_offset th:TH_STORE_NT155; GFX1250-NEXT: s_endpgm156entry:157 %idxprom = sext i32 %idx to i64158 %gep = getelementptr i32, ptr addrspace(1) %gaddr, i64 %idxprom159 call void @llvm.amdgcn.global.store.async.from.lds.b32(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 1)160 ret void161}162 163define amdgpu_ps void @global_store_async_from_lds_b64_saddr_scale_offset(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr, i32 %idx) {164; GFX1250-LABEL: global_store_async_from_lds_b64_saddr_scale_offset:165; GFX1250: ; %bb.0: ; %entry166; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1167; GFX1250-NEXT: global_store_async_from_lds_b64 v1, v0, s[0:1] offset:16 scale_offset th:TH_STORE_NT168; GFX1250-NEXT: s_endpgm169entry:170 %idxprom = sext i32 %idx to i64171 %gep = getelementptr i64, ptr addrspace(1) %gaddr, i64 %idxprom172 call void @llvm.amdgcn.global.store.async.from.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 1)173 ret void174}175 176define amdgpu_ps void @global_store_async_from_lds_b64_saddr_no_scale_offset(ptr addrspace(1) inreg %gaddr, ptr addrspace(3) %laddr, i32 %idx) {177; GFX1250-LABEL: global_store_async_from_lds_b64_saddr_no_scale_offset:178; GFX1250: ; %bb.0: ; %entry179; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1180; GFX1250-NEXT: v_mov_b32_e32 v2, v1181; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)182; GFX1250-NEXT: v_ashrrev_i32_e32 v3, 31, v2183; GFX1250-NEXT: v_lshl_add_u64 v[2:3], v[2:3], 2, s[0:1]184; GFX1250-NEXT: global_store_async_from_lds_b64 v[2:3], v0, off offset:16 th:TH_STORE_NT185; GFX1250-NEXT: s_endpgm186entry:187 %idxprom = sext i32 %idx to i64188 %gep = getelementptr i32, ptr addrspace(1) %gaddr, i64 %idxprom189 call void @llvm.amdgcn.global.store.async.from.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 1)190 ret void191}192