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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s4 5define amdgpu_ps float @atomic_min_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {6; GFX12-LABEL: atomic_min_flt_1d:7; GFX12: ; %bb.0: ; %main_body8; GFX12-NEXT: image_atomic_min_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN9; GFX12-NEXT: s_wait_loadcnt 0x010; GFX12-NEXT: ; return to shader part epilog11main_body:12 %v = call float @llvm.amdgcn.image.atomic.min.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)13 ret float %v14}15 16define amdgpu_ps float @atomic_max_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {17; GFX12-LABEL: atomic_max_flt_1d:18; GFX12: ; %bb.0: ; %main_body19; GFX12-NEXT: image_atomic_max_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN20; GFX12-NEXT: s_wait_loadcnt 0x021; GFX12-NEXT: ; return to shader part epilog22main_body:23 %v = call float @llvm.amdgcn.image.atomic.max.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)24 ret float %v25}26 27define amdgpu_ps float @atomic_add_flt_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {28; GFX12-LABEL: atomic_add_flt_1d:29; GFX12: ; %bb.0: ; %main_body30; GFX12-NEXT: image_atomic_add_flt v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_RETURN31; GFX12-NEXT: s_wait_loadcnt 0x032; GFX12-NEXT: ; return to shader part epilog33main_body:34 %v = call float @llvm.amdgcn.image.atomic.add.flt.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)35 ret float %v36}37 38declare float @llvm.amdgcn.image.atomic.add.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)39declare float @llvm.amdgcn.image.atomic.min.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)40declare float @llvm.amdgcn.image.atomic.max.flt.1d.f32.f32(float, i32, <8 x i32>, i32, i32)41