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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -check-prefixes=GCN %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -early-live-intervals < %s | FileCheck -check-prefixes=GCN %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -check-prefixes=GCN %s5 6define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, i32 %s) {7; GCN-LABEL: load_1d:8; GCN: ; %bb.0: ; %main_body9; GCN-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm10; GCN-NEXT: s_waitcnt vmcnt(0)11; GCN-NEXT: ; return to shader part epilog12main_body:13 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)14 ret <4 x float> %v15}16 17define amdgpu_ps <4 x float> @load_1d_lwe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s) {18; GCN-LABEL: load_1d_lwe:19; GCN: ; %bb.0: ; %main_body20; GCN-NEXT: v_mov_b32_e32 v8, 021; GCN-NEXT: v_mov_b32_e32 v6, v022; GCN-NEXT: v_mov_b32_e32 v9, v823; GCN-NEXT: v_mov_b32_e32 v10, v824; GCN-NEXT: v_mov_b32_e32 v11, v825; GCN-NEXT: v_mov_b32_e32 v12, v826; GCN-NEXT: v_mov_b32_e32 v0, v827; GCN-NEXT: v_mov_b32_e32 v1, v928; GCN-NEXT: v_mov_b32_e32 v2, v1029; GCN-NEXT: v_mov_b32_e32 v3, v1130; GCN-NEXT: v_mov_b32_e32 v4, v1231; GCN-NEXT: image_load v[0:4], v6, s[0:7] dmask:0xf unorm lwe32; GCN-NEXT: s_waitcnt vmcnt(0)33; GCN-NEXT: global_store_dword v8, v4, s[8:9]34; GCN-NEXT: s_waitcnt vmcnt(0)35; GCN-NEXT: ; return to shader part epilog36main_body:37 %v = call {<4 x float>, i32} @llvm.amdgcn.image.load.1d.v4f32i32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 2, i32 0)38 %v.vec = extractvalue {<4 x float>, i32} %v, 039 %v.err = extractvalue {<4 x float>, i32} %v, 140 store i32 %v.err, ptr addrspace(1) %out, align 441 ret <4 x float> %v.vec42}43 44define amdgpu_ps <4 x float> @load_2d(<8 x i32> inreg %rsrc, i32 %s, i32 %t) {45; GCN-LABEL: load_2d:46; GCN: ; %bb.0: ; %main_body47; GCN-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm48; GCN-NEXT: s_waitcnt vmcnt(0)49; GCN-NEXT: ; return to shader part epilog50main_body:51 %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i32(i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)52 ret <4 x float> %v53}54 55define amdgpu_ps <4 x float> @load_3d(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {56; GCN-LABEL: load_3d:57; GCN: ; %bb.0: ; %main_body58; GCN-NEXT: image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm59; GCN-NEXT: s_waitcnt vmcnt(0)60; GCN-NEXT: ; return to shader part epilog61main_body:62 %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)63 ret <4 x float> %v64}65 66define amdgpu_ps <4 x float> @load_cube(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice) {67; GCN-LABEL: load_cube:68; GCN: ; %bb.0: ; %main_body69; GCN-NEXT: image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm da70; GCN-NEXT: s_waitcnt vmcnt(0)71; GCN-NEXT: ; return to shader part epilog72main_body:73 %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)74 ret <4 x float> %v75}76 77define amdgpu_ps <4 x float> @load_cube_lwe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %slice) {78; GCN-LABEL: load_cube_lwe:79; GCN: ; %bb.0: ; %main_body80; GCN-NEXT: v_mov_b32_e32 v10, 081; GCN-NEXT: v_mov_b32_e32 v11, v1082; GCN-NEXT: v_mov_b32_e32 v12, v1083; GCN-NEXT: v_mov_b32_e32 v13, v1084; GCN-NEXT: v_mov_b32_e32 v14, v1085; GCN-NEXT: v_mov_b32_e32 v4, v1086; GCN-NEXT: v_mov_b32_e32 v5, v1187; GCN-NEXT: v_mov_b32_e32 v6, v1288; GCN-NEXT: v_mov_b32_e32 v7, v1389; GCN-NEXT: v_mov_b32_e32 v8, v1490; GCN-NEXT: image_load v[4:8], v[0:2], s[0:7] dmask:0xf unorm lwe da91; GCN-NEXT: s_waitcnt vmcnt(0)92; GCN-NEXT: v_mov_b32_e32 v0, v493; GCN-NEXT: v_mov_b32_e32 v1, v594; GCN-NEXT: v_mov_b32_e32 v2, v695; GCN-NEXT: v_mov_b32_e32 v3, v796; GCN-NEXT: global_store_dword v10, v8, s[8:9]97; GCN-NEXT: s_waitcnt vmcnt(0)98; GCN-NEXT: ; return to shader part epilog99main_body:100 %v = call {<4 x float>,i32} @llvm.amdgcn.image.load.cube.v4f32i32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 2, i32 0)101 %v.vec = extractvalue {<4 x float>, i32} %v, 0102 %v.err = extractvalue {<4 x float>, i32} %v, 1103 store i32 %v.err, ptr addrspace(1) %out, align 4104 ret <4 x float> %v.vec105}106 107define amdgpu_ps <4 x float> @load_1darray(<8 x i32> inreg %rsrc, i32 %s, i32 %slice) {108; GCN-LABEL: load_1darray:109; GCN: ; %bb.0: ; %main_body110; GCN-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm da111; GCN-NEXT: s_waitcnt vmcnt(0)112; GCN-NEXT: ; return to shader part epilog113main_body:114 %v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i32(i32 15, i32 %s, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)115 ret <4 x float> %v116}117 118define amdgpu_ps <4 x float> @load_2darray(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice) {119; GCN-LABEL: load_2darray:120; GCN: ; %bb.0: ; %main_body121; GCN-NEXT: image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm da122; GCN-NEXT: s_waitcnt vmcnt(0)123; GCN-NEXT: ; return to shader part epilog124main_body:125 %v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)126 ret <4 x float> %v127}128 129define amdgpu_ps <4 x float> @load_2darray_lwe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %slice) {130; GCN-LABEL: load_2darray_lwe:131; GCN: ; %bb.0: ; %main_body132; GCN-NEXT: v_mov_b32_e32 v10, 0133; GCN-NEXT: v_mov_b32_e32 v11, v10134; GCN-NEXT: v_mov_b32_e32 v12, v10135; GCN-NEXT: v_mov_b32_e32 v13, v10136; GCN-NEXT: v_mov_b32_e32 v14, v10137; GCN-NEXT: v_mov_b32_e32 v4, v10138; GCN-NEXT: v_mov_b32_e32 v5, v11139; GCN-NEXT: v_mov_b32_e32 v6, v12140; GCN-NEXT: v_mov_b32_e32 v7, v13141; GCN-NEXT: v_mov_b32_e32 v8, v14142; GCN-NEXT: image_load v[4:8], v[0:2], s[0:7] dmask:0xf unorm lwe da143; GCN-NEXT: s_waitcnt vmcnt(0)144; GCN-NEXT: v_mov_b32_e32 v0, v4145; GCN-NEXT: v_mov_b32_e32 v1, v5146; GCN-NEXT: v_mov_b32_e32 v2, v6147; GCN-NEXT: v_mov_b32_e32 v3, v7148; GCN-NEXT: global_store_dword v10, v8, s[8:9]149; GCN-NEXT: s_waitcnt vmcnt(0)150; GCN-NEXT: ; return to shader part epilog151main_body:152 %v = call {<4 x float>,i32} @llvm.amdgcn.image.load.2darray.v4f32i32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 2, i32 0)153 %v.vec = extractvalue {<4 x float>, i32} %v, 0154 %v.err = extractvalue {<4 x float>, i32} %v, 1155 store i32 %v.err, ptr addrspace(1) %out, align 4156 ret <4 x float> %v.vec157}158 159define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) {160; GCN-LABEL: load_2dmsaa:161; GCN: ; %bb.0: ; %main_body162; GCN-NEXT: image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm163; GCN-NEXT: s_waitcnt vmcnt(0)164; GCN-NEXT: ; return to shader part epilog165main_body:166 %v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)167 ret <4 x float> %v168}169 170define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice, i32 %fragid) {171; GCN-LABEL: load_2darraymsaa:172; GCN: ; %bb.0: ; %main_body173; GCN-NEXT: image_load v[0:3], v[0:3], s[0:7] dmask:0xf unorm da174; GCN-NEXT: s_waitcnt vmcnt(0)175; GCN-NEXT: ; return to shader part epilog176main_body:177 %v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)178 ret <4 x float> %v179}180 181define amdgpu_ps <4 x float> @load_1d_addr_align(<8 x i32> inreg %rsrc, <2 x i32> %s) {182; GCN-LABEL: load_1d_addr_align:183; GCN: ; %bb.0: ; %main_body184; GCN-NEXT: v_mov_b32_e32 v0, v1185; GCN-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm186; GCN-NEXT: s_waitcnt vmcnt(0)187; GCN-NEXT: ; return to shader part epilog188main_body:189 %s1 = extractelement <2 x i32> %s, i32 1190 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s1, <8 x i32> %rsrc, i32 0, i32 0)191 ret <4 x float> %v192}193 194define amdgpu_ps void @store_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s) {195; GCN-LABEL: store_1d:196; GCN: ; %bb.0: ; %main_body197; GCN-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm198; GCN-NEXT: s_endpgm199main_body:200 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)201 ret void202}203 204define amdgpu_ps void @store_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t) {205; GCN-LABEL: store_2d:206; GCN: ; %bb.0: ; %main_body207; GCN-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm208; GCN-NEXT: s_endpgm209main_body:210 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)211 ret void212}213 214define amdgpu_ps void @store_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t, i32 %r) {215; GCN-LABEL: store_3d:216; GCN: ; %bb.0: ; %main_body217; GCN-NEXT: image_store v[0:3], v[4:6], s[0:7] dmask:0xf unorm218; GCN-NEXT: s_endpgm219main_body:220 call void @llvm.amdgcn.image.store.3d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)221 ret void222}223 224define amdgpu_ps void @store_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t, i32 %slice) {225; GCN-LABEL: store_cube:226; GCN: ; %bb.0: ; %main_body227; GCN-NEXT: image_store v[0:3], v[4:6], s[0:7] dmask:0xf unorm da228; GCN-NEXT: s_endpgm229main_body:230 call void @llvm.amdgcn.image.store.cube.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)231 ret void232}233 234define amdgpu_ps void @store_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %slice) {235; GCN-LABEL: store_1darray:236; GCN: ; %bb.0: ; %main_body237; GCN-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm da238; GCN-NEXT: s_endpgm239main_body:240 call void @llvm.amdgcn.image.store.1darray.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)241 ret void242}243 244define amdgpu_ps void @store_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t, i32 %slice) {245; GCN-LABEL: store_2darray:246; GCN: ; %bb.0: ; %main_body247; GCN-NEXT: image_store v[0:3], v[4:6], s[0:7] dmask:0xf unorm da248; GCN-NEXT: s_endpgm249main_body:250 call void @llvm.amdgcn.image.store.2darray.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)251 ret void252}253 254define amdgpu_ps void @store_2dmsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t, i32 %fragid) {255; GCN-LABEL: store_2dmsaa:256; GCN: ; %bb.0: ; %main_body257; GCN-NEXT: image_store v[0:3], v[4:6], s[0:7] dmask:0xf unorm258; GCN-NEXT: s_endpgm259main_body:260 call void @llvm.amdgcn.image.store.2dmsaa.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)261 ret void262}263 264define amdgpu_ps void @store_2darraymsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s, i32 %t, i32 %slice, i32 %fragid) {265; GCN-LABEL: store_2darraymsaa:266; GCN: ; %bb.0: ; %main_body267; GCN-NEXT: image_store v[0:3], v[4:7], s[0:7] dmask:0xf unorm da268; GCN-NEXT: s_endpgm269main_body:270 call void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)271 ret void272}273 274define amdgpu_ps float @load_1d_V1(<8 x i32> inreg %rsrc, i32 %s) {275; GCN-LABEL: load_1d_V1:276; GCN: ; %bb.0: ; %main_body277; GCN-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm278; GCN-NEXT: s_waitcnt vmcnt(0)279; GCN-NEXT: ; return to shader part epilog280main_body:281 %v = call float @llvm.amdgcn.image.load.1d.f32.i32(i32 8, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)282 ret float %v283}284 285define amdgpu_ps <2 x float> @load_1d_V2(<8 x i32> inreg %rsrc, i32 %s) {286; GCN-LABEL: load_1d_V2:287; GCN: ; %bb.0: ; %main_body288; GCN-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm289; GCN-NEXT: s_waitcnt vmcnt(0)290; GCN-NEXT: ; return to shader part epilog291main_body:292 %v = call <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i32(i32 9, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)293 ret <2 x float> %v294}295 296define amdgpu_ps void @store_1d_V1(<8 x i32> inreg %rsrc, float %vdata, i32 %s) {297; GCN-LABEL: store_1d_V1:298; GCN: ; %bb.0: ; %main_body299; GCN-NEXT: v_mov_b32_e32 v2, v1300; GCN-NEXT: image_store v0, v2, s[0:7] dmask:0x2 unorm301; GCN-NEXT: s_endpgm302main_body:303 call void @llvm.amdgcn.image.store.1d.f32.i32(float %vdata, i32 2, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)304 ret void305}306 307define amdgpu_ps void @store_1d_V2(<8 x i32> inreg %rsrc, <2 x float> %vdata, i32 %s) {308; GCN-LABEL: store_1d_V2:309; GCN: ; %bb.0: ; %main_body310; GCN-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc unorm311; GCN-NEXT: s_endpgm312main_body:313 call void @llvm.amdgcn.image.store.1d.v2f32.i32(<2 x float> %vdata, i32 12, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)314 ret void315}316 317define amdgpu_ps <4 x float> @load_1d_glc(<8 x i32> inreg %rsrc, i32 %s) {318; GCN-LABEL: load_1d_glc:319; GCN: ; %bb.0: ; %main_body320; GCN-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc321; GCN-NEXT: s_waitcnt vmcnt(0)322; GCN-NEXT: ; return to shader part epilog323main_body:324 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 1)325 ret <4 x float> %v326}327 328define amdgpu_ps <4 x float> @load_1d_slc(<8 x i32> inreg %rsrc, i32 %s) {329; GCN-LABEL: load_1d_slc:330; GCN: ; %bb.0: ; %main_body331; GCN-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm slc332; GCN-NEXT: s_waitcnt vmcnt(0)333; GCN-NEXT: ; return to shader part epilog334main_body:335 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 2)336 ret <4 x float> %v337}338 339define amdgpu_ps <4 x float> @load_1d_glc_slc(<8 x i32> inreg %rsrc, i32 %s) {340; GCN-LABEL: load_1d_glc_slc:341; GCN: ; %bb.0: ; %main_body342; GCN-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc slc343; GCN-NEXT: s_waitcnt vmcnt(0)344; GCN-NEXT: ; return to shader part epilog345main_body:346 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 3)347 ret <4 x float> %v348}349 350define amdgpu_ps void @store_1d_glc(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s) {351; GCN-LABEL: store_1d_glc:352; GCN: ; %bb.0: ; %main_body353; GCN-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc354; GCN-NEXT: s_endpgm355main_body:356 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 1)357 ret void358}359 360define amdgpu_ps void @store_1d_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s) {361; GCN-LABEL: store_1d_slc:362; GCN: ; %bb.0: ; %main_body363; GCN-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm slc364; GCN-NEXT: s_endpgm365main_body:366 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 2)367 ret void368}369 370define amdgpu_ps void @store_1d_glc_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, i32 %s) {371; GCN-LABEL: store_1d_glc_slc:372; GCN: ; %bb.0: ; %main_body373; GCN-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc slc374; GCN-NEXT: s_endpgm375main_body:376 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 3)377 ret void378}379 380define amdgpu_ps void @image_store_wait(<8 x i32> inreg %arg, <8 x i32> inreg %arg1, <8 x i32> inreg %arg2, <4 x float> %arg3, i32 %arg4) #0 {381; GCN-LABEL: image_store_wait:382; GCN: ; %bb.0: ; %main_body383; GCN-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm384; GCN-NEXT: image_load v[0:3], v4, s[8:15] dmask:0xf unorm385; GCN-NEXT: s_waitcnt vmcnt(0)386; GCN-NEXT: image_store v[0:3], v4, s[16:23] dmask:0xf unorm387; GCN-NEXT: s_endpgm388main_body:389 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %arg3, i32 15, i32 %arg4, <8 x i32> %arg, i32 0, i32 0)390 %data = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %arg4, <8 x i32> %arg1, i32 0, i32 0)391 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %data, i32 15, i32 %arg4, <8 x i32> %arg2, i32 0, i32 0)392 ret void393}394 395define amdgpu_ps float @image_load_mmo(<8 x i32> inreg %rsrc, ptr addrspace(3) %lds, <2 x i32> %c) #0 {396 store float 0.000000e+00, ptr addrspace(3) %lds397 %c0 = extractelement <2 x i32> %c, i32 0398 %c1 = extractelement <2 x i32> %c, i32 1399 %tex = call float @llvm.amdgcn.image.load.2d.f32.i32(i32 1, i32 %c0, i32 %c1, <8 x i32> %rsrc, i32 0, i32 0)400 %tmp2 = getelementptr float, ptr addrspace(3) %lds, i32 4401 store float 0.000000e+00, ptr addrspace(3) %tmp2402 ret float %tex403}404 405define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, <2 x i32> %s) {406; GCN-LABEL: getresinfo_1d:407; GCN: ; %bb.0: ; %main_body408; GCN-NEXT: v_mov_b32_e32 v0, v1409; GCN-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm410; GCN-NEXT: s_waitcnt vmcnt(0)411; GCN-NEXT: ; return to shader part epilog412main_body:413 %s1 = extractelement <2 x i32> %s, i32 1414 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i32(i32 15, i32 %s1, <8 x i32> %rsrc, i32 0, i32 0)415 ret <4 x float> %v416}417 418define amdgpu_ps void @load_1d_agpr(<8 x i32> inreg %rsrc, i32 %s) {419; GCN-LABEL: load_1d_agpr:420; GCN: ; %bb.0:421; GCN-NEXT: image_load a[0:3], v0, s[0:7] dmask:0xf unorm422; GCN-NEXT: s_waitcnt vmcnt(0)423; GCN-NEXT: ;;#ASMSTART424; GCN-NEXT: ; use a[0:3]425; GCN-NEXT: ;;#ASMEND426; GCN-NEXT: s_endpgm427 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)428 call void asm sideeffect "; use $0", "a"(<4 x float> %v)429 ret void430}431 432define amdgpu_ps void @load_2d_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t) {433; GCN-LABEL: load_2d_agpr:434; GCN: ; %bb.0:435; GCN-NEXT: image_load a[0:3], v[0:1], s[0:7] dmask:0xf unorm436; GCN-NEXT: s_waitcnt vmcnt(0)437; GCN-NEXT: ;;#ASMSTART438; GCN-NEXT: ; use a[0:3]439; GCN-NEXT: ;;#ASMEND440; GCN-NEXT: s_endpgm441 %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i32(i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)442 call void asm sideeffect "; use $0", "a"(<4 x float> %v)443 ret void444}445 446define amdgpu_ps void @load_3d_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {447; GCN-LABEL: load_3d_agpr:448; GCN: ; %bb.0:449; GCN-NEXT: image_load a[0:3], v[0:2], s[0:7] dmask:0xf unorm450; GCN-NEXT: s_waitcnt vmcnt(0)451; GCN-NEXT: ;;#ASMSTART452; GCN-NEXT: ; use a[0:3]453; GCN-NEXT: ;;#ASMEND454; GCN-NEXT: s_endpgm455 %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)456 call void asm sideeffect "; use $0", "a"(<4 x float> %v)457 ret void458}459 460define amdgpu_ps void @load_cube_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice) {461; GCN-LABEL: load_cube_agpr:462; GCN: ; %bb.0:463; GCN-NEXT: image_load a[0:3], v[0:2], s[0:7] dmask:0xf unorm da464; GCN-NEXT: s_waitcnt vmcnt(0)465; GCN-NEXT: ;;#ASMSTART466; GCN-NEXT: ; use a[0:3]467; GCN-NEXT: ;;#ASMEND468; GCN-NEXT: s_endpgm469 %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)470 call void asm sideeffect "; use $0", "a"(<4 x float> %v)471 ret void472}473 474define amdgpu_ps void @store_1d_agpr(<8 x i32> inreg %rsrc, i32 %s) {475; GCN-LABEL: store_1d_agpr:476; GCN: ; %bb.0:477; GCN-NEXT: ;;#ASMSTART478; GCN-NEXT: ; def a[0:3]479; GCN-NEXT: ;;#ASMEND480; GCN-NEXT: image_store a[0:3], v0, s[0:7] dmask:0xf unorm481; GCN-NEXT: s_endpgm482 %vdata = call <4 x float> asm "; def $0", "=a"()483 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)484 ret void485}486 487define amdgpu_ps void @store_2d_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t) {488; GCN-LABEL: store_2d_agpr:489; GCN: ; %bb.0:490; GCN-NEXT: ;;#ASMSTART491; GCN-NEXT: ; def a[0:3]492; GCN-NEXT: ;;#ASMEND493; GCN-NEXT: image_store a[0:3], v[0:1], s[0:7] dmask:0xf unorm494; GCN-NEXT: s_endpgm495 %vdata = call <4 x float> asm "; def $0", "=a"()496 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)497 ret void498}499 500define amdgpu_ps void @store_3d_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {501; GCN-LABEL: store_3d_agpr:502; GCN: ; %bb.0:503; GCN-NEXT: ;;#ASMSTART504; GCN-NEXT: ; def a[0:3]505; GCN-NEXT: ;;#ASMEND506; GCN-NEXT: image_store a[0:3], v[0:2], s[0:7] dmask:0xf unorm507; GCN-NEXT: s_endpgm508 %vdata = call <4 x float> asm "; def $0", "=a"()509 call void @llvm.amdgcn.image.store.3d.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)510 ret void511}512 513define amdgpu_ps void @store_cube_agpr(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice) {514; GCN-LABEL: store_cube_agpr:515; GCN: ; %bb.0:516; GCN-NEXT: ;;#ASMSTART517; GCN-NEXT: ; def a[0:3]518; GCN-NEXT: ;;#ASMEND519; GCN-NEXT: image_store a[0:3], v[0:2], s[0:7] dmask:0xf unorm da520; GCN-NEXT: s_endpgm521 %vdata = call <4 x float> asm "; def $0", "=a"()522 call void @llvm.amdgcn.image.store.cube.v4f32.i32(<4 x float> %vdata, i32 15, i32 %s, i32 %t, i32 %slice, <8 x i32> %rsrc, i32 0, i32 0)523 ret void524}525 526declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32, i32, <8 x i32>, i32, i32) #1527declare {float,i32} @llvm.amdgcn.image.load.1d.f32i32.i32(i32, i32, <8 x i32>, i32, i32) #1528declare {<2 x float>,i32} @llvm.amdgcn.image.load.1d.v2f32i32.i32(i32, i32, <8 x i32>, i32, i32) #1529declare {<4 x float>,i32} @llvm.amdgcn.image.load.1d.v4f32i32.i32(i32, i32, <8 x i32>, i32, i32) #1530declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i32(i32, i32, i32, <8 x i32>, i32, i32) #1531declare {<4 x float>,i32} @llvm.amdgcn.image.load.2d.v4f32i32.i32(i32, i32, i32, <8 x i32>, i32, i32) #1532declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1533declare {<4 x float>,i32} @llvm.amdgcn.image.load.3d.v4f32i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1534declare <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1535declare {<4 x float>,i32} @llvm.amdgcn.image.load.cube.v4f32i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1536declare <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i32(i32, i32, i32, <8 x i32>, i32, i32) #1537declare {<4 x float>,i32} @llvm.amdgcn.image.load.1darray.v4f32i32.i32(i32, i32, i32, <8 x i32>, i32, i32) #1538declare <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1539declare {<4 x float>,i32} @llvm.amdgcn.image.load.2darray.v4f32i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1540declare <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1541declare {<4 x float>,i32} @llvm.amdgcn.image.load.2dmsaa.v4f32i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1542declare <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1543declare {<4 x float>,i32} @llvm.amdgcn.image.load.2darraymsaa.v4f32i32.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1544 545declare void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float>, i32, i32, <8 x i32>, i32, i32) #0546declare void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float>, i32, i32, i32, <8 x i32>, i32, i32) #0547declare void @llvm.amdgcn.image.store.3d.v4f32.i32(<4 x float>, i32, i32, i32, i32, <8 x i32>, i32, i32) #0548declare void @llvm.amdgcn.image.store.cube.v4f32.i32(<4 x float>, i32, i32, i32, i32, <8 x i32>, i32, i32) #0549declare void @llvm.amdgcn.image.store.1darray.v4f32.i32(<4 x float>, i32, i32, i32, <8 x i32>, i32, i32) #0550declare void @llvm.amdgcn.image.store.2darray.v4f32.i32(<4 x float>, i32, i32, i32, i32, <8 x i32>, i32, i32) #0551declare void @llvm.amdgcn.image.store.2dmsaa.v4f32.i32(<4 x float>, i32, i32, i32, i32, <8 x i32>, i32, i32) #0552declare void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i32(<4 x float>, i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #0553 554declare float @llvm.amdgcn.image.load.1d.f32.i32(i32, i32, <8 x i32>, i32, i32) #1555declare float @llvm.amdgcn.image.load.2d.f32.i32(i32, i32, i32, <8 x i32>, i32, i32) #1556declare <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i32(i32, i32, <8 x i32>, i32, i32) #1557declare void @llvm.amdgcn.image.store.1d.f32.i32(float, i32, i32, <8 x i32>, i32, i32) #0558declare void @llvm.amdgcn.image.store.1d.v2f32.i32(<2 x float>, i32, i32, <8 x i32>, i32, i32) #0559 560declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i32(i32, i32, <8 x i32>, i32, i32) #2561 562attributes #0 = { nounwind }563attributes #1 = { nounwind readonly }564attributes #2 = { nounwind readnone }565