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1; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=verde < %s | FileCheck -check-prefix=GCN %s2; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=verde < %s | FileCheck -check-prefix=GCN %s3 4; GCN-LABEL: {{^}}mbcnt_intrinsics:5; GCN: v_mbcnt_lo_u32_b32_e64 [[LO:v[0-9]+]], -1, 06; GCN: v_mbcnt_hi_u32_b32_e32 {{v[0-9]+}}, -1, [[LO]]7define amdgpu_ps void @mbcnt_intrinsics(ptr addrspace(4) inreg %arg, ptr addrspace(4) inreg %arg1, ptr addrspace(4) inreg %arg2, i32 inreg %arg3) {8main_body:9 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #010 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) #011 %tmp = bitcast i32 %hi to float12 call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp, float %tmp, float %tmp, float %tmp, i1 true, i1 true) #113 ret void14}15 16; GCN-LABEL: {{^}}mbcnt_lo_known_bits_1:17; GCN: v_mbcnt_lo_u32_b3218; GCN: v_and_b32_e3219define i32 @mbcnt_lo_known_bits_1(i32 %x, i32 %y) #0 {20 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 %y)21 %mask = and i32 %lo, 6322 ret i32 %mask23}24 25; GCN-LABEL: {{^}}mbcnt_lo_known_bits_2:26; GCN: v_mbcnt_lo_u32_b3227; GCN-NOT: and28define i32 @mbcnt_lo_known_bits_2(i32 %x) #0 {29 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 0)30 %mask = and i32 %lo, 6331 ret i32 %mask32}33 34; GCN-LABEL: {{^}}mbcnt_lo_known_bits_3:35; GCN: v_mbcnt_lo_u32_b3236; GCN-NOT: and37define i32 @mbcnt_lo_known_bits_3(i32 %x) #0 {38 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 15)39 %mask = and i32 %lo, 12740 ret i32 %mask41}42 43; GCN-LABEL: {{^}}mbcnt_lo_known_bits_4:44; GCN: v_mbcnt_lo_u32_b3245; GCN: v_and_b32_e3246define i32 @mbcnt_lo_known_bits_4(i32 %x) #0 {47 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 15)48 %mask = and i32 %lo, 6349 ret i32 %mask50}51 52 53; GCN-LABEL: {{^}}mbcnt_hi_known_bits_1:54; GCN: v_mbcnt_hi_u32_b3255; GCN: v_and_b32_e3256define i32 @mbcnt_hi_known_bits_1(i32 %x, i32 %y) #0 {57 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %y)58 %mask = and i32 %hi, 6359 ret i32 %mask60}61 62; GCN-LABEL: {{^}}mbcnt_hi_known_bits_2:63; GCN: v_mbcnt_hi_u32_b3264; GCN-NOT: and65define i32 @mbcnt_hi_known_bits_2(i32 %x) #0 {66 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 0)67 %mask = and i32 %hi, 6368 ret i32 %mask69}70 71; GCN-LABEL: {{^}}mbcnt_hi_known_bits_3:72; GCN: v_mbcnt_hi_u32_b3273; GCN-NOT: and74define i32 @mbcnt_hi_known_bits_3(i32 %x) #0 {75 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 15)76 %mask = and i32 %hi, 12777 ret i32 %mask78}79 80; GCN-LABEL: {{^}}mbcnt_hi_known_bits_4:81; GCN: v_mbcnt_hi_u32_b3282; GCN-NOT: v_and_b32_e3283define i32 @mbcnt_hi_known_bits_4(i32 %x) #0 {84 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 15)85 %mask = and i32 %hi, 6386 ret i32 %mask87}88 89; TODO: Special case mbcnt.lo feeding into mbcnt.hi to remove this AND.90; GCN-LABEL: {{^}}mbcnt_lo_hi_known_bits_1:91; GCN: v_mbcnt_lo_u32_b3292; GCN: v_mbcnt_hi_u32_b3293; GCN: v_and_b32_e3294define i32 @mbcnt_lo_hi_known_bits_1(i32 %x) #0 {95 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 0)96 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %lo)97 %mask = and i32 %hi, 6398 ret i32 %mask99}100 101declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0102declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0103declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1104 105attributes #0 = { nounwind readnone }106attributes #1 = { nounwind }107