67 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s4 5declare <2 x i32> @llvm.amdgcn.perm.pk16.b4.u4(i32, i32, <2 x i32>)6declare <3 x i32> @llvm.amdgcn.perm.pk16.b6.u4(i32, i64, <2 x i32>)7declare <4 x i32> @llvm.amdgcn.perm.pk16.b8.u4(i64, i64, <2 x i32>)8 9define void @test_perm_pk16_b4_u4(i32 %a, i32 %b, <2 x i32> %c, ptr %out) {10; GFX1250-LABEL: test_perm_pk16_b4_u4:11; GFX1250: ; %bb.0:12; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x013; GFX1250-NEXT: s_wait_kmcnt 0x014; GFX1250-NEXT: v_perm_pk16_b4_u4 v[0:1], v0, v1, v[2:3]15; GFX1250-NEXT: flat_store_b64 v[4:5], v[0:1]16; GFX1250-NEXT: s_wait_dscnt 0x017; GFX1250-NEXT: s_set_pc_i64 s[30:31]18 %ret = tail call <2 x i32> @llvm.amdgcn.perm.pk16.b4.u4(i32 %a, i32 %b, <2 x i32> %c)19 store <2 x i32> %ret, ptr %out, align 820 ret void21}22 23define void @test_perm_pk16_b6_u4(i32 %a, i64 %b, <2 x i32> %c, ptr %out) {24; GFX1250-SDAG-LABEL: test_perm_pk16_b6_u4:25; GFX1250-SDAG: ; %bb.0:26; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x027; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x028; GFX1250-SDAG-NEXT: v_dual_mov_b32 v7, v6 :: v_dual_mov_b32 v9, v429; GFX1250-SDAG-NEXT: v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v3, v230; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, v1 :: v_dual_mov_b32 v6, v531; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)32; GFX1250-SDAG-NEXT: v_perm_pk16_b6_u4 v[0:2], v0, v[2:3], v[8:9]33; GFX1250-SDAG-NEXT: flat_store_b96 v[6:7], v[0:2]34; GFX1250-SDAG-NEXT: s_wait_dscnt 0x035; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]36;37; GFX1250-GISEL-LABEL: test_perm_pk16_b6_u4:38; GFX1250-GISEL: ; %bb.0:39; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x040; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x041; GFX1250-GISEL-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v9, v242; GFX1250-GISEL-NEXT: v_dual_mov_b32 v2, v3 :: v_dual_mov_b32 v3, v443; GFX1250-GISEL-NEXT: v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v644; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)45; GFX1250-GISEL-NEXT: v_perm_pk16_b6_u4 v[0:2], v0, v[8:9], v[2:3]46; GFX1250-GISEL-NEXT: flat_store_b96 v[4:5], v[0:2]47; GFX1250-GISEL-NEXT: s_wait_dscnt 0x048; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]49 %ret = tail call <3 x i32> @llvm.amdgcn.perm.pk16.b6.u4(i32 %a, i64 %b, <2 x i32> %c)50 store <3 x i32> %ret, ptr %out, align 1651 ret void52}53 54define void @test_perm_pk16_b8_u4(i64 %a, i64 %b, <2 x i32> %c, ptr %out) {55; GFX1250-LABEL: test_perm_pk16_b8_u4:56; GFX1250: ; %bb.0:57; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x058; GFX1250-NEXT: s_wait_kmcnt 0x059; GFX1250-NEXT: v_perm_pk16_b8_u4 v[0:3], v[0:1], v[2:3], v[4:5]60; GFX1250-NEXT: flat_store_b128 v[6:7], v[0:3]61; GFX1250-NEXT: s_wait_dscnt 0x062; GFX1250-NEXT: s_set_pc_i64 s[30:31]63 %ret = tail call <4 x i32> @llvm.amdgcn.perm.pk16.b8.u4(i64 %a, i64 %b, <2 x i32> %c)64 store <4 x i32> %ret, ptr %out, align 1665 ret void66}67