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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950 %s3; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950 %s4; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250 %s5; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250 %s6 7; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR-SDAG %s8; RUN: not llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR-GISEL %s9 10; ERR-SDAG: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.permlane16.swap11; ERR-GISEL: LLVM ERROR: cannot select: %{{[0-9]+}}:vgpr_32(s32), %{{[0-9]+}}:vgpr_32(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.permlane16.swap)12 13 14declare { i32, i32 } @llvm.amdgcn.permlane16.swap(i32, i32, i1 immarg, i1 immarg)15 16define { i32, i32 } @v_permlane16_swap_b32_vv(i32 %vdst_old, i32 %src0_old) {17; GCN-LABEL: v_permlane16_swap_b32_vv:18; GCN: ; %bb.0:19; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)20; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v121; GCN-NEXT: s_setpc_b64 s[30:31]22; GFX950-LABEL: v_permlane16_swap_b32_vv:23; GFX950: ; %bb.0:24; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v126; GFX950-NEXT: s_setpc_b64 s[30:31]27;28; GFX1250-LABEL: v_permlane16_swap_b32_vv:29; GFX1250: ; %bb.0:30; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x031; GFX1250-NEXT: s_wait_kmcnt 0x032; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v133; GFX1250-NEXT: s_set_pc_i64 s[30:31]34 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 false, i1 false)35 ret { i32, i32 } %v36}37 38define { i32, i32 } @v_permlane16_swap_b32_vi(i32 %vdst_old) {39; GCN-LABEL: v_permlane16_swap_b32_vi:40; GCN: ; %bb.0:41; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)42; GCN-NEXT: v_mov_b32_e32 v1, 143; GCN-NEXT: s_nop 144; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v145; GCN-NEXT: s_setpc_b64 s[30:31]46; GFX950-LABEL: v_permlane16_swap_b32_vi:47; GFX950: ; %bb.0:48; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX950-NEXT: v_mov_b32_e32 v1, 150; GFX950-NEXT: s_nop 151; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v152; GFX950-NEXT: s_setpc_b64 s[30:31]53;54; GFX1250-LABEL: v_permlane16_swap_b32_vi:55; GFX1250: ; %bb.0:56; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x057; GFX1250-NEXT: s_wait_kmcnt 0x058; GFX1250-NEXT: v_mov_b32_e32 v1, 159; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)60; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v161; GFX1250-NEXT: s_set_pc_i64 s[30:31]62 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 1, i1 false, i1 false)63 ret { i32, i32 } %v64}65 66define { i32, i32 } @v_permlane16_swap_b32_vl(i32 %vdst_old) {67; GCN-LABEL: v_permlane16_swap_b32_vl:68; GCN: ; %bb.0:69; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)70; GCN-NEXT: v_mov_b32_e32 v1, 0xc1d171; GCN-NEXT: s_nop 172; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v173; GCN-NEXT: s_setpc_b64 s[30:31]74; GFX950-LABEL: v_permlane16_swap_b32_vl:75; GFX950: ; %bb.0:76; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX950-NEXT: v_mov_b32_e32 v1, 0xc1d178; GFX950-NEXT: s_nop 179; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v180; GFX950-NEXT: s_setpc_b64 s[30:31]81;82; GFX1250-LABEL: v_permlane16_swap_b32_vl:83; GFX1250: ; %bb.0:84; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x085; GFX1250-NEXT: s_wait_kmcnt 0x086; GFX1250-NEXT: v_mov_b32_e32 v1, 0xc1d187; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)88; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v189; GFX1250-NEXT: s_set_pc_i64 s[30:31]90 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 49617, i1 false, i1 false)91 ret { i32, i32 } %v92}93 94define { i32, i32 } @v_permlane16_swap_b32_iv(i32 %src0_old) {95; GCN-LABEL: v_permlane16_swap_b32_iv:96; GCN: ; %bb.0:97; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)98; GCN-NEXT: v_mov_b32_e32 v1, v099; GCN-NEXT: v_mov_b32_e32 v0, 1100; GCN-NEXT: s_nop 1101; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v1102; GCN-NEXT: s_setpc_b64 s[30:31]103; GFX950-LABEL: v_permlane16_swap_b32_iv:104; GFX950: ; %bb.0:105; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)106; GFX950-NEXT: v_mov_b32_e32 v1, v0107; GFX950-NEXT: v_mov_b32_e32 v0, 1108; GFX950-NEXT: s_nop 1109; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v1110; GFX950-NEXT: s_setpc_b64 s[30:31]111;112; GFX1250-LABEL: v_permlane16_swap_b32_iv:113; GFX1250: ; %bb.0:114; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0115; GFX1250-NEXT: s_wait_kmcnt 0x0116; GFX1250-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, 1117; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)118; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v1119; GFX1250-NEXT: s_set_pc_i64 s[30:31]120 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 1, i32 %src0_old, i1 false, i1 false)121 ret { i32, i32 } %v122}123 124define { i32, i32 } @v_permlane16_swap_b32_ss(i32 inreg %vdst_old, i32 inreg %src0_old) {125; GCN-LABEL: v_permlane16_swap_b32_ss:126; GCN: ; %bb.0:127; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)128; GCN-NEXT: v_mov_b32_e32 v0, s0129; GCN-NEXT: v_mov_b32_e32 v1, s1130; GCN-NEXT: s_nop 1131; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v1132; GCN-NEXT: s_setpc_b64 s[30:31]133; GFX950-LABEL: v_permlane16_swap_b32_ss:134; GFX950: ; %bb.0:135; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)136; GFX950-NEXT: v_mov_b32_e32 v0, s0137; GFX950-NEXT: v_mov_b32_e32 v1, s1138; GFX950-NEXT: s_nop 1139; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v1140; GFX950-NEXT: s_setpc_b64 s[30:31]141;142; GFX1250-LABEL: v_permlane16_swap_b32_ss:143; GFX1250: ; %bb.0:144; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0145; GFX1250-NEXT: s_wait_kmcnt 0x0146; GFX1250-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1147; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)148; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v1149; GFX1250-NEXT: s_set_pc_i64 s[30:31]150 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 false, i1 false)151 ret { i32, i32 } %v152}153 154define { i32, i32 } @v_permlane16_swap_b32_sv(i32 inreg %vdst_old, i32 %src0_old) {155; GCN-LABEL: v_permlane16_swap_b32_sv:156; GCN: ; %bb.0:157; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)158; GCN-NEXT: v_mov_b32_e32 v1, v0159; GCN-NEXT: v_mov_b32_e32 v0, s0160; GCN-NEXT: s_nop 1161; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v1162; GCN-NEXT: s_setpc_b64 s[30:31]163; GFX950-LABEL: v_permlane16_swap_b32_sv:164; GFX950: ; %bb.0:165; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)166; GFX950-NEXT: v_mov_b32_e32 v1, v0167; GFX950-NEXT: v_mov_b32_e32 v0, s0168; GFX950-NEXT: s_nop 1169; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v1170; GFX950-NEXT: s_setpc_b64 s[30:31]171;172; GFX1250-LABEL: v_permlane16_swap_b32_sv:173; GFX1250: ; %bb.0:174; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0175; GFX1250-NEXT: s_wait_kmcnt 0x0176; GFX1250-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, s0177; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)178; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v1179; GFX1250-NEXT: s_set_pc_i64 s[30:31]180 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 false, i1 false)181 ret { i32, i32 } %v182}183 184define { i32, i32 } @v_permlane16_swap_b32_vs(i32 %vdst_old, i32 inreg %src0_old) {185; GCN-LABEL: v_permlane16_swap_b32_vs:186; GCN: ; %bb.0:187; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)188; GCN-NEXT: v_mov_b32_e32 v1, s0189; GCN-NEXT: s_nop 1190; GCN-NEXT: v_permlane16_swap_b32_e32 v0, v1191; GCN-NEXT: s_setpc_b64 s[30:31]192; GFX950-LABEL: v_permlane16_swap_b32_vs:193; GFX950: ; %bb.0:194; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)195; GFX950-NEXT: v_mov_b32_e32 v1, s0196; GFX950-NEXT: s_nop 1197; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v1198; GFX950-NEXT: s_setpc_b64 s[30:31]199;200; GFX1250-LABEL: v_permlane16_swap_b32_vs:201; GFX1250: ; %bb.0:202; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0203; GFX1250-NEXT: s_wait_kmcnt 0x0204; GFX1250-NEXT: v_mov_b32_e32 v1, s0205; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)206; GFX1250-NEXT: v_permlane16_swap_b32_e32 v0, v1207; GFX1250-NEXT: s_set_pc_i64 s[30:31]208 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 false, i1 false)209 ret { i32, i32 } %v210}211 212define { i32, i32 } @v_permlane16_swap_b32_vv_fi(i32 %vdst_old, i32 %src0_old) {213; GCN-LABEL: v_permlane16_swap_b32_vv_fi:214; GCN: ; %bb.0:215; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)216; GCN-NEXT: v_permlane16_swap_b32_e64 v0, v1 fi:1217; GCN-NEXT: s_setpc_b64 s[30:31]218; GFX950-LABEL: v_permlane16_swap_b32_vv_fi:219; GFX950: ; %bb.0:220; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)221; GFX950-NEXT: v_permlane16_swap_b32_e64 v0, v1 fi:1222; GFX950-NEXT: s_setpc_b64 s[30:31]223;224; GFX1250-LABEL: v_permlane16_swap_b32_vv_fi:225; GFX1250: ; %bb.0:226; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0227; GFX1250-NEXT: s_wait_kmcnt 0x0228; GFX1250-NEXT: v_permlane16_swap_b32_e64 v0, v1 fi:1229; GFX1250-NEXT: s_set_pc_i64 s[30:31]230 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 true, i1 false)231 ret { i32, i32 } %v232}233 234define { i32, i32 } @v_permlane16_swap_b32_vv_bc(i32 %vdst_old, i32 %src0_old) {235; GCN-LABEL: v_permlane16_swap_b32_vv_bc:236; GCN: ; %bb.0:237; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)238; GCN-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1239; GCN-NEXT: s_setpc_b64 s[30:31]240; GFX950-LABEL: v_permlane16_swap_b32_vv_bc:241; GFX950: ; %bb.0:242; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)243; GFX950-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1244; GFX950-NEXT: s_setpc_b64 s[30:31]245;246; GFX1250-LABEL: v_permlane16_swap_b32_vv_bc:247; GFX1250: ; %bb.0:248; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0249; GFX1250-NEXT: s_wait_kmcnt 0x0250; GFX1250-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1251; GFX1250-NEXT: s_set_pc_i64 s[30:31]252 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 false, i1 true)253 ret { i32, i32 } %v254}255 256define { i32, i32 } @v_permlane16_swap_b32_vv_fi_bc(i32 %vdst_old, i32 %src0_old) {257; GCN-LABEL: v_permlane16_swap_b32_vv_fi_bc:258; GCN: ; %bb.0:259; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)260; GCN-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1 fi:1261; GCN-NEXT: s_setpc_b64 s[30:31]262; GFX950-LABEL: v_permlane16_swap_b32_vv_fi_bc:263; GFX950: ; %bb.0:264; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)265; GFX950-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1 fi:1266; GFX950-NEXT: s_setpc_b64 s[30:31]267;268; GFX1250-LABEL: v_permlane16_swap_b32_vv_fi_bc:269; GFX1250: ; %bb.0:270; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0271; GFX1250-NEXT: s_wait_kmcnt 0x0272; GFX1250-NEXT: v_permlane16_swap_b32_e64 v0, v1 bound_ctrl:1 fi:1273; GFX1250-NEXT: s_set_pc_i64 s[30:31]274 %v = call { i32, i32 } @llvm.amdgcn.permlane16.swap(i32 %vdst_old, i32 %src0_old, i1 true, i1 true)275 ret { i32, i32 } %v276}277