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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-TRUE163; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE164; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-TRUE165; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE166; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 -new-reg-bank-select | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL7; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=1 -new-reg-bank-select | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL8; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX12,GFX12-SDAG-TRUE169; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX12,GFX12-FAKE1610; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX12,GFX12-GISEL-TRUE1611; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX12,GFX12-FAKE1612 13define amdgpu_kernel void @raw_ptr_atomic_buffer_ptr_load_i32(ptr addrspace(8) %ptr) {14; GFX11-LABEL: raw_ptr_atomic_buffer_ptr_load_i32:15; GFX11: ; %bb.0: ; %bb16; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2417; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v018; GFX11-NEXT: s_mov_b32 s4, 019; GFX11-NEXT: .LBB0_1: ; %bb120; GFX11-NEXT: ; =>This Inner Loop Header: Depth=121; GFX11-NEXT: s_waitcnt lgkmcnt(0)22; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 0 glc23; GFX11-NEXT: s_waitcnt vmcnt(0)24; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v025; GFX11-NEXT: s_or_b32 s4, vcc_lo, s426; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)27; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s428; GFX11-NEXT: s_cbranch_execnz .LBB0_129; GFX11-NEXT: ; %bb.2: ; %bb230; GFX11-NEXT: s_endpgm31;32; GFX12-LABEL: raw_ptr_atomic_buffer_ptr_load_i32:33; GFX12: ; %bb.0: ; %bb34; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 135; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2436; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v037; GFX12-NEXT: s_wait_xcnt 0x038; GFX12-NEXT: s_mov_b32 s4, 039; GFX12-NEXT: .LBB0_1: ; %bb140; GFX12-NEXT: ; =>This Inner Loop Header: Depth=141; GFX12-NEXT: s_wait_kmcnt 0x042; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], null th:TH_LOAD_NT43; GFX12-NEXT: s_wait_loadcnt 0x044; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v045; GFX12-NEXT: s_or_b32 s4, vcc_lo, s446; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)47; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s448; GFX12-NEXT: s_cbranch_execnz .LBB0_149; GFX12-NEXT: ; %bb.2: ; %bb250; GFX12-NEXT: s_endpgm51bb:52 %id = tail call i32 @llvm.amdgcn.workitem.id.x()53 br label %bb154bb1:55 %load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)56 %cmp = icmp eq i32 %load, %id57 br i1 %cmp, label %bb1, label %bb258bb2:59 ret void60}61 62define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_off(ptr addrspace(8) %ptr) {63; GFX11-LABEL: raw_ptr_atomic_buffer_load_i32_off:64; GFX11: ; %bb.0: ; %bb65; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2466; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v067; GFX11-NEXT: s_mov_b32 s4, 068; GFX11-NEXT: .LBB1_1: ; %bb169; GFX11-NEXT: ; =>This Inner Loop Header: Depth=170; GFX11-NEXT: s_waitcnt lgkmcnt(0)71; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 0 glc72; GFX11-NEXT: s_waitcnt vmcnt(0)73; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v074; GFX11-NEXT: s_or_b32 s4, vcc_lo, s475; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)76; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s477; GFX11-NEXT: s_cbranch_execnz .LBB1_178; GFX11-NEXT: ; %bb.2: ; %bb279; GFX11-NEXT: s_endpgm80;81; GFX12-LABEL: raw_ptr_atomic_buffer_load_i32_off:82; GFX12: ; %bb.0: ; %bb83; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 184; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2485; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v086; GFX12-NEXT: s_wait_xcnt 0x087; GFX12-NEXT: s_mov_b32 s4, 088; GFX12-NEXT: .LBB1_1: ; %bb189; GFX12-NEXT: ; =>This Inner Loop Header: Depth=190; GFX12-NEXT: s_wait_kmcnt 0x091; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], null th:TH_LOAD_NT92; GFX12-NEXT: s_wait_loadcnt 0x093; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v094; GFX12-NEXT: s_or_b32 s4, vcc_lo, s495; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)96; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s497; GFX12-NEXT: s_cbranch_execnz .LBB1_198; GFX12-NEXT: ; %bb.2: ; %bb299; GFX12-NEXT: s_endpgm100bb:101 %id = tail call i32 @llvm.amdgcn.workitem.id.x()102 br label %bb1103bb1:104 %load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)105 %cmp = icmp eq i32 %load, %id106 br i1 %cmp, label %bb1, label %bb2107bb2:108 ret void109}110define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_soff(ptr addrspace(8) %ptr) {111; GFX11-LABEL: raw_ptr_atomic_buffer_load_i32_soff:112; GFX11: ; %bb.0: ; %bb113; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24114; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0115; GFX11-NEXT: s_mov_b32 s4, 0116; GFX11-NEXT: .LBB2_1: ; %bb1117; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1118; GFX11-NEXT: s_waitcnt lgkmcnt(0)119; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 4 offset:4 glc120; GFX11-NEXT: s_waitcnt vmcnt(0)121; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0122; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4123; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)124; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4125; GFX11-NEXT: s_cbranch_execnz .LBB2_1126; GFX11-NEXT: ; %bb.2: ; %bb2127; GFX11-NEXT: s_endpgm128;129; GFX12-LABEL: raw_ptr_atomic_buffer_load_i32_soff:130; GFX12: ; %bb.0: ; %bb131; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1132; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24133; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0134; GFX12-NEXT: s_wait_xcnt 0x0135; GFX12-NEXT: s_mov_b32 s4, 0136; GFX12-NEXT: s_mov_b32 s5, 4137; GFX12-NEXT: .LBB2_1: ; %bb1138; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1139; GFX12-NEXT: s_wait_kmcnt 0x0140; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], s5 offset:4 th:TH_LOAD_NT141; GFX12-NEXT: s_wait_loadcnt 0x0142; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0143; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4144; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)145; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4146; GFX12-NEXT: s_cbranch_execnz .LBB2_1147; GFX12-NEXT: ; %bb.2: ; %bb2148; GFX12-NEXT: s_endpgm149bb:150 %id = tail call i32 @llvm.amdgcn.workitem.id.x()151 br label %bb1152bb1:153 %load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 4, i32 1)154 %cmp = icmp eq i32 %load, %id155 br i1 %cmp, label %bb1, label %bb2156bb2:157 ret void158}159define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_dlc(ptr addrspace(8) %ptr) {160; GFX11-LABEL: raw_ptr_atomic_buffer_load_i32_dlc:161; GFX11: ; %bb.0: ; %bb162; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24163; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0164; GFX11-NEXT: s_mov_b32 s4, 0165; GFX11-NEXT: .LBB3_1: ; %bb1166; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1167; GFX11-NEXT: s_waitcnt lgkmcnt(0)168; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 0 offset:4 dlc169; GFX11-NEXT: s_waitcnt vmcnt(0)170; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0171; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4172; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)173; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4174; GFX11-NEXT: s_cbranch_execnz .LBB3_1175; GFX11-NEXT: ; %bb.2: ; %bb2176; GFX11-NEXT: s_endpgm177;178; GFX12-LABEL: raw_ptr_atomic_buffer_load_i32_dlc:179; GFX12: ; %bb.0: ; %bb180; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1181; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24182; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0183; GFX12-NEXT: s_wait_xcnt 0x0184; GFX12-NEXT: s_mov_b32 s4, 0185; GFX12-NEXT: .LBB3_1: ; %bb1186; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1187; GFX12-NEXT: s_wait_kmcnt 0x0188; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], null offset:4 th:TH_LOAD_NT_RT189; GFX12-NEXT: s_wait_loadcnt 0x0190; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0191; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4192; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)193; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4194; GFX12-NEXT: s_cbranch_execnz .LBB3_1195; GFX12-NEXT: ; %bb.2: ; %bb2196; GFX12-NEXT: s_endpgm197bb:198 %id = tail call i32 @llvm.amdgcn.workitem.id.x()199 br label %bb1200bb1:201 %load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 4)202 %cmp = icmp eq i32 %load, %id203 br i1 %cmp, label %bb1, label %bb2204bb2:205 ret void206}207 208define amdgpu_kernel void @raw_nonptr_atomic_buffer_load_i32(ptr addrspace(8) %ptr) {209; GFX11-LABEL: raw_nonptr_atomic_buffer_load_i32:210; GFX11: ; %bb.0: ; %bb211; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24212; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0213; GFX11-NEXT: s_waitcnt lgkmcnt(0)214; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 0 offset:4 glc215; GFX11-NEXT: s_mov_b32 s0, 0216; GFX11-NEXT: s_waitcnt vmcnt(0)217; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0218; GFX11-NEXT: .LBB4_1: ; %bb1219; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1220; GFX11-NEXT: s_and_b32 s1, exec_lo, vcc_lo221; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)222; GFX11-NEXT: s_or_b32 s0, s1, s0223; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0224; GFX11-NEXT: s_cbranch_execnz .LBB4_1225; GFX11-NEXT: ; %bb.2: ; %bb2226; GFX11-NEXT: s_endpgm227;228; GFX12-LABEL: raw_nonptr_atomic_buffer_load_i32:229; GFX12: ; %bb.0: ; %bb230; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1231; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24232; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0233; GFX12-NEXT: s_wait_kmcnt 0x0234; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], null offset:4 th:TH_LOAD_NT235; GFX12-NEXT: s_wait_xcnt 0x0236; GFX12-NEXT: s_mov_b32 s0, 0237; GFX12-NEXT: s_wait_loadcnt 0x0238; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0239; GFX12-NEXT: .LBB4_1: ; %bb1240; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1241; GFX12-NEXT: s_and_b32 s1, exec_lo, vcc_lo242; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)243; GFX12-NEXT: s_or_b32 s0, s1, s0244; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0245; GFX12-NEXT: s_cbranch_execnz .LBB4_1246; GFX12-NEXT: ; %bb.2: ; %bb2247; GFX12-NEXT: s_endpgm248bb:249 %id = tail call i32 @llvm.amdgcn.workitem.id.x()250 br label %bb1251bb1:252 %load = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)253 %cmp = icmp eq i32 %load, %id254 br i1 %cmp, label %bb1, label %bb2255bb2:256 ret void257}258 259define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i64(ptr addrspace(8) %ptr) {260; GFX11-LABEL: raw_ptr_atomic_buffer_load_i64:261; GFX11: ; %bb.0: ; %bb262; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24263; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0264; GFX11-NEXT: s_mov_b32 s4, 0265; GFX11-NEXT: .LBB5_1: ; %bb1266; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1267; GFX11-NEXT: s_waitcnt lgkmcnt(0)268; GFX11-NEXT: buffer_load_b64 v[2:3], off, s[0:3], 0 offset:4 glc269; GFX11-NEXT: s_waitcnt vmcnt(0)270; GFX11-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[0:1]271; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4272; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)273; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4274; GFX11-NEXT: s_cbranch_execnz .LBB5_1275; GFX11-NEXT: ; %bb.2: ; %bb2276; GFX11-NEXT: s_endpgm277;278; GFX12-SDAG-TRUE16-LABEL: raw_ptr_atomic_buffer_load_i64:279; GFX12-SDAG-TRUE16: ; %bb.0: ; %bb280; GFX12-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1281; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24282; GFX12-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 0283; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0284; GFX12-SDAG-TRUE16-NEXT: s_wait_xcnt 0x0285; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0286; GFX12-SDAG-TRUE16-NEXT: .LBB5_1: ; %bb1287; GFX12-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1288; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0289; GFX12-SDAG-TRUE16-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT290; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0291; GFX12-SDAG-TRUE16-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[0:1]292; GFX12-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4293; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)294; GFX12-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4295; GFX12-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB5_1296; GFX12-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2297; GFX12-SDAG-TRUE16-NEXT: s_endpgm298;299; GFX12-GISEL-TRUE16-LABEL: raw_ptr_atomic_buffer_load_i64:300; GFX12-GISEL-TRUE16: ; %bb.0: ; %bb301; GFX12-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1302; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24303; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0304; GFX12-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0305; GFX12-GISEL-TRUE16-NEXT: s_wait_xcnt 0x0306; GFX12-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0307; GFX12-GISEL-TRUE16-NEXT: .LBB5_1: ; %bb1308; GFX12-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1309; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0310; GFX12-GISEL-TRUE16-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT311; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0312; GFX12-GISEL-TRUE16-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[0:1]313; GFX12-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4314; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)315; GFX12-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4316; GFX12-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB5_1317; GFX12-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2318; GFX12-GISEL-TRUE16-NEXT: s_endpgm319bb:320 %id = tail call i32 @llvm.amdgcn.workitem.id.x()321 %id.zext = zext i32 %id to i64322 br label %bb1323bb1:324 %load = call i64 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i64(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)325 %cmp = icmp eq i64 %load, %id.zext326 br i1 %cmp, label %bb1, label %bb2327bb2:328 ret void329}330 331define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v2i16(ptr addrspace(8) %ptr) {332; GFX11-LABEL: raw_ptr_atomic_buffer_load_v2i16:333; GFX11: ; %bb.0: ; %bb334; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24335; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0336; GFX11-NEXT: s_mov_b32 s4, 0337; GFX11-NEXT: .LBB6_1: ; %bb1338; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1339; GFX11-NEXT: s_waitcnt lgkmcnt(0)340; GFX11-NEXT: buffer_load_b32 v1, off, s[0:3], 0 glc341; GFX11-NEXT: s_waitcnt vmcnt(0)342; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0343; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4344; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)345; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4346; GFX11-NEXT: s_cbranch_execnz .LBB6_1347; GFX11-NEXT: ; %bb.2: ; %bb2348; GFX11-NEXT: s_endpgm349;350; GFX12-LABEL: raw_ptr_atomic_buffer_load_v2i16:351; GFX12: ; %bb.0: ; %bb352; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1353; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24354; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0355; GFX12-NEXT: s_wait_xcnt 0x0356; GFX12-NEXT: s_mov_b32 s4, 0357; GFX12-NEXT: .LBB6_1: ; %bb1358; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1359; GFX12-NEXT: s_wait_kmcnt 0x0360; GFX12-NEXT: buffer_load_b32 v1, off, s[0:3], null th:TH_LOAD_NT361; GFX12-NEXT: s_wait_loadcnt 0x0362; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0363; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4364; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)365; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4366; GFX12-NEXT: s_cbranch_execnz .LBB6_1367; GFX12-NEXT: ; %bb.2: ; %bb2368; GFX12-NEXT: s_endpgm369bb:370 %id = tail call i32 @llvm.amdgcn.workitem.id.x()371 br label %bb1372bb1:373 %load = call <2 x i16> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v2i16(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)374 %bitcast = bitcast <2 x i16> %load to i32375 %cmp = icmp eq i32 %bitcast, %id376 br i1 %cmp, label %bb1, label %bb2377bb2:378 ret void379}380 381define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i16(ptr addrspace(8) %ptr) {382; GFX11-SDAG-TRUE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:383; GFX11-SDAG-TRUE16: ; %bb.0: ; %bb384; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24385; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0386; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0387; GFX11-SDAG-TRUE16-NEXT: .LBB7_1: ; %bb1388; GFX11-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1389; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0)390; GFX11-SDAG-TRUE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc391; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0)392; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l393; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)394; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0395; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4396; GFX11-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4397; GFX11-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB7_1398; GFX11-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2399; GFX11-SDAG-TRUE16-NEXT: s_endpgm400;401; GFX11-FAKE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:402; GFX11-FAKE16: ; %bb.0: ; %bb403; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24404; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0405; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0406; GFX11-FAKE16-NEXT: .LBB7_1: ; %bb1407; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1408; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)409; GFX11-FAKE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc410; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)411; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1412; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)413; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v2, 16, v1414; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0415; GFX11-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4416; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)417; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4418; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB7_1419; GFX11-FAKE16-NEXT: ; %bb.2: ; %bb2420; GFX11-FAKE16-NEXT: s_endpgm421;422; GFX11-GISEL-TRUE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:423; GFX11-GISEL-TRUE16: ; %bb.0: ; %bb424; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24425; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0426; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0427; GFX11-GISEL-TRUE16-NEXT: .LBB7_1: ; %bb1428; GFX11-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1429; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)430; GFX11-GISEL-TRUE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc431; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)432; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l433; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)434; GFX11-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0435; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4436; GFX11-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4437; GFX11-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB7_1438; GFX11-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2439; GFX11-GISEL-TRUE16-NEXT: s_endpgm440;441; GFX11-GISEL-LABEL: raw_ptr_atomic_buffer_load_v4i16:442; GFX11-GISEL: ; %bb.0: ; %bb443; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24444; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0445; GFX11-GISEL-NEXT: s_mov_b32 s4, 0446; GFX11-GISEL-NEXT: .LBB7_1: ; %bb1447; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1448; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)449; GFX11-GISEL-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc450; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)451; GFX11-GISEL-NEXT: v_readfirstlane_b32 s5, v1452; GFX11-GISEL-NEXT: v_readfirstlane_b32 s6, v2453; GFX11-GISEL-NEXT: s_pack_ll_b32_b16 s5, s5, s6454; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)455; GFX11-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0456; GFX11-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4457; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4458; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB7_1459; GFX11-GISEL-NEXT: ; %bb.2: ; %bb2460; GFX11-GISEL-NEXT: s_endpgm461;462; GFX12-SDAG-TRUE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:463; GFX12-SDAG-TRUE16: ; %bb.0: ; %bb464; GFX12-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1465; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24466; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0467; GFX12-SDAG-TRUE16-NEXT: s_wait_xcnt 0x0468; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0469; GFX12-SDAG-TRUE16-NEXT: .LBB7_1: ; %bb1470; GFX12-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1471; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0472; GFX12-SDAG-TRUE16-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT473; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0474; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l475; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)476; GFX12-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0477; GFX12-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4478; GFX12-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4479; GFX12-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB7_1480; GFX12-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2481; GFX12-SDAG-TRUE16-NEXT: s_endpgm482;483; GFX12-FAKE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:484; GFX12-FAKE16: ; %bb.0: ; %bb485; GFX12-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1486; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24487; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0488; GFX12-FAKE16-NEXT: s_wait_xcnt 0x0489; GFX12-FAKE16-NEXT: s_mov_b32 s4, 0490; GFX12-FAKE16-NEXT: .LBB7_1: ; %bb1491; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1492; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0493; GFX12-FAKE16-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT494; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0495; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v2496; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)497; GFX12-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v1498; GFX12-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0499; GFX12-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4500; GFX12-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)501; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4502; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB7_1503; GFX12-FAKE16-NEXT: ; %bb.2: ; %bb2504; GFX12-FAKE16-NEXT: s_endpgm505;506; GFX12-GISEL-TRUE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:507; GFX12-GISEL-TRUE16: ; %bb.0: ; %bb508; GFX12-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1509; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24510; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0511; GFX12-GISEL-TRUE16-NEXT: s_wait_xcnt 0x0512; GFX12-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0513; GFX12-GISEL-TRUE16-NEXT: .LBB7_1: ; %bb1514; GFX12-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1515; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0516; GFX12-GISEL-TRUE16-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT517; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0518; GFX12-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l519; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)520; GFX12-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0521; GFX12-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4522; GFX12-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4523; GFX12-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB7_1524; GFX12-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2525; GFX12-GISEL-TRUE16-NEXT: s_endpgm526bb:527 %id = tail call i32 @llvm.amdgcn.workitem.id.x()528 br label %bb1529bb1:530 %load = call <4 x i16> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v4i16(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)531 %shortened = shufflevector <4 x i16> %load, <4 x i16> poison, <2 x i32> <i32 0, i32 2>532 %bitcast = bitcast <2 x i16> %shortened to i32533 %cmp = icmp eq i32 %bitcast, %id534 br i1 %cmp, label %bb1, label %bb2535bb2:536 ret void537}538 539define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i32(ptr addrspace(8) %ptr) {540; GFX11-LABEL: raw_ptr_atomic_buffer_load_v4i32:541; GFX11: ; %bb.0: ; %bb542; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24543; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0544; GFX11-NEXT: s_mov_b32 s4, 0545; GFX11-NEXT: .LBB8_1: ; %bb1546; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1547; GFX11-NEXT: s_waitcnt lgkmcnt(0)548; GFX11-NEXT: buffer_load_b128 v[1:4], off, s[0:3], 0 offset:4 glc549; GFX11-NEXT: s_waitcnt vmcnt(0)550; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v4, v0551; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4552; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)553; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4554; GFX11-NEXT: s_cbranch_execnz .LBB8_1555; GFX11-NEXT: ; %bb.2: ; %bb2556; GFX11-NEXT: s_endpgm557;558; GFX12-LABEL: raw_ptr_atomic_buffer_load_v4i32:559; GFX12: ; %bb.0: ; %bb560; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1561; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24562; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0563; GFX12-NEXT: s_wait_xcnt 0x0564; GFX12-NEXT: s_mov_b32 s4, 0565; GFX12-NEXT: .LBB8_1: ; %bb1566; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1567; GFX12-NEXT: s_wait_kmcnt 0x0568; GFX12-NEXT: buffer_load_b128 v[2:5], off, s[0:3], null offset:4 th:TH_LOAD_NT569; GFX12-NEXT: s_wait_loadcnt 0x0570; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v5, v0571; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4572; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)573; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4574; GFX12-NEXT: s_cbranch_execnz .LBB8_1575; GFX12-NEXT: ; %bb.2: ; %bb2576; GFX12-NEXT: s_endpgm577bb:578 %id = tail call i32 @llvm.amdgcn.workitem.id.x()579 br label %bb1580bb1:581 %load = call <4 x i32> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v4i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)582 %extracted = extractelement <4 x i32> %load, i32 3583 %cmp = icmp eq i32 %extracted, %id584 br i1 %cmp, label %bb1, label %bb2585bb2:586 ret void587}588 589define amdgpu_kernel void @raw_ptr_atomic_buffer_load_ptr(ptr addrspace(8) %ptr) {590; GFX11-LABEL: raw_ptr_atomic_buffer_load_ptr:591; GFX11: ; %bb.0: ; %bb592; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24593; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0594; GFX11-NEXT: s_mov_b32 s4, 0595; GFX11-NEXT: .LBB9_1: ; %bb1596; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1597; GFX11-NEXT: s_waitcnt lgkmcnt(0)598; GFX11-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc599; GFX11-NEXT: s_waitcnt vmcnt(0)600; GFX11-NEXT: flat_load_b32 v1, v[1:2]601; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)602; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0603; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4604; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)605; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4606; GFX11-NEXT: s_cbranch_execnz .LBB9_1607; GFX11-NEXT: ; %bb.2: ; %bb2608; GFX11-NEXT: s_endpgm609;610; GFX12-LABEL: raw_ptr_atomic_buffer_load_ptr:611; GFX12: ; %bb.0: ; %bb612; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1613; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24614; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0615; GFX12-NEXT: s_wait_xcnt 0x0616; GFX12-NEXT: s_mov_b32 s4, 0617; GFX12-NEXT: .LBB9_1: ; %bb1618; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1619; GFX12-NEXT: s_wait_kmcnt 0x0620; GFX12-NEXT: buffer_load_b64 v[2:3], off, s[0:3], null offset:4 th:TH_LOAD_NT621; GFX12-NEXT: s_wait_loadcnt 0x0622; GFX12-NEXT: flat_load_b32 v1, v[2:3]623; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0624; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0625; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4626; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)627; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4628; GFX12-NEXT: s_cbranch_execnz .LBB9_1629; GFX12-NEXT: ; %bb.2: ; %bb2630; GFX12-NEXT: s_endpgm631bb:632 %id = tail call i32 @llvm.amdgcn.workitem.id.x()633 br label %bb1634bb1:635 %load = call ptr @llvm.amdgcn.raw.ptr.atomic.buffer.load.ptr(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)636 %elem = load i32, ptr %load637 %cmp = icmp eq i32 %elem, %id638 br i1 %cmp, label %bb1, label %bb2639bb2:640 ret void641}642 643; Function Attrs: nounwind readonly644declare i32 @llvm.amdgcn.raw.ptr.atom.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg)645declare i64 @llvm.amdgcn.raw.ptr.atom.buffer.load.i64(ptr addrspace(8), i32, i32, i32 immarg)646declare <2 x i16> @llvm.amdgcn.raw.ptr.atom.buffer.load.v2i16(ptr addrspace(8), i32, i32, i32 immarg)647declare <4 x i16> @llvm.amdgcn.raw.ptr.atom.buffer.load.v4i16(ptr addrspace(8), i32, i32, i32 immarg)648declare <4 x i32> @llvm.amdgcn.raw.ptr.atom.buffer.load.v4i32(ptr addrspace(8), i32, i32, i32 immarg)649declare ptr @llvm.amdgcn.raw.ptr.atom.buffer.load.ptr(ptr addrspace(8), i32, i32, i32 immarg)650declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg)651declare i32 @llvm.amdgcn.workitem.id.x()652