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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-GISEL %s4; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-SDAG %s5; RUN: not llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-GISEL %s6 7; FIXME: Not a great error8; ERR-SDAG: LLVM ERROR: Do not know how to expand this operator's operand!9; ERR-GISEL: LLVM ERROR: cannot select: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.raw.ptr.buffer.load.lds),10 11declare void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) nocapture, i32 %size, i32 %voffset, i32 %soffset, i32 %offset, i32 %aux)12 13;---------------------------------------------------------------------y14; dwordx315;---------------------------------------------------------------------16 17define amdgpu_ps float @buffer_load_lds_dwordx3(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {18; GFX950-LABEL: buffer_load_lds_dwordx3:19; GFX950: ; %bb.0: ; %main_body20; GFX950-NEXT: s_mov_b32 m0, s421; GFX950-NEXT: s_nop 022; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 lds23; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:4 sc0 lds24; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:8 nt lds25; GFX950-NEXT: v_mov_b32_e32 v0, s426; GFX950-NEXT: s_waitcnt vmcnt(0)27; GFX950-NEXT: ds_read_b32 v0, v028; GFX950-NEXT: s_waitcnt lgkmcnt(0)29; GFX950-NEXT: ; return to shader part epilog30main_body:31 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 0, i32 0)32 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 4, i32 1)33 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 8, i32 2)34 %res = load float, ptr addrspace(3) %lds35 ret float %res36}37 38define amdgpu_ps void @buffer_load_lds_dwordx3_imm_voffset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {39; GFX950-LABEL: buffer_load_lds_dwordx3_imm_voffset:40; GFX950: ; %bb.0:41; GFX950-NEXT: v_mov_b32_e32 v0, 0x80042; GFX950-NEXT: s_mov_b32 m0, s443; GFX950-NEXT: s_nop 044; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 offen lds45; GFX950-NEXT: s_endpgm46 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 2048, i32 0, i32 0, i32 0)47 ret void48}49 50define amdgpu_ps void @buffer_load_lds_dwordx3_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset) {51; GFX950-LABEL: buffer_load_lds_dwordx3_v_offset:52; GFX950: ; %bb.0:53; GFX950-NEXT: s_mov_b32 m0, s454; GFX950-NEXT: s_nop 055; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 offen lds56; GFX950-NEXT: s_endpgm57 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 0, i32 0, i32 0)58 ret void59}60 61define amdgpu_ps void @buffer_load_lds_dwordx3_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 inreg %soffset) {62; GFX950-LABEL: buffer_load_lds_dwordx3_s_offset:63; GFX950: ; %bb.0:64; GFX950-NEXT: s_mov_b32 m0, s465; GFX950-NEXT: s_nop 066; GFX950-NEXT: buffer_load_dwordx3 off, s[0:3], s5 lds67; GFX950-NEXT: s_endpgm68 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 0, i32 %soffset, i32 0, i32 0)69 ret void70}71 72define amdgpu_ps void @buffer_load_lds_dwordx3_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) {73; GFX950-LABEL: buffer_load_lds_dwordx3_vs_offset:74; GFX950: ; %bb.0:75; GFX950-NEXT: s_mov_b32 m0, s476; GFX950-NEXT: s_nop 077; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], s5 offen lds78; GFX950-NEXT: s_endpgm79 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 %soffset, i32 0, i32 0)80 ret void81}82 83define amdgpu_ps void @buffer_load_lds_dwordx3_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) {84; GFX950-LABEL: buffer_load_lds_dwordx3_vs_imm_offset:85; GFX950: ; %bb.0:86; GFX950-NEXT: s_mov_b32 m0, s487; GFX950-NEXT: s_nop 088; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], s5 offen offset:2048 lds89; GFX950-NEXT: s_endpgm90 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 %soffset, i32 2048, i32 0)91 ret void92}93 94;---------------------------------------------------------------------y95; dwordx496;---------------------------------------------------------------------97 98define amdgpu_ps float @buffer_load_lds_dwordx4(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {99; GFX950-LABEL: buffer_load_lds_dwordx4:100; GFX950: ; %bb.0: ; %main_body101; GFX950-NEXT: s_mov_b32 m0, s4102; GFX950-NEXT: s_nop 0103; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 lds104; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:4 sc0 lds105; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:8 nt lds106; GFX950-NEXT: v_mov_b32_e32 v0, s4107; GFX950-NEXT: s_waitcnt vmcnt(0)108; GFX950-NEXT: ds_read_b32 v0, v0109; GFX950-NEXT: s_waitcnt lgkmcnt(0)110; GFX950-NEXT: ; return to shader part epilog111main_body:112 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 0, i32 0)113 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 4, i32 1)114 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 8, i32 2)115 %res = load float, ptr addrspace(3) %lds116 ret float %res117}118 119define amdgpu_ps void @buffer_load_lds_dwordx4_imm_voffset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {120; GFX950-LABEL: buffer_load_lds_dwordx4_imm_voffset:121; GFX950: ; %bb.0:122; GFX950-NEXT: v_mov_b32_e32 v0, 0x800123; GFX950-NEXT: s_mov_b32 m0, s4124; GFX950-NEXT: s_nop 0125; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 offen lds126; GFX950-NEXT: s_endpgm127 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 2048, i32 0, i32 0, i32 0)128 ret void129}130 131define amdgpu_ps void @buffer_load_lds_dwordx4_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset) {132; GFX950-LABEL: buffer_load_lds_dwordx4_v_offset:133; GFX950: ; %bb.0:134; GFX950-NEXT: s_mov_b32 m0, s4135; GFX950-NEXT: s_nop 0136; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 offen lds137; GFX950-NEXT: s_endpgm138 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 0, i32 0, i32 0)139 ret void140}141 142define amdgpu_ps void @buffer_load_lds_dwordx4_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 inreg %soffset) {143; GFX950-LABEL: buffer_load_lds_dwordx4_s_offset:144; GFX950: ; %bb.0:145; GFX950-NEXT: s_mov_b32 m0, s4146; GFX950-NEXT: s_nop 0147; GFX950-NEXT: buffer_load_dwordx4 off, s[0:3], s5 lds148; GFX950-NEXT: s_endpgm149 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 0, i32 %soffset, i32 0, i32 0)150 ret void151}152 153define amdgpu_ps void @buffer_load_lds_dwordx4_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) {154; GFX950-LABEL: buffer_load_lds_dwordx4_vs_offset:155; GFX950: ; %bb.0:156; GFX950-NEXT: s_mov_b32 m0, s4157; GFX950-NEXT: s_nop 0158; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], s5 offen lds159; GFX950-NEXT: s_endpgm160 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 %soffset, i32 0, i32 0)161 ret void162}163 164define amdgpu_ps void @buffer_load_lds_dwordx4_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) {165; GFX950-LABEL: buffer_load_lds_dwordx4_vs_imm_offset:166; GFX950: ; %bb.0:167; GFX950-NEXT: s_mov_b32 m0, s4168; GFX950-NEXT: s_nop 0169; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], s5 offen offset:2048 lds170; GFX950-NEXT: s_endpgm171 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 %soffset, i32 2048, i32 0)172 ret void173}174;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:175; GFX950-GISEL: {{.*}}176; GFX950-SDAG: {{.*}}177