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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck --check-prefix=GFX7 %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck --check-prefix=GFX8 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck --check-prefix=GFX9 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck --check-prefix=GFX10 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck --check-prefix=GFX11 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -amdgpu-enable-delay-alu=0 < %s | FileCheck --check-prefix=GFX12 %s8 9define amdgpu_ps void @buffer_store_bf16(ptr addrspace(8) inreg %rsrc, bfloat %data, i32 %offset) {10; GFX7-LABEL: buffer_store_bf16:11; GFX7: ; %bb.0:12; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v013; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v014; GFX7-NEXT: buffer_store_short v0, v1, s[0:3], 0 offen15; GFX7-NEXT: s_endpgm16;17; GFX8-LABEL: buffer_store_bf16:18; GFX8: ; %bb.0:19; GFX8-NEXT: buffer_store_short v0, v1, s[0:3], 0 offen20; GFX8-NEXT: s_endpgm21;22; GFX9-LABEL: buffer_store_bf16:23; GFX9: ; %bb.0:24; GFX9-NEXT: buffer_store_short v0, v1, s[0:3], 0 offen25; GFX9-NEXT: s_endpgm26;27; GFX10-LABEL: buffer_store_bf16:28; GFX10: ; %bb.0:29; GFX10-NEXT: buffer_store_short v0, v1, s[0:3], 0 offen30; GFX10-NEXT: s_endpgm31;32; GFX11-LABEL: buffer_store_bf16:33; GFX11: ; %bb.0:34; GFX11-NEXT: buffer_store_b16 v0, v1, s[0:3], 0 offen35; GFX11-NEXT: s_endpgm36;37; GFX12-LABEL: buffer_store_bf16:38; GFX12: ; %bb.0:39; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 140; GFX12-NEXT: buffer_store_b16 v0, v1, s[0:3], null offen41; GFX12-NEXT: s_endpgm42 call void @llvm.amdgcn.raw.ptr.buffer.store.bf16(bfloat %data, ptr addrspace(8) %rsrc, i32 %offset, i32 0, i32 0)43 ret void44}45 46define amdgpu_ps void @buffer_store_v2bf16(ptr addrspace(8) inreg %rsrc, <2 x bfloat> %data, i32 %offset) {47; GFX7-LABEL: buffer_store_v2bf16:48; GFX7: ; %bb.0:49; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v150; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v151; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v052; GFX7-NEXT: v_alignbit_b32 v0, v1, v0, 1653; GFX7-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen54; GFX7-NEXT: s_endpgm55;56; GFX8-LABEL: buffer_store_v2bf16:57; GFX8: ; %bb.0:58; GFX8-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen59; GFX8-NEXT: s_endpgm60;61; GFX9-LABEL: buffer_store_v2bf16:62; GFX9: ; %bb.0:63; GFX9-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen64; GFX9-NEXT: s_endpgm65;66; GFX10-LABEL: buffer_store_v2bf16:67; GFX10: ; %bb.0:68; GFX10-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen69; GFX10-NEXT: s_endpgm70;71; GFX11-LABEL: buffer_store_v2bf16:72; GFX11: ; %bb.0:73; GFX11-NEXT: buffer_store_b32 v0, v1, s[0:3], 0 offen74; GFX11-NEXT: s_endpgm75;76; GFX12-LABEL: buffer_store_v2bf16:77; GFX12: ; %bb.0:78; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 179; GFX12-NEXT: buffer_store_b32 v0, v1, s[0:3], null offen80; GFX12-NEXT: s_endpgm81 call void @llvm.amdgcn.raw.ptr.buffer.store.v2bf16(<2 x bfloat> %data, ptr addrspace(8) %rsrc, i32 %offset, i32 0, i32 0)82 ret void83}84 85define amdgpu_ps void @buffer_store_v4bf16(ptr addrspace(8) inreg %rsrc, <4 x bfloat> %data, i32 %offset) #0 {86; GFX7-LABEL: buffer_store_v4bf16:87; GFX7: ; %bb.0:88; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v389; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v190; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v391; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v292; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v193; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v094; GFX7-NEXT: v_alignbit_b32 v2, v3, v2, 1695; GFX7-NEXT: v_alignbit_b32 v1, v1, v0, 1696; GFX7-NEXT: buffer_store_dwordx2 v[1:2], v4, s[0:3], 0 offen97; GFX7-NEXT: s_endpgm98;99; GFX8-LABEL: buffer_store_v4bf16:100; GFX8: ; %bb.0:101; GFX8-NEXT: buffer_store_dwordx2 v[0:1], v2, s[0:3], 0 offen102; GFX8-NEXT: s_endpgm103;104; GFX9-LABEL: buffer_store_v4bf16:105; GFX9: ; %bb.0:106; GFX9-NEXT: buffer_store_dwordx2 v[0:1], v2, s[0:3], 0 offen107; GFX9-NEXT: s_endpgm108;109; GFX10-LABEL: buffer_store_v4bf16:110; GFX10: ; %bb.0:111; GFX10-NEXT: buffer_store_dwordx2 v[0:1], v2, s[0:3], 0 offen112; GFX10-NEXT: s_endpgm113;114; GFX11-LABEL: buffer_store_v4bf16:115; GFX11: ; %bb.0:116; GFX11-NEXT: buffer_store_b64 v[0:1], v2, s[0:3], 0 offen117; GFX11-NEXT: s_endpgm118;119; GFX12-LABEL: buffer_store_v4bf16:120; GFX12: ; %bb.0:121; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1122; GFX12-NEXT: buffer_store_b64 v[0:1], v2, s[0:3], null offen123; GFX12-NEXT: s_endpgm124 call void @llvm.amdgcn.raw.ptr.buffer.store.v4bf16(<4 x bfloat> %data, ptr addrspace(8) %rsrc, i32 %offset, i32 0, i32 0)125 ret void126}127 128; FIXME129; define amdgpu_ps void @buffer_store_v6bf16(ptr addrspace(8) inreg %rsrc, <6 x bfloat> %data, i32 %offset) #0 {130; call void @llvm.amdgcn.raw.ptr.buffer.store.v6bf16(<6 x bfloat> %data, ptr addrspace(8) %rsrc, i32 %offset, i32 0, i32 0)131; ret void132; }133 134define amdgpu_ps void @buffer_store_v8bf16(ptr addrspace(8) inreg %rsrc, <8 x bfloat> %data, i32 %offset) #0 {135; GFX7-LABEL: buffer_store_v8bf16:136; GFX7: ; %bb.0:137; GFX7-NEXT: v_mul_f32_e32 v7, 1.0, v7138; GFX7-NEXT: v_mul_f32_e32 v5, 1.0, v5139; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3140; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1141; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v7142; GFX7-NEXT: v_mul_f32_e32 v6, 1.0, v6143; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v5144; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v4145; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v3146; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2147; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v1148; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0149; GFX7-NEXT: v_alignbit_b32 v6, v7, v6, 16150; GFX7-NEXT: v_alignbit_b32 v5, v5, v4, 16151; GFX7-NEXT: v_alignbit_b32 v4, v3, v2, 16152; GFX7-NEXT: v_alignbit_b32 v3, v1, v0, 16153; GFX7-NEXT: buffer_store_dwordx4 v[3:6], v8, s[0:3], 0 offen154; GFX7-NEXT: s_endpgm155;156; GFX8-LABEL: buffer_store_v8bf16:157; GFX8: ; %bb.0:158; GFX8-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen159; GFX8-NEXT: s_endpgm160;161; GFX9-LABEL: buffer_store_v8bf16:162; GFX9: ; %bb.0:163; GFX9-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen164; GFX9-NEXT: s_endpgm165;166; GFX10-LABEL: buffer_store_v8bf16:167; GFX10: ; %bb.0:168; GFX10-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen169; GFX10-NEXT: s_endpgm170;171; GFX11-LABEL: buffer_store_v8bf16:172; GFX11: ; %bb.0:173; GFX11-NEXT: buffer_store_b128 v[0:3], v4, s[0:3], 0 offen174; GFX11-NEXT: s_endpgm175;176; GFX12-LABEL: buffer_store_v8bf16:177; GFX12: ; %bb.0:178; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1179; GFX12-NEXT: buffer_store_b128 v[0:3], v4, s[0:3], null offen180; GFX12-NEXT: s_endpgm181 call void @llvm.amdgcn.raw.ptr.buffer.store.v8bf16(<8 x bfloat> %data, ptr addrspace(8) %rsrc, i32 %offset, i32 0, i32 0)182 ret void183}184