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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefix=SDAG-TRUE16 %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck -check-prefix=SDAG-FAKE16 %s4; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefix=GI-TRUE16 %s5; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck -check-prefix=GI-FAKE16 %s6 7; FIXME: GlobalISel does not work with bf168 9declare bfloat @llvm.amdgcn.rcp.bf16(bfloat) #010 11define amdgpu_kernel void @rcp_bf16(ptr addrspace(1) %out, bfloat %src) #1 {12; SDAG-TRUE16-LABEL: rcp_bf16:13; SDAG-TRUE16: ; %bb.0:14; SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 115; SDAG-TRUE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x016; SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 017; SDAG-TRUE16-NEXT: s_wait_kmcnt 0x018; SDAG-TRUE16-NEXT: v_rcp_bf16_e32 v0.l, s219; SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]20; SDAG-TRUE16-NEXT: s_endpgm21;22; SDAG-FAKE16-LABEL: rcp_bf16:23; SDAG-FAKE16: ; %bb.0:24; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 125; SDAG-FAKE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x026; SDAG-FAKE16-NEXT: v_mov_b32_e32 v1, 027; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x028; SDAG-FAKE16-NEXT: v_rcp_bf16_e32 v0, s229; SDAG-FAKE16-NEXT: global_store_b16 v1, v0, s[0:1]30; SDAG-FAKE16-NEXT: s_endpgm31 %rcp = call bfloat @llvm.amdgcn.rcp.bf16(bfloat %src) #032 store bfloat %rcp, ptr addrspace(1) %out, align 233 ret void34}35 36define amdgpu_kernel void @rcp_bf16_constant_4(ptr addrspace(1) %out) #1 {37; SDAG-TRUE16-LABEL: rcp_bf16_constant_4:38; SDAG-TRUE16: ; %bb.0:39; SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 140; SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x041; SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 042; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x3e8043; SDAG-TRUE16-NEXT: s_wait_kmcnt 0x044; SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]45; SDAG-TRUE16-NEXT: s_endpgm46;47; SDAG-FAKE16-LABEL: rcp_bf16_constant_4:48; SDAG-FAKE16: ; %bb.0:49; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 150; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x051; SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3e8052; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x053; SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]54; SDAG-FAKE16-NEXT: s_endpgm55 %rcp = call bfloat @llvm.amdgcn.rcp.bf16(bfloat 4.0) #056 store bfloat %rcp, ptr addrspace(1) %out, align 257 ret void58}59 60define amdgpu_kernel void @rcp_bf16_constant_100(ptr addrspace(1) %out) #1 {61; SDAG-TRUE16-LABEL: rcp_bf16_constant_100:62; SDAG-TRUE16: ; %bb.0:63; SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 164; SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x065; SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 066; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x3c2467; SDAG-TRUE16-NEXT: s_wait_kmcnt 0x068; SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]69; SDAG-TRUE16-NEXT: s_endpgm70;71; SDAG-FAKE16-LABEL: rcp_bf16_constant_100:72; SDAG-FAKE16: ; %bb.0:73; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 174; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x075; SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3c2476; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x077; SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]78; SDAG-FAKE16-NEXT: s_endpgm79 %rcp = call bfloat @llvm.amdgcn.rcp.bf16(bfloat 100.0) #080 store bfloat %rcp, ptr addrspace(1) %out, align 281 ret void82}83 84define amdgpu_kernel void @rcp_undef_bf16(ptr addrspace(1) %out) #1 {85; SDAG-TRUE16-LABEL: rcp_undef_bf16:86; SDAG-TRUE16: ; %bb.0:87; SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 188; SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x089; SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 090; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x7fc091; SDAG-TRUE16-NEXT: s_wait_kmcnt 0x092; SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]93; SDAG-TRUE16-NEXT: s_endpgm94;95; SDAG-FAKE16-LABEL: rcp_undef_bf16:96; SDAG-FAKE16: ; %bb.0:97; SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 198; SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x099; SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc0100; SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0101; SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]102; SDAG-FAKE16-NEXT: s_endpgm103 %rcp = call bfloat @llvm.amdgcn.rcp.bf16(bfloat undef)104 store bfloat %rcp, ptr addrspace(1) %out, align 2105 ret void106}107 108attributes #0 = { nounwind readnone }109attributes #1 = { nounwind }110