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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=FUNC %s2 3declare float @llvm.amdgcn.rcp.f32(float) #04declare double @llvm.amdgcn.rcp.f64(double) #05 6declare double @llvm.amdgcn.sqrt.f64(double) #07declare float @llvm.amdgcn.sqrt.f32(float) #08declare double @llvm.sqrt.f64(double) #09declare float @llvm.sqrt.f32(float) #010 11; FUNC-LABEL: {{^}}rcp_undef_f32:12; SI: v_mov_b32_e32 [[NAN:v[0-9]+]], 0x7fc0000013; SI-NOT: [[NAN]]14; SI: buffer_store_dword [[NAN]]15define amdgpu_kernel void @rcp_undef_f32(ptr addrspace(1) %out) #1 {16 %rcp = call float @llvm.amdgcn.rcp.f32(float poison)17 store float %rcp, ptr addrspace(1) %out, align 418 ret void19}20 21; FUNC-LABEL: {{^}}rcp_2_f32:22; SI-NOT: v_rcp_f3223; SI: v_mov_b32_e32 v{{[0-9]+}}, 0.524define amdgpu_kernel void @rcp_2_f32(ptr addrspace(1) %out) #1 {25 %rcp = call float @llvm.amdgcn.rcp.f32(float 2.0)26 store float %rcp, ptr addrspace(1) %out, align 427 ret void28}29 30; FUNC-LABEL: {{^}}rcp_10_f32:31; SI-NOT: v_rcp_f3232; SI: v_mov_b32_e32 v{{[0-9]+}}, 0x3dcccccd33define amdgpu_kernel void @rcp_10_f32(ptr addrspace(1) %out) #1 {34 %rcp = call float @llvm.amdgcn.rcp.f32(float 10.0)35 store float %rcp, ptr addrspace(1) %out, align 436 ret void37}38 39; FUNC-LABEL: {{^}}safe_no_fp32_denormals_rcp_f32:40; SI: v_rcp_f32_e32 [[RESULT:v[0-9]+]], s{{[0-9]+}}41; SI-NOT: [[RESULT]]42; SI: buffer_store_dword [[RESULT]]43define amdgpu_kernel void @safe_no_fp32_denormals_rcp_f32(ptr addrspace(1) %out, float %src) #1 {44 %rcp = fdiv float 1.0, %src, !fpmath !045 store float %rcp, ptr addrspace(1) %out, align 446 ret void47}48 49; FUNC-LABEL: {{^}}safe_f32_denormals_rcp_pat_f32:50; SI: v_rcp_f32_e32 [[RESULT:v[0-9]+]], s{{[0-9]+}}51; SI-NOT: [[RESULT]]52; SI: buffer_store_dword [[RESULT]]53define amdgpu_kernel void @safe_f32_denormals_rcp_pat_f32(ptr addrspace(1) %out, float %src) #4 {54 %rcp = fdiv afn float 1.0, %src, !fpmath !055 store float %rcp, ptr addrspace(1) %out, align 456 ret void57}58 59; FUNC-LABEL: {{^}}unsafe_f32_denormals_rcp_pat_f32:60; SI: v_div_scale_f3261define amdgpu_kernel void @unsafe_f32_denormals_rcp_pat_f32(ptr addrspace(1) %out, float %src) #3 {62 %rcp = fdiv float 1.0, %src63 store float %rcp, ptr addrspace(1) %out, align 464 ret void65}66 67; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_f32:68; SI: v_mul_f3269; SI: v_rsq_f3270; SI: v_mul_f3271; SI: v_fma_f3272; SI: v_fma_f3273; SI: v_fma_f3274; SI: v_fma_f3275; SI: v_fma_f3276; SI: v_rcp_f3277define amdgpu_kernel void @safe_rsq_rcp_pat_f32(ptr addrspace(1) %out, float %src) #1 {78 %sqrt = call contract float @llvm.sqrt.f32(float %src)79 %rcp = call contract float @llvm.amdgcn.rcp.f32(float %sqrt)80 store float %rcp, ptr addrspace(1) %out, align 481 ret void82}83 84; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_amdgcn_sqrt_f32:85; SI: v_sqrt_f32_e3286; SI: v_rcp_f32_e3287define amdgpu_kernel void @safe_rsq_rcp_pat_amdgcn_sqrt_f32(ptr addrspace(1) %out, float %src) #1 {88 %sqrt = call contract float @llvm.amdgcn.sqrt.f32(float %src)89 %rcp = call contract float @llvm.amdgcn.rcp.f32(float %sqrt)90 store float %rcp, ptr addrspace(1) %out, align 491 ret void92}93 94; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_amdgcn_sqrt_f32_nocontract:95; SI: v_sqrt_f32_e3296; SI: v_rcp_f32_e3297define amdgpu_kernel void @safe_rsq_rcp_pat_amdgcn_sqrt_f32_nocontract(ptr addrspace(1) %out, float %src) #1 {98 %sqrt = call float @llvm.amdgcn.sqrt.f32(float %src)99 %rcp = call contract float @llvm.amdgcn.rcp.f32(float %sqrt)100 store float %rcp, ptr addrspace(1) %out, align 4101 ret void102}103 104; FUNC-LABEL: {{^}}unsafe_rsq_rcp_pat_f32:105; SI: v_sqrt_f32_e32106; SI: v_rcp_f32_e32107define amdgpu_kernel void @unsafe_rsq_rcp_pat_f32(ptr addrspace(1) %out, float %src) #2 {108 %sqrt = call afn float @llvm.sqrt.f32(float %src)109 %rcp = call afn float @llvm.amdgcn.rcp.f32(float %sqrt)110 store float %rcp, ptr addrspace(1) %out, align 4111 ret void112}113 114; FUNC-LABEL: {{^}}rcp_f64:115; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}116; SI-NOT: [[RESULT]]117; SI: buffer_store_dwordx2 [[RESULT]]118define amdgpu_kernel void @rcp_f64(ptr addrspace(1) %out, double %src) #1 {119 %rcp = call double @llvm.amdgcn.rcp.f64(double %src)120 store double %rcp, ptr addrspace(1) %out, align 8121 ret void122}123 124; FUNC-LABEL: {{^}}unsafe_rcp_f64:125; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}126; SI-NOT: [[RESULT]]127; SI: buffer_store_dwordx2 [[RESULT]]128define amdgpu_kernel void @unsafe_rcp_f64(ptr addrspace(1) %out, double %src) #2 {129 %rcp = call double @llvm.amdgcn.rcp.f64(double %src)130 store double %rcp, ptr addrspace(1) %out, align 8131 ret void132}133 134; FUNC-LABEL: {{^}}rcp_pat_f64:135; SI: v_div_scale_f64136define amdgpu_kernel void @rcp_pat_f64(ptr addrspace(1) %out, double %src) #1 {137 %rcp = fdiv double 1.0, %src138 store double %rcp, ptr addrspace(1) %out, align 8139 ret void140}141 142; FUNC-LABEL: {{^}}unsafe_rcp_pat_f64:143; SI: v_rcp_f64144; SI: v_fma_f64145; SI: v_fma_f64146; SI: v_fma_f64147; SI: v_fma_f64148; SI: v_fma_f64149; SI: v_fma_f64150define amdgpu_kernel void @unsafe_rcp_pat_f64(ptr addrspace(1) %out, double %src) #2 {151 %rcp = fdiv afn double 1.0, %src152 store double %rcp, ptr addrspace(1) %out, align 8153 ret void154}155 156; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_f64:157; SI-NOT: v_rsq_f64_e32158; SI: v_rsq_f64159; SI: v_mul_f64160; SI: v_mul_f64161; SI: v_fma_f64162; SI: v_fma_f64163; SI: v_fma_f64164; SI: v_fma_f64165; SI: v_fma_f64166; SI: v_fma_f64167; SI: v_rcp_f64168define amdgpu_kernel void @safe_rsq_rcp_pat_f64(ptr addrspace(1) %out, double %src) #1 {169 %sqrt = call double @llvm.sqrt.f64(double %src)170 %rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)171 store double %rcp, ptr addrspace(1) %out, align 8172 ret void173}174 175; FUNC-LABEL: {{^}}safe_amdgcn_sqrt_rsq_rcp_pat_f64:176; SI-NOT: v_rsq_f64_e32177; SI: v_sqrt_f64178; SI: v_rcp_f64179define amdgpu_kernel void @safe_amdgcn_sqrt_rsq_rcp_pat_f64(ptr addrspace(1) %out, double %src) #1 {180 %sqrt = call double @llvm.amdgcn.sqrt.f64(double %src)181 %rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)182 store double %rcp, ptr addrspace(1) %out, align 8183 ret void184}185 186; FUNC-LABEL: {{^}}unsafe_rsq_rcp_pat_f64:187; SI: v_rsq_f64188; SI: v_mul_f64189; SI: v_mul_f64190; SI: v_fma_f64191; SI: v_fma_f64192; SI: v_fma_f64193; SI: v_fma_f64194; SI: v_fma_f64195; SI: v_fma_f64196; SI: v_rcp_f64197; SI: buffer_store_dwordx2198define amdgpu_kernel void @unsafe_rsq_rcp_pat_f64(ptr addrspace(1) %out, double %src) #2 {199 %sqrt = call double @llvm.sqrt.f64(double %src)200 %rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)201 store double %rcp, ptr addrspace(1) %out, align 8202 ret void203}204 205; FUNC-LABEL: {{^}}unsafe_amdgcn_sqrt_rsq_rcp_pat_f64:206; SI: v_sqrt_f64_e32 [[SQRT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}207; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SQRT]]208; SI: buffer_store_dwordx2 [[RESULT]]209define amdgpu_kernel void @unsafe_amdgcn_sqrt_rsq_rcp_pat_f64(ptr addrspace(1) %out, double %src) #2 {210 %sqrt = call double @llvm.amdgcn.sqrt.f64(double %src)211 %rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)212 store double %rcp, ptr addrspace(1) %out, align 8213 ret void214}215 216attributes #0 = { nounwind readnone }217attributes #1 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }218attributes #2 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }219attributes #3 = { nounwind "denormal-fp-math-f32"="ieee,ieee" }220attributes #4 = { nounwind "denormal-fp-math-f32"="ieee,ieee" }221 222!0 = !{float 2.500000e+00}223