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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji < %s | FileCheck --check-prefix=CHECK-SDAG -enable-var-scope %s3; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -global-isel -global-isel-abort=2 < %s | FileCheck --check-prefix=CHECK-GISEL -enable-var-scope %s4 5declare i32 @llvm.amdgcn.readlane.i32(i32, i32) #06declare i64 @llvm.amdgcn.readlane.i64(i64, i32) #07declare double @llvm.amdgcn.readlane.f64(double, i32) #08 9define amdgpu_kernel void @test_readlane_sreg_sreg_i32(i32 %src0, i32 %src1) #1 {10; CHECK-SDAG-LABEL: test_readlane_sreg_sreg_i32:11; CHECK-SDAG: ; %bb.0:12; CHECK-SDAG-NEXT: s_load_dword s0, s[8:9], 0x013; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)14; CHECK-SDAG-NEXT: ;;#ASMSTART15; CHECK-SDAG-NEXT: ; use s016; CHECK-SDAG-NEXT: ;;#ASMEND17; CHECK-SDAG-NEXT: s_endpgm18;19; CHECK-GISEL-LABEL: test_readlane_sreg_sreg_i32:20; CHECK-GISEL: ; %bb.0:21; CHECK-GISEL-NEXT: s_load_dword s0, s[8:9], 0x022; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)23; CHECK-GISEL-NEXT: ;;#ASMSTART24; CHECK-GISEL-NEXT: ; use s025; CHECK-GISEL-NEXT: ;;#ASMEND26; CHECK-GISEL-NEXT: s_endpgm27 %readlane = call i32 @llvm.amdgcn.readlane.i32(i32 %src0, i32 %src1)28 call void asm sideeffect "; use $0", "s"(i32 %readlane)29 ret void30}31 32define amdgpu_kernel void @test_readlane_sreg_sreg_i64(i64 %src0, i32 %src1) #1 {33; CHECK-SDAG-LABEL: test_readlane_sreg_sreg_i64:34; CHECK-SDAG: ; %bb.0:35; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x036; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)37; CHECK-SDAG-NEXT: ;;#ASMSTART38; CHECK-SDAG-NEXT: ; use s[0:1]39; CHECK-SDAG-NEXT: ;;#ASMEND40; CHECK-SDAG-NEXT: s_endpgm41;42; CHECK-GISEL-LABEL: test_readlane_sreg_sreg_i64:43; CHECK-GISEL: ; %bb.0:44; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x045; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)46; CHECK-GISEL-NEXT: ;;#ASMSTART47; CHECK-GISEL-NEXT: ; use s[0:1]48; CHECK-GISEL-NEXT: ;;#ASMEND49; CHECK-GISEL-NEXT: s_endpgm50 %readlane = call i64 @llvm.amdgcn.readlane.i64(i64 %src0, i32 %src1)51 call void asm sideeffect "; use $0", "s"(i64 %readlane)52 ret void53}54 55define amdgpu_kernel void @test_readlane_sreg_sreg_f64(double %src0, i32 %src1) #1 {56; CHECK-SDAG-LABEL: test_readlane_sreg_sreg_f64:57; CHECK-SDAG: ; %bb.0:58; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x059; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)60; CHECK-SDAG-NEXT: ;;#ASMSTART61; CHECK-SDAG-NEXT: ; use s[0:1]62; CHECK-SDAG-NEXT: ;;#ASMEND63; CHECK-SDAG-NEXT: s_endpgm64;65; CHECK-GISEL-LABEL: test_readlane_sreg_sreg_f64:66; CHECK-GISEL: ; %bb.0:67; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x068; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)69; CHECK-GISEL-NEXT: ;;#ASMSTART70; CHECK-GISEL-NEXT: ; use s[0:1]71; CHECK-GISEL-NEXT: ;;#ASMEND72; CHECK-GISEL-NEXT: s_endpgm73 %readlane = call double @llvm.amdgcn.readlane.f64(double %src0, i32 %src1)74 call void asm sideeffect "; use $0", "s"(double %readlane)75 ret void76}77 78define amdgpu_kernel void @test_readlane_vreg_sreg_i32(i32 %src0, i32 %src1) #1 {79; CHECK-SDAG-LABEL: test_readlane_vreg_sreg_i32:80; CHECK-SDAG: ; %bb.0:81; CHECK-SDAG-NEXT: s_load_dword s0, s[8:9], 0x482; CHECK-SDAG-NEXT: ;;#ASMSTART83; CHECK-SDAG-NEXT: ; def v084; CHECK-SDAG-NEXT: ;;#ASMEND85; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)86; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s087; CHECK-SDAG-NEXT: ;;#ASMSTART88; CHECK-SDAG-NEXT: ; use s089; CHECK-SDAG-NEXT: ;;#ASMEND90; CHECK-SDAG-NEXT: s_endpgm91;92; CHECK-GISEL-LABEL: test_readlane_vreg_sreg_i32:93; CHECK-GISEL: ; %bb.0:94; CHECK-GISEL-NEXT: s_load_dword s0, s[8:9], 0x495; CHECK-GISEL-NEXT: ;;#ASMSTART96; CHECK-GISEL-NEXT: ; def v097; CHECK-GISEL-NEXT: ;;#ASMEND98; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)99; CHECK-GISEL-NEXT: v_readlane_b32 s0, v0, s0100; CHECK-GISEL-NEXT: ;;#ASMSTART101; CHECK-GISEL-NEXT: ; use s0102; CHECK-GISEL-NEXT: ;;#ASMEND103; CHECK-GISEL-NEXT: s_endpgm104 %vgpr = call i32 asm sideeffect "; def $0", "=v"()105 %readlane = call i32 @llvm.amdgcn.readlane.i32(i32 %vgpr, i32 %src1)106 call void asm sideeffect "; use $0", "s"(i32 %readlane)107 ret void108}109 110define amdgpu_kernel void @test_readlane_vreg_sreg_i64(i64 %src0, i32 %src1) #1 {111; CHECK-SDAG-LABEL: test_readlane_vreg_sreg_i64:112; CHECK-SDAG: ; %bb.0:113; CHECK-SDAG-NEXT: s_load_dword s0, s[8:9], 0x8114; CHECK-SDAG-NEXT: ;;#ASMSTART115; CHECK-SDAG-NEXT: ; def v[0:1]116; CHECK-SDAG-NEXT: ;;#ASMEND117; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)118; CHECK-SDAG-NEXT: v_readlane_b32 s1, v1, s0119; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s0120; CHECK-SDAG-NEXT: ;;#ASMSTART121; CHECK-SDAG-NEXT: ; use s[0:1]122; CHECK-SDAG-NEXT: ;;#ASMEND123; CHECK-SDAG-NEXT: s_endpgm124;125; CHECK-GISEL-LABEL: test_readlane_vreg_sreg_i64:126; CHECK-GISEL: ; %bb.0:127; CHECK-GISEL-NEXT: s_load_dword s1, s[8:9], 0x8128; CHECK-GISEL-NEXT: ;;#ASMSTART129; CHECK-GISEL-NEXT: ; def v[0:1]130; CHECK-GISEL-NEXT: ;;#ASMEND131; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)132; CHECK-GISEL-NEXT: v_readlane_b32 s0, v0, s1133; CHECK-GISEL-NEXT: v_readlane_b32 s1, v1, s1134; CHECK-GISEL-NEXT: ;;#ASMSTART135; CHECK-GISEL-NEXT: ; use s[0:1]136; CHECK-GISEL-NEXT: ;;#ASMEND137; CHECK-GISEL-NEXT: s_endpgm138 %vgpr = call i64 asm sideeffect "; def $0", "=v"()139 %readlane = call i64 @llvm.amdgcn.readlane.i64(i64 %vgpr, i32 %src1)140 call void asm sideeffect "; use $0", "s"(i64 %readlane)141 ret void142}143 144define amdgpu_kernel void @test_readlane_vreg_sreg_f64(double %src0, i32 %src1) #1 {145; CHECK-SDAG-LABEL: test_readlane_vreg_sreg_f64:146; CHECK-SDAG: ; %bb.0:147; CHECK-SDAG-NEXT: s_load_dword s0, s[8:9], 0x8148; CHECK-SDAG-NEXT: ;;#ASMSTART149; CHECK-SDAG-NEXT: ; def v[0:1]150; CHECK-SDAG-NEXT: ;;#ASMEND151; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)152; CHECK-SDAG-NEXT: v_readlane_b32 s1, v1, s0153; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s0154; CHECK-SDAG-NEXT: ;;#ASMSTART155; CHECK-SDAG-NEXT: ; use s[0:1]156; CHECK-SDAG-NEXT: ;;#ASMEND157; CHECK-SDAG-NEXT: s_endpgm158;159; CHECK-GISEL-LABEL: test_readlane_vreg_sreg_f64:160; CHECK-GISEL: ; %bb.0:161; CHECK-GISEL-NEXT: s_load_dword s1, s[8:9], 0x8162; CHECK-GISEL-NEXT: ;;#ASMSTART163; CHECK-GISEL-NEXT: ; def v[0:1]164; CHECK-GISEL-NEXT: ;;#ASMEND165; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)166; CHECK-GISEL-NEXT: v_readlane_b32 s0, v0, s1167; CHECK-GISEL-NEXT: v_readlane_b32 s1, v1, s1168; CHECK-GISEL-NEXT: ;;#ASMSTART169; CHECK-GISEL-NEXT: ; use s[0:1]170; CHECK-GISEL-NEXT: ;;#ASMEND171; CHECK-GISEL-NEXT: s_endpgm172 %vgpr = call double asm sideeffect "; def $0", "=v"()173 %readlane = call double @llvm.amdgcn.readlane.f64(double %vgpr, i32 %src1)174 call void asm sideeffect "; use $0", "s"(double %readlane)175 ret void176}177 178define amdgpu_kernel void @test_readlane_imm_sreg_i32(ptr addrspace(1) %out, i32 %src1) #1 {179; CHECK-SDAG-LABEL: test_readlane_imm_sreg_i32:180; CHECK-SDAG: ; %bb.0:181; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0182; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17183; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13184; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8185; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, 32186; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)187; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0188; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1189; CHECK-SDAG-NEXT: flat_store_dword v[0:1], v2190; CHECK-SDAG-NEXT: s_endpgm191;192; CHECK-GISEL-LABEL: test_readlane_imm_sreg_i32:193; CHECK-GISEL: ; %bb.0:194; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0195; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17196; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13197; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8198; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, 32199; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)200; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s0201; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s1202; CHECK-GISEL-NEXT: flat_store_dword v[0:1], v2203; CHECK-GISEL-NEXT: s_endpgm204 %readlane = call i32 @llvm.amdgcn.readlane.i32(i32 32, i32 %src1)205 store i32 %readlane, ptr addrspace(1) %out, align 4206 ret void207}208 209define amdgpu_kernel void @test_readlane_imm_sreg_i64(ptr addrspace(1) %out, i32 %src1) #1 {210; CHECK-SDAG-LABEL: test_readlane_imm_sreg_i64:211; CHECK-SDAG: ; %bb.0:212; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0213; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17214; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13215; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8216; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, 32217; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)218; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s1219; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, 0220; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s0221; CHECK-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]222; CHECK-SDAG-NEXT: s_endpgm223;224; CHECK-GISEL-LABEL: test_readlane_imm_sreg_i64:225; CHECK-GISEL: ; %bb.0:226; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0227; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17228; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, 32229; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13230; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8231; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)232; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1233; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, 0234; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0235; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]236; CHECK-GISEL-NEXT: s_endpgm237 %readlane = call i64 @llvm.amdgcn.readlane.i64(i64 32, i32 %src1)238 store i64 %readlane, ptr addrspace(1) %out, align 4239 ret void240}241 242define amdgpu_kernel void @test_readlane_imm_sreg_f64(ptr addrspace(1) %out, i32 %src1) #1 {243; CHECK-SDAG-LABEL: test_readlane_imm_sreg_f64:244; CHECK-SDAG: ; %bb.0:245; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0246; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17247; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13248; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8249; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, 0250; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)251; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s1252; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, 0x40400000253; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s0254; CHECK-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]255; CHECK-SDAG-NEXT: s_endpgm256;257; CHECK-GISEL-LABEL: test_readlane_imm_sreg_f64:258; CHECK-GISEL: ; %bb.0:259; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0260; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17261; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, 0262; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13263; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8264; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)265; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1266; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, 0x40400000267; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0268; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]269; CHECK-GISEL-NEXT: s_endpgm270 %readlane = call double @llvm.amdgcn.readlane.f64(double 32.0, i32 %src1)271 store double %readlane, ptr addrspace(1) %out, align 4272 ret void273}274 275define amdgpu_kernel void @test_readlane_vregs_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {276; CHECK-SDAG-LABEL: test_readlane_vregs_i32:277; CHECK-SDAG: ; %bb.0:278; CHECK-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0279; CHECK-SDAG-NEXT: v_lshlrev_b32_e32 v0, 3, v0280; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17281; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13282; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8283; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)284; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s3285; CHECK-SDAG-NEXT: v_add_u32_e32 v0, vcc, s2, v0286; CHECK-SDAG-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc287; CHECK-SDAG-NEXT: flat_load_dwordx2 v[0:1], v[0:1]288; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s0289; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s1290; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0)291; CHECK-SDAG-NEXT: v_readfirstlane_b32 s0, v1292; CHECK-SDAG-NEXT: s_nop 3293; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s0294; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0295; CHECK-SDAG-NEXT: flat_store_dword v[2:3], v0296; CHECK-SDAG-NEXT: s_endpgm297;298; CHECK-GISEL-LABEL: test_readlane_vregs_i32:299; CHECK-GISEL: ; %bb.0:300; CHECK-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0301; CHECK-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0302; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17303; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13304; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8305; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)306; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2307; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3308; CHECK-GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2309; CHECK-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc310; CHECK-GISEL-NEXT: flat_load_dwordx2 v[0:1], v[0:1]311; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0)312; CHECK-GISEL-NEXT: v_readfirstlane_b32 s2, v1313; CHECK-GISEL-NEXT: s_nop 3314; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, s2315; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s0316; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s2317; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s1318; CHECK-GISEL-NEXT: flat_store_dword v[0:1], v2319; CHECK-GISEL-NEXT: s_endpgm320 %tid = call i32 @llvm.amdgcn.workitem.id.x()321 %gep.in = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 %tid322 %args = load <2 x i32>, ptr addrspace(1) %gep.in323 %value = extractelement <2 x i32> %args, i32 0324 %lane = extractelement <2 x i32> %args, i32 1325 %readlane = call i32 @llvm.amdgcn.readlane.i32(i32 %value, i32 %lane)326 store i32 %readlane, ptr addrspace(1) %out, align 4327 ret void328}329 330define amdgpu_kernel void @test_readlane_vregs_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {331; CHECK-SDAG-LABEL: test_readlane_vregs_i64:332; CHECK-SDAG: ; %bb.0:333; CHECK-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0334; CHECK-SDAG-NEXT: v_lshlrev_b32_e32 v0, 4, v0335; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17336; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13337; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8338; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)339; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s3340; CHECK-SDAG-NEXT: v_add_u32_e32 v0, vcc, s2, v0341; CHECK-SDAG-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc342; CHECK-SDAG-NEXT: flat_load_dwordx4 v[0:3], v[0:1]343; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0)344; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s0345; CHECK-SDAG-NEXT: v_mov_b32_e32 v4, s1346; CHECK-SDAG-NEXT: v_readfirstlane_b32 s0, v2347; CHECK-SDAG-NEXT: s_nop 3348; CHECK-SDAG-NEXT: v_readlane_b32 s1, v1, s0349; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s0350; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0351; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1352; CHECK-SDAG-NEXT: flat_store_dwordx2 v[3:4], v[0:1]353; CHECK-SDAG-NEXT: s_endpgm354;355; CHECK-GISEL-LABEL: test_readlane_vregs_i64:356; CHECK-GISEL: ; %bb.0:357; CHECK-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0358; CHECK-GISEL-NEXT: v_lshlrev_b32_e32 v2, 4, v0359; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17360; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13361; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8362; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)363; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2364; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3365; CHECK-GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2366; CHECK-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc367; CHECK-GISEL-NEXT: flat_load_dwordx4 v[0:3], v[0:1]368; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0)369; CHECK-GISEL-NEXT: v_readfirstlane_b32 s3, v2370; CHECK-GISEL-NEXT: s_nop 3371; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, s3372; CHECK-GISEL-NEXT: v_readlane_b32 s3, v1, s3373; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2374; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1375; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3376; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0377; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]378; CHECK-GISEL-NEXT: s_endpgm379 %tid = call i32 @llvm.amdgcn.workitem.id.x()380 %gep.in = getelementptr <2 x i64>, ptr addrspace(1) %in, i32 %tid381 %args = load <2 x i64>, ptr addrspace(1) %gep.in382 %value = extractelement <2 x i64> %args, i32 0383 %lane = extractelement <2 x i64> %args, i32 1384 %lane32 = trunc i64 %lane to i32385 %readlane = call i64 @llvm.amdgcn.readlane.i64(i64 %value, i32 %lane32)386 store i64 %readlane, ptr addrspace(1) %out, align 4387 ret void388}389 390define amdgpu_kernel void @test_readlane_vregs_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {391; CHECK-SDAG-LABEL: test_readlane_vregs_f64:392; CHECK-SDAG: ; %bb.0:393; CHECK-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0394; CHECK-SDAG-NEXT: v_lshlrev_b32_e32 v0, 4, v0395; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17396; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13397; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8398; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)399; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s3400; CHECK-SDAG-NEXT: v_add_u32_e32 v0, vcc, s2, v0401; CHECK-SDAG-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc402; CHECK-SDAG-NEXT: flat_load_dwordx4 v[0:3], v[0:1]403; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0)404; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s0405; CHECK-SDAG-NEXT: v_mov_b32_e32 v4, s1406; CHECK-SDAG-NEXT: v_readfirstlane_b32 s0, v2407; CHECK-SDAG-NEXT: s_nop 3408; CHECK-SDAG-NEXT: v_readlane_b32 s1, v1, s0409; CHECK-SDAG-NEXT: v_readlane_b32 s0, v0, s0410; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0411; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1412; CHECK-SDAG-NEXT: flat_store_dwordx2 v[3:4], v[0:1]413; CHECK-SDAG-NEXT: s_endpgm414;415; CHECK-GISEL-LABEL: test_readlane_vregs_f64:416; CHECK-GISEL: ; %bb.0:417; CHECK-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0418; CHECK-GISEL-NEXT: v_lshlrev_b32_e32 v2, 4, v0419; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17420; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13421; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8422; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)423; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2424; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3425; CHECK-GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2426; CHECK-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc427; CHECK-GISEL-NEXT: flat_load_dwordx4 v[0:3], v[0:1]428; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0)429; CHECK-GISEL-NEXT: v_readfirstlane_b32 s3, v2430; CHECK-GISEL-NEXT: s_nop 3431; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, s3432; CHECK-GISEL-NEXT: v_readlane_b32 s3, v1, s3433; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2434; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1435; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3436; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0437; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]438; CHECK-GISEL-NEXT: s_endpgm439 %tid = call i32 @llvm.amdgcn.workitem.id.x()440 %gep.in = getelementptr <2 x double>, ptr addrspace(1) %in, i32 %tid441 %args = load <2 x double>, ptr addrspace(1) %gep.in442 %value = extractelement <2 x double> %args, i32 0443 %lane = extractelement <2 x double> %args, i32 1444 %lane_cast = bitcast double %lane to i64445 %lane32 = trunc i64 %lane_cast to i32446 %readlane = call double @llvm.amdgcn.readlane.f64(double %value, i32 %lane32)447 store double %readlane, ptr addrspace(1) %out, align 4448 ret void449}450 451define amdgpu_kernel void @test_readlane_m0_sreg(ptr addrspace(1) %out, i32 %src1) #1 {452; CHECK-SDAG-LABEL: test_readlane_m0_sreg:453; CHECK-SDAG: ; %bb.0:454; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0455; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17456; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13457; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8458; CHECK-SDAG-NEXT: ;;#ASMSTART459; CHECK-SDAG-NEXT: s_mov_b32 m0, -1460; CHECK-SDAG-NEXT: ;;#ASMEND461; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)462; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0463; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, m0464; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1465; CHECK-SDAG-NEXT: flat_store_dword v[0:1], v2466; CHECK-SDAG-NEXT: s_endpgm467;468; CHECK-GISEL-LABEL: test_readlane_m0_sreg:469; CHECK-GISEL: ; %bb.0:470; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0471; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17472; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13473; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8474; CHECK-GISEL-NEXT: ;;#ASMSTART475; CHECK-GISEL-NEXT: s_mov_b32 m0, -1476; CHECK-GISEL-NEXT: ;;#ASMEND477; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)478; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s0479; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, m0480; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s1481; CHECK-GISEL-NEXT: flat_store_dword v[0:1], v2482; CHECK-GISEL-NEXT: s_endpgm483 %m0 = call i32 asm "s_mov_b32 m0, -1", "={m0}"()484 %readlane = call i32 @llvm.amdgcn.readlane(i32 %m0, i32 %src1)485 store i32 %readlane, ptr addrspace(1) %out, align 4486 ret void487}488 489define amdgpu_kernel void @test_readlane_vgpr_imm_i32(ptr addrspace(1) %out) #1 {490; CHECK-SDAG-LABEL: test_readlane_vgpr_imm_i32:491; CHECK-SDAG: ; %bb.0:492; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0493; CHECK-SDAG-NEXT: ;;#ASMSTART494; CHECK-SDAG-NEXT: ; def v0495; CHECK-SDAG-NEXT: ;;#ASMEND496; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17497; CHECK-SDAG-NEXT: v_readlane_b32 s2, v0, 32498; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13499; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)500; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0501; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8502; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1503; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s2504; CHECK-SDAG-NEXT: flat_store_dword v[0:1], v2505; CHECK-SDAG-NEXT: s_endpgm506;507; CHECK-GISEL-LABEL: test_readlane_vgpr_imm_i32:508; CHECK-GISEL: ; %bb.0:509; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0510; CHECK-GISEL-NEXT: ;;#ASMSTART511; CHECK-GISEL-NEXT: ; def v0512; CHECK-GISEL-NEXT: ;;#ASMEND513; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17514; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, 32515; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13516; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)517; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s0518; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8519; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s2520; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s1521; CHECK-GISEL-NEXT: flat_store_dword v[0:1], v2522; CHECK-GISEL-NEXT: s_endpgm523 %vgpr = call i32 asm sideeffect "; def $0", "=v"()524 %readlane = call i32 @llvm.amdgcn.readlane.i32(i32 %vgpr, i32 32) #0525 store i32 %readlane, ptr addrspace(1) %out, align 4526 ret void527}528 529define amdgpu_kernel void @test_readlane_vgpr_imm_i64(ptr addrspace(1) %out) #1 {530; CHECK-SDAG-LABEL: test_readlane_vgpr_imm_i64:531; CHECK-SDAG: ; %bb.0:532; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0533; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17534; CHECK-SDAG-NEXT: ;;#ASMSTART535; CHECK-SDAG-NEXT: ; def v[0:1]536; CHECK-SDAG-NEXT: ;;#ASMEND537; CHECK-SDAG-NEXT: v_readlane_b32 s2, v1, 32538; CHECK-SDAG-NEXT: v_readlane_b32 s3, v0, 32539; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)540; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s1541; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13542; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8543; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s3544; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s2545; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s0546; CHECK-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]547; CHECK-SDAG-NEXT: s_endpgm548;549; CHECK-GISEL-LABEL: test_readlane_vgpr_imm_i64:550; CHECK-GISEL: ; %bb.0:551; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0552; CHECK-GISEL-NEXT: ;;#ASMSTART553; CHECK-GISEL-NEXT: ; def v[0:1]554; CHECK-GISEL-NEXT: ;;#ASMEND555; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, 32556; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17557; CHECK-GISEL-NEXT: v_readlane_b32 s3, v1, 32558; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2559; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)560; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1561; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13562; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8563; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3564; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0565; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]566; CHECK-GISEL-NEXT: s_endpgm567 %vgpr = call i64 asm sideeffect "; def $0", "=v"()568 %readlane = call i64 @llvm.amdgcn.readlane.i64(i64 %vgpr, i32 32) #0569 store i64 %readlane, ptr addrspace(1) %out, align 4570 ret void571}572 573define amdgpu_kernel void @test_readlane_vgpr_imm_f64(ptr addrspace(1) %out) #1 {574; CHECK-SDAG-LABEL: test_readlane_vgpr_imm_f64:575; CHECK-SDAG: ; %bb.0:576; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0577; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17578; CHECK-SDAG-NEXT: ;;#ASMSTART579; CHECK-SDAG-NEXT: ; def v[0:1]580; CHECK-SDAG-NEXT: ;;#ASMEND581; CHECK-SDAG-NEXT: v_readlane_b32 s2, v1, 32582; CHECK-SDAG-NEXT: v_readlane_b32 s3, v0, 32583; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)584; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s1585; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13586; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8587; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s3588; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s2589; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s0590; CHECK-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]591; CHECK-SDAG-NEXT: s_endpgm592;593; CHECK-GISEL-LABEL: test_readlane_vgpr_imm_f64:594; CHECK-GISEL: ; %bb.0:595; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0596; CHECK-GISEL-NEXT: ;;#ASMSTART597; CHECK-GISEL-NEXT: ; def v[0:1]598; CHECK-GISEL-NEXT: ;;#ASMEND599; CHECK-GISEL-NEXT: v_readlane_b32 s2, v0, 32600; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17601; CHECK-GISEL-NEXT: v_readlane_b32 s3, v1, 32602; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2603; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)604; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1605; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13606; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8607; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3608; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0609; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]610; CHECK-GISEL-NEXT: s_endpgm611 %vgpr = call double asm sideeffect "; def $0", "=v"()612 %readlane = call double @llvm.amdgcn.readlane.f64(double %vgpr, i32 32) #0613 store double %readlane, ptr addrspace(1) %out, align 4614 ret void615}616 617define amdgpu_kernel void @test_readlane_copy_from_sgpr_i32(ptr addrspace(1) %out) #1 {618; CHECK-SDAG-LABEL: test_readlane_copy_from_sgpr_i32:619; CHECK-SDAG: ; %bb.0:620; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0621; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17622; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13623; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8624; CHECK-SDAG-NEXT: ;;#ASMSTART625; CHECK-SDAG-NEXT: s_mov_b32 s2, 0626; CHECK-SDAG-NEXT: ;;#ASMEND627; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)628; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0629; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1630; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s2631; CHECK-SDAG-NEXT: flat_store_dword v[0:1], v2632; CHECK-SDAG-NEXT: s_endpgm633;634; CHECK-GISEL-LABEL: test_readlane_copy_from_sgpr_i32:635; CHECK-GISEL: ; %bb.0:636; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0637; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17638; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13639; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8640; CHECK-GISEL-NEXT: ;;#ASMSTART641; CHECK-GISEL-NEXT: s_mov_b32 s2, 0642; CHECK-GISEL-NEXT: ;;#ASMEND643; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)644; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s0645; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s2646; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s1647; CHECK-GISEL-NEXT: flat_store_dword v[0:1], v2648; CHECK-GISEL-NEXT: s_endpgm649 %sgpr = call i32 asm "s_mov_b32 $0, 0", "=s"()650 %readfirstlane = call i32 @llvm.amdgcn.readlane.i32(i32 %sgpr, i32 7)651 store i32 %readfirstlane, ptr addrspace(1) %out, align 4652 ret void653}654 655define amdgpu_kernel void @test_readlane_copy_from_sgpr_i64(ptr addrspace(1) %out) #1 {656; CHECK-SDAG-LABEL: test_readlane_copy_from_sgpr_i64:657; CHECK-SDAG: ; %bb.0:658; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0659; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17660; CHECK-SDAG-NEXT: ;;#ASMSTART661; CHECK-SDAG-NEXT: s_mov_b64 s[2:3], 0662; CHECK-SDAG-NEXT: ;;#ASMEND663; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s2664; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13665; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)666; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0667; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8668; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1669; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s3670; CHECK-SDAG-NEXT: flat_store_dwordx2 v[0:1], v[2:3]671; CHECK-SDAG-NEXT: s_endpgm672;673; CHECK-GISEL-LABEL: test_readlane_copy_from_sgpr_i64:674; CHECK-GISEL: ; %bb.0:675; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0676; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17677; CHECK-GISEL-NEXT: ;;#ASMSTART678; CHECK-GISEL-NEXT: s_mov_b64 s[2:3], 0679; CHECK-GISEL-NEXT: ;;#ASMEND680; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2681; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13682; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)683; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1684; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8685; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3686; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0687; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]688; CHECK-GISEL-NEXT: s_endpgm689 %sgpr = call i64 asm "s_mov_b64 $0, 0", "=s"()690 %readfirstlane = call i64 @llvm.amdgcn.readlane.i64(i64 %sgpr, i32 7)691 store i64 %readfirstlane, ptr addrspace(1) %out, align 4692 ret void693}694 695define amdgpu_kernel void @test_readlane_copy_from_sgpr_f64(ptr addrspace(1) %out) #1 {696; CHECK-SDAG-LABEL: test_readlane_copy_from_sgpr_f64:697; CHECK-SDAG: ; %bb.0:698; CHECK-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0699; CHECK-SDAG-NEXT: s_add_i32 s12, s12, s17700; CHECK-SDAG-NEXT: ;;#ASMSTART701; CHECK-SDAG-NEXT: s_mov_b64 s[2:3], 0702; CHECK-SDAG-NEXT: ;;#ASMEND703; CHECK-SDAG-NEXT: v_mov_b32_e32 v2, s2704; CHECK-SDAG-NEXT: s_mov_b32 flat_scratch_lo, s13705; CHECK-SDAG-NEXT: s_waitcnt lgkmcnt(0)706; CHECK-SDAG-NEXT: v_mov_b32_e32 v0, s0707; CHECK-SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8708; CHECK-SDAG-NEXT: v_mov_b32_e32 v1, s1709; CHECK-SDAG-NEXT: v_mov_b32_e32 v3, s3710; CHECK-SDAG-NEXT: flat_store_dwordx2 v[0:1], v[2:3]711; CHECK-SDAG-NEXT: s_endpgm712;713; CHECK-GISEL-LABEL: test_readlane_copy_from_sgpr_f64:714; CHECK-GISEL: ; %bb.0:715; CHECK-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0716; CHECK-GISEL-NEXT: s_add_i32 s12, s12, s17717; CHECK-GISEL-NEXT: ;;#ASMSTART718; CHECK-GISEL-NEXT: s_mov_b64 s[2:3], 0719; CHECK-GISEL-NEXT: ;;#ASMEND720; CHECK-GISEL-NEXT: v_mov_b32_e32 v0, s2721; CHECK-GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13722; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0)723; CHECK-GISEL-NEXT: v_mov_b32_e32 v3, s1724; CHECK-GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8725; CHECK-GISEL-NEXT: v_mov_b32_e32 v1, s3726; CHECK-GISEL-NEXT: v_mov_b32_e32 v2, s0727; CHECK-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]728; CHECK-GISEL-NEXT: s_endpgm729 %sgpr = call double asm "s_mov_b64 $0, 0", "=s"()730 %readfirstlane = call double @llvm.amdgcn.readlane.f64(double %sgpr, i32 7)731 store double %readfirstlane, ptr addrspace(1) %out, align 4732 ret void733}734 735define void @test_readlane_half(ptr addrspace(1) %out, half %src, i32 %src1) {736; CHECK-SDAG-LABEL: test_readlane_half:737; CHECK-SDAG: ; %bb.0:738; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)739; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v3740; CHECK-SDAG-NEXT: s_nop 3741; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4742; CHECK-SDAG-NEXT: ;;#ASMSTART743; CHECK-SDAG-NEXT: ; use s4744; CHECK-SDAG-NEXT: ;;#ASMEND745; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]746;747; CHECK-GISEL-LABEL: test_readlane_half:748; CHECK-GISEL: ; %bb.0:749; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)750; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v3751; CHECK-GISEL-NEXT: s_nop 3752; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s4753; CHECK-GISEL-NEXT: ;;#ASMSTART754; CHECK-GISEL-NEXT: ; use s4755; CHECK-GISEL-NEXT: ;;#ASMEND756; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]757 %x = call half @llvm.amdgcn.readlane.f16(half %src, i32 %src1)758 call void asm sideeffect "; use $0", "s"(half %x)759 ret void760}761 762define void @test_readlane_float(ptr addrspace(1) %out, float %src, i32 %src1) {763; CHECK-SDAG-LABEL: test_readlane_float:764; CHECK-SDAG: ; %bb.0:765; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)766; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v3767; CHECK-SDAG-NEXT: s_nop 3768; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4769; CHECK-SDAG-NEXT: ;;#ASMSTART770; CHECK-SDAG-NEXT: ; use s4771; CHECK-SDAG-NEXT: ;;#ASMEND772; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]773;774; CHECK-GISEL-LABEL: test_readlane_float:775; CHECK-GISEL: ; %bb.0:776; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)777; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v3778; CHECK-GISEL-NEXT: s_nop 3779; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s4780; CHECK-GISEL-NEXT: ;;#ASMSTART781; CHECK-GISEL-NEXT: ; use s4782; CHECK-GISEL-NEXT: ;;#ASMEND783; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]784 %x = call float @llvm.amdgcn.readlane.f32(float %src, i32 %src1)785 call void asm sideeffect "; use $0", "s"(float %x)786 ret void787}788 789define void @test_readlane_bfloat(ptr addrspace(1) %out, bfloat %src, i32 %src1) {790; CHECK-SDAG-LABEL: test_readlane_bfloat:791; CHECK-SDAG: ; %bb.0:792; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)793; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v3794; CHECK-SDAG-NEXT: s_nop 3795; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4796; CHECK-SDAG-NEXT: ;;#ASMSTART797; CHECK-SDAG-NEXT: ; use s4798; CHECK-SDAG-NEXT: ;;#ASMEND799; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]800;801; CHECK-GISEL-LABEL: test_readlane_bfloat:802; CHECK-GISEL: ; %bb.0:803; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)804; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v3805; CHECK-GISEL-NEXT: s_nop 3806; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s4807; CHECK-GISEL-NEXT: ;;#ASMSTART808; CHECK-GISEL-NEXT: ; use s4809; CHECK-GISEL-NEXT: ;;#ASMEND810; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]811 %x = call bfloat @llvm.amdgcn.readlane.bf16(bfloat %src, i32 %src1)812 call void asm sideeffect "; use $0", "s"(bfloat %x)813 ret void814}815 816define void @test_readlane_i16(ptr addrspace(1) %out, i16 %src, i32 %src1) {817; CHECK-SDAG-LABEL: test_readlane_i16:818; CHECK-SDAG: ; %bb.0:819; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)820; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v3821; CHECK-SDAG-NEXT: s_nop 3822; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4823; CHECK-SDAG-NEXT: s_and_b32 s4, s4, 0xffff824; CHECK-SDAG-NEXT: ;;#ASMSTART825; CHECK-SDAG-NEXT: ; use s4826; CHECK-SDAG-NEXT: ;;#ASMEND827; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]828;829; CHECK-GISEL-LABEL: test_readlane_i16:830; CHECK-GISEL: ; %bb.0:831; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)832; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v3833; CHECK-GISEL-NEXT: s_nop 3834; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s4835; CHECK-GISEL-NEXT: ;;#ASMSTART836; CHECK-GISEL-NEXT: ; use s4837; CHECK-GISEL-NEXT: ;;#ASMEND838; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]839 %x = call i16 @llvm.amdgcn.readlane.i16(i16 %src, i32 %src1)840 call void asm sideeffect "; use $0", "s"(i16 %x)841 ret void842}843 844define void @test_readlane_v2f16(ptr addrspace(1) %out, <2 x half> %src, i32 %src1) {845; CHECK-SDAG-LABEL: test_readlane_v2f16:846; CHECK-SDAG: ; %bb.0:847; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)848; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v3849; CHECK-SDAG-NEXT: s_nop 3850; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4851; CHECK-SDAG-NEXT: ;;#ASMSTART852; CHECK-SDAG-NEXT: ; use s4853; CHECK-SDAG-NEXT: ;;#ASMEND854; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]855;856; CHECK-GISEL-LABEL: test_readlane_v2f16:857; CHECK-GISEL: ; %bb.0:858; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)859; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v3860; CHECK-GISEL-NEXT: s_nop 3861; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s4862; CHECK-GISEL-NEXT: ;;#ASMSTART863; CHECK-GISEL-NEXT: ; use s4864; CHECK-GISEL-NEXT: ;;#ASMEND865; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]866 %x = call <2 x half> @llvm.amdgcn.readlane.v2f16(<2 x half> %src, i32 %src1)867 call void asm sideeffect "; use $0", "s"(<2 x half> %x)868 ret void869}870 871define void @test_readlane_v2f32(ptr addrspace(1) %out, <2 x float> %src, i32 %src1) {872; CHECK-SDAG-LABEL: test_readlane_v2f32:873; CHECK-SDAG: ; %bb.0:874; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)875; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v4876; CHECK-SDAG-NEXT: s_nop 3877; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s4878; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4879; CHECK-SDAG-NEXT: ;;#ASMSTART880; CHECK-SDAG-NEXT: ; use s[4:5]881; CHECK-SDAG-NEXT: ;;#ASMEND882; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]883;884; CHECK-GISEL-LABEL: test_readlane_v2f32:885; CHECK-GISEL: ; %bb.0:886; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)887; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v4888; CHECK-GISEL-NEXT: s_nop 3889; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s5890; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s5891; CHECK-GISEL-NEXT: ;;#ASMSTART892; CHECK-GISEL-NEXT: ; use s[4:5]893; CHECK-GISEL-NEXT: ;;#ASMEND894; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]895 %x = call <2 x float> @llvm.amdgcn.readlane.v2f32(<2 x float> %src, i32 %src1)896 call void asm sideeffect "; use $0", "s"(<2 x float> %x)897 ret void898}899 900define void @test_readlane_v7i32(ptr addrspace(1) %out, <7 x i32> %src, i32 %src1) {901; CHECK-SDAG-LABEL: test_readlane_v7i32:902; CHECK-SDAG: ; %bb.0:903; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)904; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v9905; CHECK-SDAG-NEXT: s_nop 3906; CHECK-SDAG-NEXT: v_readlane_b32 s10, v8, s4907; CHECK-SDAG-NEXT: v_readlane_b32 s9, v7, s4908; CHECK-SDAG-NEXT: v_readlane_b32 s8, v6, s4909; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s4910; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s4911; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s4912; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4913; CHECK-SDAG-NEXT: ;;#ASMSTART914; CHECK-SDAG-NEXT: ; use s[4:10]915; CHECK-SDAG-NEXT: ;;#ASMEND916; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]917;918; CHECK-GISEL-LABEL: test_readlane_v7i32:919; CHECK-GISEL: ; %bb.0:920; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)921; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v9922; CHECK-GISEL-NEXT: s_nop 3923; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s10924; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s10925; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s10926; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s10927; CHECK-GISEL-NEXT: v_readlane_b32 s8, v6, s10928; CHECK-GISEL-NEXT: v_readlane_b32 s9, v7, s10929; CHECK-GISEL-NEXT: v_readlane_b32 s10, v8, s10930; CHECK-GISEL-NEXT: ;;#ASMSTART931; CHECK-GISEL-NEXT: ; use s[4:10]932; CHECK-GISEL-NEXT: ;;#ASMEND933; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]934 %x = call <7 x i32> @llvm.amdgcn.readlane.v7i32(<7 x i32> %src, i32 %src1)935 call void asm sideeffect "; use $0", "s"(<7 x i32> %x)936 ret void937}938 939define void @test_readlane_v8i16(ptr addrspace(1) %out, <8 x i16> %src, i32 %src1) {940; CHECK-SDAG-LABEL: test_readlane_v8i16:941; CHECK-SDAG: ; %bb.0:942; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)943; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v6944; CHECK-SDAG-NEXT: s_nop 3945; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s4946; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s4947; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s4948; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4949; CHECK-SDAG-NEXT: ;;#ASMSTART950; CHECK-SDAG-NEXT: ; use s[4:7]951; CHECK-SDAG-NEXT: ;;#ASMEND952; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]953;954; CHECK-GISEL-LABEL: test_readlane_v8i16:955; CHECK-GISEL: ; %bb.0:956; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)957; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v6958; CHECK-GISEL-NEXT: s_nop 3959; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s7960; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s7961; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s7962; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s7963; CHECK-GISEL-NEXT: ;;#ASMSTART964; CHECK-GISEL-NEXT: ; use s[4:7]965; CHECK-GISEL-NEXT: ;;#ASMEND966; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]967 %x = call <8 x i16> @llvm.amdgcn.readlane.v8i16(<8 x i16> %src, i32 %src1)968 call void asm sideeffect "; use $0", "s"(<8 x i16> %x)969 ret void970}971 972define void @test_readlane_v2i64(ptr addrspace(1) %out, <2 x i64> %src, i32 %src1) {973; CHECK-SDAG-LABEL: test_readlane_v2i64:974; CHECK-SDAG: ; %bb.0:975; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)976; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v6977; CHECK-SDAG-NEXT: s_nop 3978; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s4979; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s4980; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s4981; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s4982; CHECK-SDAG-NEXT: ;;#ASMSTART983; CHECK-SDAG-NEXT: ; use s[4:7]984; CHECK-SDAG-NEXT: ;;#ASMEND985; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]986;987; CHECK-GISEL-LABEL: test_readlane_v2i64:988; CHECK-GISEL: ; %bb.0:989; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)990; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v6991; CHECK-GISEL-NEXT: s_nop 3992; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s7993; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s7994; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s7995; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s7996; CHECK-GISEL-NEXT: ;;#ASMSTART997; CHECK-GISEL-NEXT: ; use s[4:7]998; CHECK-GISEL-NEXT: ;;#ASMEND999; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]1000 %x = call <2 x i64> @llvm.amdgcn.readlane.v2i64(<2 x i64> %src, i32 %src1)1001 call void asm sideeffect "; use $0", "s"(<2 x i64> %x)1002 ret void1003}1004 1005define void @test_readlane_v3i64(ptr addrspace(1) %out, <3 x i64> %src, i32 %src1) {1006; CHECK-SDAG-LABEL: test_readlane_v3i64:1007; CHECK-SDAG: ; %bb.0:1008; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1009; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v81010; CHECK-SDAG-NEXT: s_nop 31011; CHECK-SDAG-NEXT: v_readlane_b32 s9, v7, s41012; CHECK-SDAG-NEXT: v_readlane_b32 s8, v6, s41013; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s41014; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s41015; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s41016; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s41017; CHECK-SDAG-NEXT: ;;#ASMSTART1018; CHECK-SDAG-NEXT: ; use s[4:9]1019; CHECK-SDAG-NEXT: ;;#ASMEND1020; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]1021;1022; CHECK-GISEL-LABEL: test_readlane_v3i64:1023; CHECK-GISEL: ; %bb.0:1024; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1025; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v81026; CHECK-GISEL-NEXT: s_nop 31027; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s91028; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s91029; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s91030; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s91031; CHECK-GISEL-NEXT: v_readlane_b32 s8, v6, s91032; CHECK-GISEL-NEXT: v_readlane_b32 s9, v7, s91033; CHECK-GISEL-NEXT: ;;#ASMSTART1034; CHECK-GISEL-NEXT: ; use s[4:9]1035; CHECK-GISEL-NEXT: ;;#ASMEND1036; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]1037 %x = call <3 x i64> @llvm.amdgcn.readlane.v3i64(<3 x i64> %src, i32 %src1)1038 call void asm sideeffect "; use $0", "s"(<3 x i64> %x)1039 ret void1040}1041 1042define void @test_readlane_v4f64(ptr addrspace(1) %out, <4 x double> %src, i32 %src1) {1043; CHECK-SDAG-LABEL: test_readlane_v4f64:1044; CHECK-SDAG: ; %bb.0:1045; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1046; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v101047; CHECK-SDAG-NEXT: s_nop 31048; CHECK-SDAG-NEXT: v_readlane_b32 s11, v9, s41049; CHECK-SDAG-NEXT: v_readlane_b32 s10, v8, s41050; CHECK-SDAG-NEXT: v_readlane_b32 s9, v7, s41051; CHECK-SDAG-NEXT: v_readlane_b32 s8, v6, s41052; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s41053; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s41054; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s41055; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s41056; CHECK-SDAG-NEXT: ;;#ASMSTART1057; CHECK-SDAG-NEXT: ; use s[4:11]1058; CHECK-SDAG-NEXT: ;;#ASMEND1059; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]1060;1061; CHECK-GISEL-LABEL: test_readlane_v4f64:1062; CHECK-GISEL: ; %bb.0:1063; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1064; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v101065; CHECK-GISEL-NEXT: s_nop 31066; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s111067; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s111068; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s111069; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s111070; CHECK-GISEL-NEXT: v_readlane_b32 s8, v6, s111071; CHECK-GISEL-NEXT: v_readlane_b32 s9, v7, s111072; CHECK-GISEL-NEXT: v_readlane_b32 s10, v8, s111073; CHECK-GISEL-NEXT: v_readlane_b32 s11, v9, s111074; CHECK-GISEL-NEXT: ;;#ASMSTART1075; CHECK-GISEL-NEXT: ; use s[4:11]1076; CHECK-GISEL-NEXT: ;;#ASMEND1077; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]1078 %x = call <4 x double> @llvm.amdgcn.readlane.v4f64(<4 x double> %src, i32 %src1)1079 call void asm sideeffect "; use $0", "s"(<4 x double> %x)1080 ret void1081}1082 1083define void @test_readlane_v8f64(ptr addrspace(1) %out, <8 x double> %src, i32 %src1) {1084; CHECK-SDAG-LABEL: test_readlane_v8f64:1085; CHECK-SDAG: ; %bb.0:1086; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1087; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v181088; CHECK-SDAG-NEXT: s_nop 31089; CHECK-SDAG-NEXT: v_readlane_b32 s19, v17, s41090; CHECK-SDAG-NEXT: v_readlane_b32 s18, v16, s41091; CHECK-SDAG-NEXT: v_readlane_b32 s17, v15, s41092; CHECK-SDAG-NEXT: v_readlane_b32 s16, v14, s41093; CHECK-SDAG-NEXT: v_readlane_b32 s15, v13, s41094; CHECK-SDAG-NEXT: v_readlane_b32 s14, v12, s41095; CHECK-SDAG-NEXT: v_readlane_b32 s13, v11, s41096; CHECK-SDAG-NEXT: v_readlane_b32 s12, v10, s41097; CHECK-SDAG-NEXT: v_readlane_b32 s11, v9, s41098; CHECK-SDAG-NEXT: v_readlane_b32 s10, v8, s41099; CHECK-SDAG-NEXT: v_readlane_b32 s9, v7, s41100; CHECK-SDAG-NEXT: v_readlane_b32 s8, v6, s41101; CHECK-SDAG-NEXT: v_readlane_b32 s7, v5, s41102; CHECK-SDAG-NEXT: v_readlane_b32 s6, v4, s41103; CHECK-SDAG-NEXT: v_readlane_b32 s5, v3, s41104; CHECK-SDAG-NEXT: v_readlane_b32 s4, v2, s41105; CHECK-SDAG-NEXT: ;;#ASMSTART1106; CHECK-SDAG-NEXT: ; use s[4:19]1107; CHECK-SDAG-NEXT: ;;#ASMEND1108; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]1109;1110; CHECK-GISEL-LABEL: test_readlane_v8f64:1111; CHECK-GISEL: ; %bb.0:1112; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1113; CHECK-GISEL-NEXT: v_readfirstlane_b32 s19, v181114; CHECK-GISEL-NEXT: s_nop 31115; CHECK-GISEL-NEXT: v_readlane_b32 s4, v2, s191116; CHECK-GISEL-NEXT: v_readlane_b32 s5, v3, s191117; CHECK-GISEL-NEXT: v_readlane_b32 s6, v4, s191118; CHECK-GISEL-NEXT: v_readlane_b32 s7, v5, s191119; CHECK-GISEL-NEXT: v_readlane_b32 s8, v6, s191120; CHECK-GISEL-NEXT: v_readlane_b32 s9, v7, s191121; CHECK-GISEL-NEXT: v_readlane_b32 s10, v8, s191122; CHECK-GISEL-NEXT: v_readlane_b32 s11, v9, s191123; CHECK-GISEL-NEXT: v_readlane_b32 s12, v10, s191124; CHECK-GISEL-NEXT: v_readlane_b32 s13, v11, s191125; CHECK-GISEL-NEXT: v_readlane_b32 s14, v12, s191126; CHECK-GISEL-NEXT: v_readlane_b32 s15, v13, s191127; CHECK-GISEL-NEXT: v_readlane_b32 s16, v14, s191128; CHECK-GISEL-NEXT: v_readlane_b32 s17, v15, s191129; CHECK-GISEL-NEXT: v_readlane_b32 s18, v16, s191130; CHECK-GISEL-NEXT: v_readlane_b32 s19, v17, s191131; CHECK-GISEL-NEXT: ;;#ASMSTART1132; CHECK-GISEL-NEXT: ; use s[4:19]1133; CHECK-GISEL-NEXT: ;;#ASMEND1134; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]1135 %x = call <8 x double> @llvm.amdgcn.readlane.v4f64(<8 x double> %src, i32 %src1)1136 call void asm sideeffect "; use $0", "s"(<8 x double> %x)1137 ret void1138}1139 1140declare i32 @llvm.amdgcn.workitem.id.x() #21141 1142attributes #0 = { nounwind readnone convergent }1143attributes #1 = { nounwind }1144attributes #2 = { nounwind readnone }1145