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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn < %s | FileCheck --check-prefix=VARIANT0 %s3; RUN: llc -mtriple=amdgcn -mattr=+auto-waitcnt-before-barrier < %s | FileCheck --check-prefix=VARIANT1 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck --check-prefix=VARIANT2 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=+auto-waitcnt-before-barrier < %s | FileCheck --check-prefix=VARIANT3 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefix=VARIANT4 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+auto-waitcnt-before-barrier < %s | FileCheck --check-prefix=VARIANT5 %s8; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefix=VARIANT6 %s9 10define amdgpu_kernel void @test_barrier(ptr addrspace(1) %out, i32 %size) #0 {11; VARIANT0-LABEL: test_barrier:12; VARIANT0: ; %bb.0: ; %entry13; VARIANT0-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x914; VARIANT0-NEXT: s_load_dword s4, s[4:5], 0xb15; VARIANT0-NEXT: s_mov_b32 s3, 0xf00016; VARIANT0-NEXT: s_mov_b32 s2, 017; VARIANT0-NEXT: v_lshlrev_b32_e32 v1, 2, v018; VARIANT0-NEXT: v_mov_b32_e32 v2, 019; VARIANT0-NEXT: v_not_b32_e32 v3, v020; VARIANT0-NEXT: s_waitcnt lgkmcnt(0)21; VARIANT0-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6422; VARIANT0-NEXT: s_waitcnt vmcnt(0) expcnt(0)23; VARIANT0-NEXT: s_barrier24; VARIANT0-NEXT: v_add_i32_e32 v3, vcc, s4, v325; VARIANT0-NEXT: v_ashrrev_i32_e32 v4, 31, v326; VARIANT0-NEXT: v_lshl_b64 v[3:4], v[3:4], 227; VARIANT0-NEXT: buffer_load_dword v0, v[3:4], s[0:3], 0 addr6428; VARIANT0-NEXT: s_waitcnt vmcnt(0)29; VARIANT0-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6430; VARIANT0-NEXT: s_endpgm31;32; VARIANT1-LABEL: test_barrier:33; VARIANT1: ; %bb.0: ; %entry34; VARIANT1-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x935; VARIANT1-NEXT: s_load_dword s4, s[4:5], 0xb36; VARIANT1-NEXT: s_mov_b32 s3, 0xf00037; VARIANT1-NEXT: s_mov_b32 s2, 038; VARIANT1-NEXT: v_lshlrev_b32_e32 v1, 2, v039; VARIANT1-NEXT: v_mov_b32_e32 v2, 040; VARIANT1-NEXT: v_not_b32_e32 v3, v041; VARIANT1-NEXT: s_waitcnt lgkmcnt(0)42; VARIANT1-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6443; VARIANT1-NEXT: s_barrier44; VARIANT1-NEXT: v_add_i32_e32 v3, vcc, s4, v345; VARIANT1-NEXT: v_ashrrev_i32_e32 v4, 31, v346; VARIANT1-NEXT: v_lshl_b64 v[3:4], v[3:4], 247; VARIANT1-NEXT: s_waitcnt expcnt(0)48; VARIANT1-NEXT: buffer_load_dword v0, v[3:4], s[0:3], 0 addr6449; VARIANT1-NEXT: s_waitcnt vmcnt(0)50; VARIANT1-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6451; VARIANT1-NEXT: s_endpgm52;53; VARIANT2-LABEL: test_barrier:54; VARIANT2: ; %bb.0: ; %entry55; VARIANT2-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2456; VARIANT2-NEXT: s_load_dword s2, s[4:5], 0x2c57; VARIANT2-NEXT: v_lshlrev_b32_e32 v2, 2, v058; VARIANT2-NEXT: s_waitcnt lgkmcnt(0)59; VARIANT2-NEXT: global_store_dword v2, v0, s[0:1]60; VARIANT2-NEXT: v_xad_u32 v0, v0, -1, s261; VARIANT2-NEXT: v_ashrrev_i32_e32 v1, 31, v062; VARIANT2-NEXT: v_lshlrev_b64 v[0:1], 2, v[0:1]63; VARIANT2-NEXT: v_mov_b32_e32 v3, s164; VARIANT2-NEXT: v_add_co_u32_e32 v0, vcc, s0, v065; VARIANT2-NEXT: v_addc_co_u32_e32 v1, vcc, v3, v1, vcc66; VARIANT2-NEXT: s_waitcnt vmcnt(0)67; VARIANT2-NEXT: s_barrier68; VARIANT2-NEXT: global_load_dword v0, v[0:1], off69; VARIANT2-NEXT: s_waitcnt vmcnt(0)70; VARIANT2-NEXT: global_store_dword v2, v0, s[0:1]71; VARIANT2-NEXT: s_endpgm72;73; VARIANT3-LABEL: test_barrier:74; VARIANT3: ; %bb.0: ; %entry75; VARIANT3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2476; VARIANT3-NEXT: s_load_dword s2, s[4:5], 0x2c77; VARIANT3-NEXT: v_lshlrev_b32_e32 v2, 2, v078; VARIANT3-NEXT: s_waitcnt lgkmcnt(0)79; VARIANT3-NEXT: global_store_dword v2, v0, s[0:1]80; VARIANT3-NEXT: v_xad_u32 v0, v0, -1, s281; VARIANT3-NEXT: v_ashrrev_i32_e32 v1, 31, v082; VARIANT3-NEXT: v_lshlrev_b64 v[0:1], 2, v[0:1]83; VARIANT3-NEXT: v_mov_b32_e32 v3, s184; VARIANT3-NEXT: v_add_co_u32_e32 v0, vcc, s0, v085; VARIANT3-NEXT: v_addc_co_u32_e32 v1, vcc, v3, v1, vcc86; VARIANT3-NEXT: s_barrier87; VARIANT3-NEXT: global_load_dword v0, v[0:1], off88; VARIANT3-NEXT: s_waitcnt vmcnt(0)89; VARIANT3-NEXT: global_store_dword v2, v0, s[0:1]90; VARIANT3-NEXT: s_endpgm91;92; VARIANT4-LABEL: test_barrier:93; VARIANT4: ; %bb.0: ; %entry94; VARIANT4-NEXT: s_load_b96 s[0:2], s[4:5], 0x2495; VARIANT4-NEXT: v_and_b32_e32 v2, 0x3ff, v096; VARIANT4-NEXT: s_delay_alu instid0(VALU_DEP_1)97; VARIANT4-NEXT: v_lshlrev_b32_e32 v3, 2, v298; VARIANT4-NEXT: s_wait_kmcnt 0x099; VARIANT4-NEXT: v_xad_u32 v0, v2, -1, s2100; VARIANT4-NEXT: global_store_b32 v3, v2, s[0:1]101; VARIANT4-NEXT: s_barrier_signal -1102; VARIANT4-NEXT: s_barrier_wait -1103; VARIANT4-NEXT: v_ashrrev_i32_e32 v1, 31, v0104; VARIANT4-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)105; VARIANT4-NEXT: v_lshlrev_b64_e32 v[0:1], 2, v[0:1]106; VARIANT4-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0107; VARIANT4-NEXT: s_delay_alu instid0(VALU_DEP_1)108; VARIANT4-NEXT: v_add_co_ci_u32_e64 v1, null, s1, v1, vcc_lo109; VARIANT4-NEXT: global_load_b32 v0, v[0:1], off110; VARIANT4-NEXT: s_wait_loadcnt 0x0111; VARIANT4-NEXT: global_store_b32 v3, v0, s[0:1]112; VARIANT4-NEXT: s_endpgm113;114; VARIANT5-LABEL: test_barrier:115; VARIANT5: ; %bb.0: ; %entry116; VARIANT5-NEXT: s_load_b96 s[0:2], s[4:5], 0x24117; VARIANT5-NEXT: v_and_b32_e32 v2, 0x3ff, v0118; VARIANT5-NEXT: s_delay_alu instid0(VALU_DEP_1)119; VARIANT5-NEXT: v_lshlrev_b32_e32 v3, 2, v2120; VARIANT5-NEXT: s_wait_kmcnt 0x0121; VARIANT5-NEXT: v_xad_u32 v0, v2, -1, s2122; VARIANT5-NEXT: global_store_b32 v3, v2, s[0:1]123; VARIANT5-NEXT: s_barrier_signal -1124; VARIANT5-NEXT: s_barrier_wait -1125; VARIANT5-NEXT: v_ashrrev_i32_e32 v1, 31, v0126; VARIANT5-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)127; VARIANT5-NEXT: v_lshlrev_b64_e32 v[0:1], 2, v[0:1]128; VARIANT5-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0129; VARIANT5-NEXT: s_delay_alu instid0(VALU_DEP_1)130; VARIANT5-NEXT: v_add_co_ci_u32_e64 v1, null, s1, v1, vcc_lo131; VARIANT5-NEXT: global_load_b32 v0, v[0:1], off132; VARIANT5-NEXT: s_wait_loadcnt 0x0133; VARIANT5-NEXT: global_store_b32 v3, v0, s[0:1]134; VARIANT5-NEXT: s_endpgm135;136; VARIANT6-LABEL: test_barrier:137; VARIANT6: ; %bb.0: ; %entry138; VARIANT6-NEXT: s_load_b96 s[0:2], s[4:5], 0x24139; VARIANT6-NEXT: s_wait_kmcnt 0x0140; VARIANT6-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_and_b32 v4, 0x3ff, v0141; VARIANT6-NEXT: s_add_co_i32 s2, s2, -1142; VARIANT6-NEXT: s_delay_alu instid0(VALU_DEP_1)143; VARIANT6-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_lshlrev_b32 v5, 2, v4144; VARIANT6-NEXT: v_sub_nc_u32_e32 v0, s2, v4145; VARIANT6-NEXT: global_store_b32 v5, v4, s[0:1]146; VARIANT6-NEXT: v_ashrrev_i32_e32 v1, 31, v0147; VARIANT6-NEXT: s_barrier_signal -1148; VARIANT6-NEXT: s_barrier_wait -1149; VARIANT6-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)150; VARIANT6-NEXT: v_lshlrev_b64_e32 v[0:1], 2, v[0:1]151; VARIANT6-NEXT: v_add_co_u32 v0, vcc_lo, v2, v0152; VARIANT6-NEXT: s_delay_alu instid0(VALU_DEP_1)153; VARIANT6-NEXT: v_add_co_ci_u32_e64 v1, null, v3, v1, vcc_lo154; VARIANT6-NEXT: global_load_b32 v0, v[0:1], off155; VARIANT6-NEXT: s_wait_loadcnt 0x0156; VARIANT6-NEXT: global_store_b32 v5, v0, s[0:1]157; VARIANT6-NEXT: s_endpgm158entry:159 %tmp = call i32 @llvm.amdgcn.workitem.id.x()160 %tmp1 = getelementptr i32, ptr addrspace(1) %out, i32 %tmp161 store i32 %tmp, ptr addrspace(1) %tmp1162 call void @llvm.amdgcn.s.barrier()163 %tmp3 = sub i32 %size, 1164 %tmp4 = sub i32 %tmp3, %tmp165 %tmp5 = getelementptr i32, ptr addrspace(1) %out, i32 %tmp4166 %tmp6 = load i32, ptr addrspace(1) %tmp5167 store i32 %tmp6, ptr addrspace(1) %tmp1168 ret void169}170 171declare void @llvm.amdgcn.s.barrier() #1172declare i32 @llvm.amdgcn.workitem.id.x() #2173 174attributes #0 = { nounwind }175attributes #1 = { convergent nounwind }176attributes #2 = { nounwind readnone }177