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1; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck %s3 4; CHECK-LABEL: {{^}}test1:5; CHECK-NOT: s_waitcnt6; CHECK: image_store7; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0){{$}}8; CHECK-NEXT: image_store9; CHECK-NEXT: s_endpgm10define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <4 x float> %d0, <4 x float> %d1, i32 %c0, i32 %c1) {11 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %d0, i32 15, i32 %c0, <8 x i32> %rsrc, i32 0, i32 0)12 call void @llvm.amdgcn.s.waitcnt(i32 3840) ; 0xf0013 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %d1, i32 15, i32 %c1, <8 x i32> %rsrc, i32 0, i32 0)14 ret void15}16 17; Test that the intrinsic is merged with automatically generated waits and18; emitted as late as possible.19;20; CHECK-LABEL: {{^}}test2:21; CHECK-NOT: s_waitcnt22; CHECK: image_load23; CHECK-NEXT: v_lshlrev_b3224; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0){{$}}25; CHECK-NEXT: image_store26define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, i32 %c) {27 %t = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %c, <8 x i32> %rsrc, i32 0, i32 0)28 call void @llvm.amdgcn.s.waitcnt(i32 3840) ; 0xf0029 %c.1 = mul i32 %c, 230 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %t, i32 15, i32 %c.1, <8 x i32> %rsrc, i32 0, i32 0)31 ret void32}33 34; CHECK-LABEL: {{^}}test3:35; CHECK: image_load36; CHECK: s_waitcnt vmcnt(0) lgkmcnt(0)37; CHECK: image_store38define amdgpu_ps void @test3(<8 x i32> inreg %rsrc, i32 %c) {39 %t = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %c, <8 x i32> %rsrc, i32 0, i32 0)40 call void @llvm.amdgcn.s.waitcnt(i32 49279) ; not isInt<16>, but isUInt<16>41 %c.1 = mul i32 %c, 242 call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %t, i32 15, i32 %c.1, <8 x i32> %rsrc, i32 0, i32 0)43 ret void44}45 46declare void @llvm.amdgcn.s.waitcnt(i32) #047 48declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32, i32, <8 x i32>, i32, i32) #149declare void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float>, i32, i32, <8 x i32>, i32, i32) #050 51attributes #0 = { nounwind }52attributes #1 = { nounwind readonly }53