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1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s3 4; GCN-LABEL: {{^}}bfe_i32_arg_arg_arg:5; GCN: v_bfe_i326define amdgpu_kernel void @bfe_i32_arg_arg_arg(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) #0 {7 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 %src1)8 store i32 %bfe_i32, ptr addrspace(1) %out, align 49 ret void10}11 12; GCN-LABEL: {{^}}bfe_i32_arg_arg_imm:13; GCN: v_bfe_i3214define amdgpu_kernel void @bfe_i32_arg_arg_imm(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {15 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 123)16 store i32 %bfe_i32, ptr addrspace(1) %out, align 417 ret void18}19 20; GCN-LABEL: {{^}}bfe_i32_arg_imm_arg:21; GCN: v_bfe_i3222define amdgpu_kernel void @bfe_i32_arg_imm_arg(ptr addrspace(1) %out, i32 %src0, i32 %src2) #0 {23 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 123, i32 %src2)24 store i32 %bfe_i32, ptr addrspace(1) %out, align 425 ret void26}27 28; GCN-LABEL: {{^}}bfe_i32_imm_arg_arg:29; GCN: v_bfe_i3230define amdgpu_kernel void @bfe_i32_imm_arg_arg(ptr addrspace(1) %out, i32 %src1, i32 %src2) #0 {31 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 123, i32 %src1, i32 %src2)32 store i32 %bfe_i32, ptr addrspace(1) %out, align 433 ret void34}35 36; GCN-LABEL: {{^}}v_bfe_print_arg:37; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 2, 838define amdgpu_kernel void @v_bfe_print_arg(ptr addrspace(1) %out, ptr addrspace(1) %src0) #0 {39 %load = load i32, ptr addrspace(1) %src0, align 440 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 2, i32 8)41 store i32 %bfe_i32, ptr addrspace(1) %out, align 442 ret void43}44 45; GCN-LABEL: {{^}}bfe_i32_arg_0_width_reg_offset:46; GCN-NOT: {{[^@]}}bfe47; GCN: s_endpgm48define amdgpu_kernel void @bfe_i32_arg_0_width_reg_offset(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {49 %bfe_u32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 0)50 store i32 %bfe_u32, ptr addrspace(1) %out, align 451 ret void52}53 54; GCN-LABEL: {{^}}bfe_i32_arg_0_width_imm_offset:55; GCN-NOT: {{[^@]}}bfe56; GCN: s_endpgm57define amdgpu_kernel void @bfe_i32_arg_0_width_imm_offset(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {58 %bfe_u32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 8, i32 0)59 store i32 %bfe_u32, ptr addrspace(1) %out, align 460 ret void61}62 63; GCN-LABEL: {{^}}bfe_i32_test_6:64; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}65; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}66; GCN: s_endpgm67define amdgpu_kernel void @bfe_i32_test_6(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {68 %x = load i32, ptr addrspace(1) %in, align 469 %shl = shl i32 %x, 3170 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 1, i32 31)71 store i32 %bfe, ptr addrspace(1) %out, align 472 ret void73}74 75; GCN-LABEL: {{^}}bfe_i32_test_7:76; GCN-NOT: shl77; GCN-NOT: {{[^@]}}bfe78; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 079; GCN: buffer_store_dword [[VREG]],80; GCN: s_endpgm81define amdgpu_kernel void @bfe_i32_test_7(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {82 %x = load i32, ptr addrspace(1) %in, align 483 %shl = shl i32 %x, 3184 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 0, i32 31)85 store i32 %bfe, ptr addrspace(1) %out, align 486 ret void87}88 89; GCN-LABEL: {{^}}bfe_i32_test_8:90; GCN: buffer_load_dword91; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 192; GCN: s_endpgm93define amdgpu_kernel void @bfe_i32_test_8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {94 %x = load i32, ptr addrspace(1) %in, align 495 %shl = shl i32 %x, 3196 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)97 store i32 %bfe, ptr addrspace(1) %out, align 498 ret void99}100 101; GCN-LABEL: {{^}}bfe_i32_test_9:102; GCN-NOT: {{[^@]}}bfe103; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}104; GCN-NOT: {{[^@]}}bfe105; GCN: s_endpgm106define amdgpu_kernel void @bfe_i32_test_9(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {107 %x = load i32, ptr addrspace(1) %in, align 4108 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 31, i32 1)109 store i32 %bfe, ptr addrspace(1) %out, align 4110 ret void111}112 113; GCN-LABEL: {{^}}bfe_i32_test_10:114; GCN-NOT: {{[^@]}}bfe115; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}116; GCN-NOT: {{[^@]}}bfe117; GCN: s_endpgm118define amdgpu_kernel void @bfe_i32_test_10(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {119 %x = load i32, ptr addrspace(1) %in, align 4120 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 1, i32 31)121 store i32 %bfe, ptr addrspace(1) %out, align 4122 ret void123}124 125; GCN-LABEL: {{^}}bfe_i32_test_11:126; GCN-NOT: {{[^@]}}bfe127; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 8, v{{[0-9]+}}128; GCN-NOT: {{[^@]}}bfe129; GCN: s_endpgm130define amdgpu_kernel void @bfe_i32_test_11(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {131 %x = load i32, ptr addrspace(1) %in, align 4132 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 8, i32 24)133 store i32 %bfe, ptr addrspace(1) %out, align 4134 ret void135}136 137; GCN-LABEL: {{^}}bfe_i32_test_12:138; GCN-NOT: {{[^@]}}bfe139; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 24, v{{[0-9]+}}140; GCN-NOT: {{[^@]}}bfe141; GCN: s_endpgm142define amdgpu_kernel void @bfe_i32_test_12(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {143 %x = load i32, ptr addrspace(1) %in, align 4144 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 24, i32 8)145 store i32 %bfe, ptr addrspace(1) %out, align 4146 ret void147}148 149; GCN-LABEL: {{^}}bfe_i32_test_13:150; GCN: v_ashrrev_i32_e32 {{v[0-9]+}}, 31, {{v[0-9]+}}151; GCN-NOT: {{[^@]}}bfe152; GCN: s_endpgm153define amdgpu_kernel void @bfe_i32_test_13(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {154 %x = load i32, ptr addrspace(1) %in, align 4155 %shl = ashr i32 %x, 31156 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)157 store i32 %bfe, ptr addrspace(1) %out, align 4 ret void158}159 160; GCN-LABEL: {{^}}bfe_i32_test_14:161; GCN-NOT: lshr162; GCN-NOT: {{[^@]}}bfe163; GCN: s_endpgm164define amdgpu_kernel void @bfe_i32_test_14(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {165 %x = load i32, ptr addrspace(1) %in, align 4166 %shl = lshr i32 %x, 31167 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)168 store i32 %bfe, ptr addrspace(1) %out, align 4 ret void169}170 171; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_0:172; GCN-NOT: {{[^@]}}bfe173; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0174; GCN: buffer_store_dword [[VREG]],175; GCN: s_endpgm176define amdgpu_kernel void @bfe_i32_constant_fold_test_0(ptr addrspace(1) %out) #0 {177 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 0, i32 0, i32 0)178 store i32 %bfe_i32, ptr addrspace(1) %out, align 4179 ret void180}181 182; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_1:183; GCN-NOT: {{[^@]}}bfe184; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0185; GCN: buffer_store_dword [[VREG]],186; GCN: s_endpgm187define amdgpu_kernel void @bfe_i32_constant_fold_test_1(ptr addrspace(1) %out) #0 {188 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 12334, i32 0, i32 0)189 store i32 %bfe_i32, ptr addrspace(1) %out, align 4190 ret void191}192 193; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_2:194; GCN-NOT: {{[^@]}}bfe195; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0196; GCN: buffer_store_dword [[VREG]],197; GCN: s_endpgm198define amdgpu_kernel void @bfe_i32_constant_fold_test_2(ptr addrspace(1) %out) #0 {199 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 0, i32 0, i32 1)200 store i32 %bfe_i32, ptr addrspace(1) %out, align 4201 ret void202}203 204; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_3:205; GCN-NOT: {{[^@]}}bfe206; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1207; GCN: buffer_store_dword [[VREG]],208; GCN: s_endpgm209define amdgpu_kernel void @bfe_i32_constant_fold_test_3(ptr addrspace(1) %out) #0 {210 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 1, i32 0, i32 1)211 store i32 %bfe_i32, ptr addrspace(1) %out, align 4212 ret void213}214 215; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_4:216; GCN-NOT: {{[^@]}}bfe217; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1218; GCN: buffer_store_dword [[VREG]],219; GCN: s_endpgm220define amdgpu_kernel void @bfe_i32_constant_fold_test_4(ptr addrspace(1) %out) #0 {221 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 4294967295, i32 0, i32 1)222 store i32 %bfe_i32, ptr addrspace(1) %out, align 4223 ret void224}225 226; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_5:227; GCN-NOT: {{[^@]}}bfe228; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1229; GCN: buffer_store_dword [[VREG]],230; GCN: s_endpgm231define amdgpu_kernel void @bfe_i32_constant_fold_test_5(ptr addrspace(1) %out) #0 {232 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 128, i32 7, i32 1)233 store i32 %bfe_i32, ptr addrspace(1) %out, align 4234 ret void235}236 237; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_6:238; GCN-NOT: {{[^@]}}bfe239; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0xffffff80240; GCN: buffer_store_dword [[VREG]],241; GCN: s_endpgm242define amdgpu_kernel void @bfe_i32_constant_fold_test_6(ptr addrspace(1) %out) #0 {243 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 128, i32 0, i32 8)244 store i32 %bfe_i32, ptr addrspace(1) %out, align 4245 ret void246}247 248; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_7:249; GCN-NOT: {{[^@]}}bfe250; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f251; GCN: buffer_store_dword [[VREG]],252; GCN: s_endpgm253define amdgpu_kernel void @bfe_i32_constant_fold_test_7(ptr addrspace(1) %out) #0 {254 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 127, i32 0, i32 8)255 store i32 %bfe_i32, ptr addrspace(1) %out, align 4256 ret void257}258 259; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_8:260; GCN-NOT: {{[^@]}}bfe261; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1262; GCN: buffer_store_dword [[VREG]],263; GCN: s_endpgm264define amdgpu_kernel void @bfe_i32_constant_fold_test_8(ptr addrspace(1) %out) #0 {265 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 127, i32 6, i32 8)266 store i32 %bfe_i32, ptr addrspace(1) %out, align 4267 ret void268}269 270; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_9:271; GCN-NOT: {{[^@]}}bfe272; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1273; GCN: buffer_store_dword [[VREG]],274; GCN: s_endpgm275define amdgpu_kernel void @bfe_i32_constant_fold_test_9(ptr addrspace(1) %out) #0 {276 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 65536, i32 16, i32 8)277 store i32 %bfe_i32, ptr addrspace(1) %out, align 4278 ret void279}280 281; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_10:282; GCN-NOT: {{[^@]}}bfe283; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0284; GCN: buffer_store_dword [[VREG]],285; GCN: s_endpgm286define amdgpu_kernel void @bfe_i32_constant_fold_test_10(ptr addrspace(1) %out) #0 {287 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 65535, i32 16, i32 16)288 store i32 %bfe_i32, ptr addrspace(1) %out, align 4289 ret void290}291 292; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_11:293; GCN-NOT: {{[^@]}}bfe294; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -6295; GCN: buffer_store_dword [[VREG]],296; GCN: s_endpgm297define amdgpu_kernel void @bfe_i32_constant_fold_test_11(ptr addrspace(1) %out) #0 {298 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 4, i32 4)299 store i32 %bfe_i32, ptr addrspace(1) %out, align 4300 ret void301}302 303; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_12:304; GCN-NOT: {{[^@]}}bfe305; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0306; GCN: buffer_store_dword [[VREG]],307; GCN: s_endpgm308define amdgpu_kernel void @bfe_i32_constant_fold_test_12(ptr addrspace(1) %out) #0 {309 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 31, i32 1)310 store i32 %bfe_i32, ptr addrspace(1) %out, align 4311 ret void312}313 314; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_13:315; GCN-NOT: {{[^@]}}bfe316; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1317; GCN: buffer_store_dword [[VREG]],318; GCN: s_endpgm319define amdgpu_kernel void @bfe_i32_constant_fold_test_13(ptr addrspace(1) %out) #0 {320 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 131070, i32 16, i32 16)321 store i32 %bfe_i32, ptr addrspace(1) %out, align 4322 ret void323}324 325; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_14:326; GCN-NOT: {{[^@]}}bfe327; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 40328; GCN: buffer_store_dword [[VREG]],329; GCN: s_endpgm330define amdgpu_kernel void @bfe_i32_constant_fold_test_14(ptr addrspace(1) %out) #0 {331 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 2, i32 30)332 store i32 %bfe_i32, ptr addrspace(1) %out, align 4333 ret void334}335 336; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_15:337; GCN-NOT: {{[^@]}}bfe338; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 10339; GCN: buffer_store_dword [[VREG]],340; GCN: s_endpgm341define amdgpu_kernel void @bfe_i32_constant_fold_test_15(ptr addrspace(1) %out) #0 {342 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 4, i32 28)343 store i32 %bfe_i32, ptr addrspace(1) %out, align 4344 ret void345}346 347; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_16:348; GCN-NOT: {{[^@]}}bfe349; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1350; GCN: buffer_store_dword [[VREG]],351; GCN: s_endpgm352define amdgpu_kernel void @bfe_i32_constant_fold_test_16(ptr addrspace(1) %out) #0 {353 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 4294967295, i32 1, i32 7)354 store i32 %bfe_i32, ptr addrspace(1) %out, align 4355 ret void356}357 358; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_17:359; GCN-NOT: {{[^@]}}bfe360; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f361; GCN: buffer_store_dword [[VREG]],362; GCN: s_endpgm363define amdgpu_kernel void @bfe_i32_constant_fold_test_17(ptr addrspace(1) %out) #0 {364 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 255, i32 1, i32 31)365 store i32 %bfe_i32, ptr addrspace(1) %out, align 4366 ret void367}368 369; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_18:370; GCN-NOT: {{[^@]}}bfe371; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0372; GCN: buffer_store_dword [[VREG]],373; GCN: s_endpgm374define amdgpu_kernel void @bfe_i32_constant_fold_test_18(ptr addrspace(1) %out) #0 {375 %bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 255, i32 31, i32 1)376 store i32 %bfe_i32, ptr addrspace(1) %out, align 4377 ret void378}379 380; GCN-LABEL: {{^}}bfe_sext_in_reg_i24:381; GCN: buffer_load_dword [[LOAD:v[0-9]+]],382; GCN-NOT: v_lshl383; GCN-NOT: v_ashr384; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 0, 24385; GCN: buffer_store_dword [[BFE]],386define amdgpu_kernel void @bfe_sext_in_reg_i24(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {387 %x = load i32, ptr addrspace(1) %in, align 4388 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 0, i32 24)389 %shl = shl i32 %bfe, 8390 %ashr = ashr i32 %shl, 8391 store i32 %ashr, ptr addrspace(1) %out, align 4392 ret void393}394 395; GCN-LABEL: @simplify_demanded_bfe_sdiv396; GCN: buffer_load_dword [[LOAD:v[0-9]+]]397; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 1, 16398; GCN: v_lshrrev_b32_e32 [[TMP0:v[0-9]+]], 31, [[BFE]]399; GCN: v_add_{{[iu]}}32_e32 [[TMP1:v[0-9]+]], vcc, [[BFE]], [[TMP0]]400; GCN: v_ashrrev_i32_e32 [[TMP2:v[0-9]+]], 1, [[TMP1]]401; GCN: buffer_store_dword [[TMP2]]402define amdgpu_kernel void @simplify_demanded_bfe_sdiv(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {403 %src = load i32, ptr addrspace(1) %in, align 4404 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %src, i32 1, i32 16)405 %div = sdiv i32 %bfe, 2406 store i32 %div, ptr addrspace(1) %out, align 4407 ret void408}409 410; GCN-LABEL: {{^}}bfe_0_width:411; GCN-NOT: {{[^@]}}bfe412; GCN: s_endpgm413define amdgpu_kernel void @bfe_0_width(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {414 %load = load i32, ptr addrspace(1) %ptr, align 4415 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 8, i32 0)416 store i32 %bfe, ptr addrspace(1) %out, align 4417 ret void418}419 420; GCN-LABEL: {{^}}bfe_8_bfe_8:421; GCN: v_bfe_i32422; GCN-NOT: {{[^@]}}bfe423; GCN: s_endpgm424define amdgpu_kernel void @bfe_8_bfe_8(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {425 %load = load i32, ptr addrspace(1) %ptr, align 4426 %bfe0 = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 0, i32 8)427 %bfe1 = call i32 @llvm.amdgcn.sbfe.i32(i32 %bfe0, i32 0, i32 8)428 store i32 %bfe1, ptr addrspace(1) %out, align 4429 ret void430}431 432; GCN-LABEL: {{^}}bfe_8_bfe_16:433; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8434; GCN: s_endpgm435define amdgpu_kernel void @bfe_8_bfe_16(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {436 %load = load i32, ptr addrspace(1) %ptr, align 4437 %bfe0 = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 0, i32 8)438 %bfe1 = call i32 @llvm.amdgcn.sbfe.i32(i32 %bfe0, i32 0, i32 16)439 store i32 %bfe1, ptr addrspace(1) %out, align 4440 ret void441}442 443; This really should be folded into 1444; GCN-LABEL: {{^}}bfe_16_bfe_8:445; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8446; GCN-NOT: {{[^@]}}bfe447; GCN: s_endpgm448define amdgpu_kernel void @bfe_16_bfe_8(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {449 %load = load i32, ptr addrspace(1) %ptr, align 4450 %bfe0 = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 0, i32 16)451 %bfe1 = call i32 @llvm.amdgcn.sbfe.i32(i32 %bfe0, i32 0, i32 8)452 store i32 %bfe1, ptr addrspace(1) %out, align 4453 ret void454}455 456; Make sure there isn't a redundant BFE457; GCN-LABEL: {{^}}sext_in_reg_i8_to_i32_bfe:458; GCN: s_sext_i32_i8 s{{[0-9]+}}, s{{[0-9]+}}459; GCN-NOT: {{[^@]}}bfe460; GCN: s_endpgm461define amdgpu_kernel void @sext_in_reg_i8_to_i32_bfe(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {462 %c = add i32 %a, %b ; add to prevent folding into extload463 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %c, i32 0, i32 8)464 %shl = shl i32 %bfe, 24465 %ashr = ashr i32 %shl, 24466 store i32 %ashr, ptr addrspace(1) %out, align 4467 ret void468}469 470; GCN-LABEL: {{^}}sext_in_reg_i8_to_i32_bfe_wrong:471define amdgpu_kernel void @sext_in_reg_i8_to_i32_bfe_wrong(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {472 %c = add i32 %a, %b ; add to prevent folding into extload473 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %c, i32 8, i32 0)474 %shl = shl i32 %bfe, 24475 %ashr = ashr i32 %shl, 24476 store i32 %ashr, ptr addrspace(1) %out, align 4477 ret void478}479 480; GCN-LABEL: {{^}}sextload_i8_to_i32_bfe:481; GCN: buffer_load_sbyte482; GCN-NOT: {{[^@]}}bfe483; GCN: s_endpgm484define amdgpu_kernel void @sextload_i8_to_i32_bfe(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {485 %load = load i8, ptr addrspace(1) %ptr, align 1486 %sext = sext i8 %load to i32487 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %sext, i32 0, i32 8)488 %shl = shl i32 %bfe, 24489 %ashr = ashr i32 %shl, 24490 store i32 %ashr, ptr addrspace(1) %out, align 4491 ret void492}493 494; GCN: .text495; GCN-LABEL: {{^}}sextload_i8_to_i32_bfe_0:{{.*$}}496; GCN-NOT: {{[^@]}}bfe497; GCN: s_endpgm498define amdgpu_kernel void @sextload_i8_to_i32_bfe_0(ptr addrspace(1) %out, ptr addrspace(1) %ptr) #0 {499 %load = load i8, ptr addrspace(1) %ptr, align 1500 %sext = sext i8 %load to i32501 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %sext, i32 8, i32 0)502 %shl = shl i32 %bfe, 24503 %ashr = ashr i32 %shl, 24504 store i32 %ashr, ptr addrspace(1) %out, align 4505 ret void506}507 508; GCN-LABEL: {{^}}sext_in_reg_i1_bfe_offset_0:509; GCN-NOT: shr510; GCN-NOT: shl511; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 1512; GCN: s_endpgm513define amdgpu_kernel void @sext_in_reg_i1_bfe_offset_0(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {514 %x = load i32, ptr addrspace(1) %in, align 4515 %shl = shl i32 %x, 31516 %shr = ashr i32 %shl, 31517 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shr, i32 0, i32 1)518 store i32 %bfe, ptr addrspace(1) %out, align 4519 ret void520}521 522; GCN-LABEL: {{^}}sext_in_reg_i1_bfe_offset_1:523; GCN: buffer_load_dword524; GCN-NOT: shl525; GCN-NOT: shr526; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 1, 1527; GCN: s_endpgm528define amdgpu_kernel void @sext_in_reg_i1_bfe_offset_1(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {529 %x = load i32, ptr addrspace(1) %in, align 4530 %shl = shl i32 %x, 30531 %shr = ashr i32 %shl, 30532 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shr, i32 1, i32 1)533 store i32 %bfe, ptr addrspace(1) %out, align 4534 ret void535}536 537; GCN-LABEL: {{^}}sext_in_reg_i2_bfe_offset_1:538; GCN: buffer_load_dword539; GCN-NOT: v_lshl540; GCN-NOT: v_ashr541; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 2542; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 1, 2543; GCN: s_endpgm544define amdgpu_kernel void @sext_in_reg_i2_bfe_offset_1(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {545 %x = load i32, ptr addrspace(1) %in, align 4546 %shl = shl i32 %x, 30547 %shr = ashr i32 %shl, 30548 %bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shr, i32 1, i32 2)549 store i32 %bfe, ptr addrspace(1) %out, align 4550 ret void551}552 553declare i32 @llvm.amdgcn.sbfe.i32(i32, i32, i32) #1554 555attributes #0 = { nounwind }556attributes #1 = { nounwind readnone }557