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1; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck %s --check-prefixes=GCN,GFX9062; RUN: llc -mtriple=amdgcn -mcpu=gfx908 < %s | FileCheck %s --check-prefixes=GCN,GFX9083; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 < %s | FileCheck %s --check-prefixes=GCN,GFX104; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 < %s | FileCheck %s --check-prefixes=GCN,GFX105; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 < %s | FileCheck %s --check-prefixes=GCN,GFX106; RUN: llc -mtriple=amdgcn -mcpu=gfx1031 < %s | FileCheck %s --check-prefixes=GCN,GFX107; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s --check-prefixes=GFX118 9declare i32 @llvm.amdgcn.sdot8(i32 %a, i32 %b, i32 %c, i1 %clamp)10 11; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot8_clamp12; GFX906: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}13; GFX908: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}14; GFX10: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}15; GFX11: v_dot8_i32_iu4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} neg_lo:[1,1,0] clamp{{$}}16define amdgpu_kernel void @test_llvm_amdgcn_sdot8_clamp(17 ptr addrspace(1) %r,18 ptr addrspace(1) %a,19 ptr addrspace(1) %b,20 ptr addrspace(1) %c) {21entry:22 %a.val = load <8 x i4>, ptr addrspace(1) %a23 %b.val = load <8 x i4>, ptr addrspace(1) %b24 %a.val.cast = bitcast <8 x i4> %a.val to i3225 %b.val.cast = bitcast <8 x i4> %b.val to i3226 %c.val = load i32, ptr addrspace(1) %c27 %r.val = call i32 @llvm.amdgcn.sdot8(i32 %a.val.cast, i32 %b.val.cast, i32 %c.val, i1 1)28 store i32 %r.val, ptr addrspace(1) %r29 ret void30}31 32; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot8_no_clamp33; GFX906: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}34; GFX908: v_dot8c_i32_i4_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}35; GFX10: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}36; GFX11: v_dot8_i32_iu4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} neg_lo:[1,1,0]{{$}}37define amdgpu_kernel void @test_llvm_amdgcn_sdot8_no_clamp(38 ptr addrspace(1) %r,39 ptr addrspace(1) %a,40 ptr addrspace(1) %b,41 ptr addrspace(1) %c) {42entry:43 %a.val = load <8 x i4>, ptr addrspace(1) %a44 %b.val = load <8 x i4>, ptr addrspace(1) %b45 %a.val.cast = bitcast <8 x i4> %a.val to i3246 %b.val.cast = bitcast <8 x i4> %b.val to i3247 %c.val = load i32, ptr addrspace(1) %c48 %r.val = call i32 @llvm.amdgcn.sdot8(i32 %a.val.cast, i32 %b.val.cast, i32 %c.val, i1 0)49 store i32 %r.val, ptr addrspace(1) %r50 ret void51}52