515 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -early-live-intervals < %s | FileCheck -check-prefix=GCN %s4 5define amdgpu_kernel void @set_inactive(ptr addrspace(1) %out, i32 %in) {6; GCN-LABEL: set_inactive:7; GCN: ; %bb.0:8; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c9; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2410; GCN-NEXT: s_mov_b32 s3, 0xf00011; GCN-NEXT: s_mov_b32 s2, -112; GCN-NEXT: s_waitcnt lgkmcnt(0)13; GCN-NEXT: v_mov_b32_e32 v1, s614; GCN-NEXT: s_or_saveexec_b64 s[4:5], -115; GCN-NEXT: v_cndmask_b32_e64 v0, 42, v1, s[4:5]16; GCN-NEXT: s_mov_b64 exec, s[4:5]17; GCN-NEXT: v_mov_b32_e32 v1, v018; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 019; GCN-NEXT: s_endpgm20 %tmp.0 = call i32 @llvm.amdgcn.set.inactive.i32(i32 %in, i32 42) #021 %tmp = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %tmp.0)22 store i32 %tmp, ptr addrspace(1) %out23 ret void24}25 26define amdgpu_kernel void @set_inactive_imm_poison(ptr addrspace(1) %out) {27; GCN-LABEL: set_inactive_imm_poison:28; GCN: ; %bb.0:29; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2430; GCN-NEXT: v_mov_b32_e32 v0, 131; GCN-NEXT: s_mov_b32 s3, 0xf00032; GCN-NEXT: s_mov_b32 s2, -133; GCN-NEXT: v_mov_b32_e32 v1, v034; GCN-NEXT: s_waitcnt lgkmcnt(0)35; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 036; GCN-NEXT: s_endpgm37 %tmp.0 = call i32 @llvm.amdgcn.set.inactive.i32(i32 1, i32 poison) #038 %tmp = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %tmp.0)39 store i32 %tmp, ptr addrspace(1) %out40 ret void41}42 43define amdgpu_kernel void @set_inactive_64(ptr addrspace(1) %out, i64 %in) {44; GCN-LABEL: set_inactive_64:45; GCN: ; %bb.0:46; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2447; GCN-NEXT: s_mov_b32 s7, 0xf00048; GCN-NEXT: s_mov_b32 s6, -149; GCN-NEXT: s_waitcnt lgkmcnt(0)50; GCN-NEXT: s_mov_b32 s4, s051; GCN-NEXT: s_mov_b32 s5, s152; GCN-NEXT: v_mov_b32_e32 v2, s353; GCN-NEXT: s_or_saveexec_b64 s[0:1], -154; GCN-NEXT: v_cndmask_b32_e64 v1, 0, v2, s[0:1]55; GCN-NEXT: s_mov_b64 exec, s[0:1]56; GCN-NEXT: v_mov_b32_e32 v2, s257; GCN-NEXT: s_or_saveexec_b64 s[0:1], -158; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v2, s[0:1]59; GCN-NEXT: s_mov_b64 exec, s[0:1]60; GCN-NEXT: v_mov_b32_e32 v2, v061; GCN-NEXT: v_mov_b32_e32 v3, v162; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 063; GCN-NEXT: s_endpgm64 %tmp.0 = call i64 @llvm.amdgcn.set.inactive.i64(i64 %in, i64 0) #065 %tmp = call i64 @llvm.amdgcn.strict.wwm.i64(i64 %tmp.0)66 store i64 %tmp, ptr addrspace(1) %out67 ret void68}69 70define amdgpu_kernel void @set_inactive_imm_poison_64(ptr addrspace(1) %out) {71; GCN-LABEL: set_inactive_imm_poison_64:72; GCN: ; %bb.0:73; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2474; GCN-NEXT: v_mov_b32_e32 v0, 175; GCN-NEXT: v_mov_b32_e32 v1, 076; GCN-NEXT: v_mov_b32_e32 v2, v077; GCN-NEXT: s_mov_b32 s3, 0xf00078; GCN-NEXT: s_mov_b32 s2, -179; GCN-NEXT: v_mov_b32_e32 v3, v180; GCN-NEXT: s_waitcnt lgkmcnt(0)81; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[0:3], 082; GCN-NEXT: s_endpgm83 %tmp.0 = call i64 @llvm.amdgcn.set.inactive.i64(i64 1, i64 poison) #084 %tmp = call i64 @llvm.amdgcn.strict.wwm.i64(i64 %tmp.0)85 store i64 %tmp, ptr addrspace(1) %out86 ret void87}88 89define amdgpu_kernel void @set_inactive_scc(ptr addrspace(1) %out, i32 %in, <4 x i32> inreg %desc) {90; GCN-LABEL: set_inactive_scc:91; GCN: ; %bb.0:92; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x3493; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c94; GCN-NEXT: s_waitcnt lgkmcnt(0)95; GCN-NEXT: s_buffer_load_dword s7, s[0:3], 0x096; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2497; GCN-NEXT: v_mov_b32_e32 v1, s698; GCN-NEXT: s_or_saveexec_b64 s[2:3], -199; GCN-NEXT: v_cndmask_b32_e64 v0, 42, v1, s[2:3]100; GCN-NEXT: s_mov_b64 exec, s[2:3]101; GCN-NEXT: s_waitcnt lgkmcnt(0)102; GCN-NEXT: s_cmp_lg_u32 s7, 56103; GCN-NEXT: v_mov_b32_e32 v1, v0104; GCN-NEXT: s_mov_b64 s[2:3], -1105; GCN-NEXT: s_cbranch_scc1 .LBB4_3106; GCN-NEXT: ; %bb.1: ; %Flow107; GCN-NEXT: s_andn2_b64 vcc, exec, s[2:3]108; GCN-NEXT: s_cbranch_vccz .LBB4_4109; GCN-NEXT: .LBB4_2: ; %.exit110; GCN-NEXT: s_endpgm111; GCN-NEXT: .LBB4_3: ; %.one112; GCN-NEXT: v_add_u32_e32 v2, vcc, 1, v1113; GCN-NEXT: s_mov_b32 s3, 0xf000114; GCN-NEXT: s_mov_b32 s2, -1115; GCN-NEXT: buffer_store_dword v2, off, s[0:3], 0116; GCN-NEXT: s_cbranch_execnz .LBB4_2117; GCN-NEXT: .LBB4_4: ; %.zero118; GCN-NEXT: s_mov_b32 s3, 0xf000119; GCN-NEXT: s_mov_b32 s2, -1120; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0121; GCN-NEXT: s_endpgm122 %val = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %desc, i32 0, i32 0)123 %cmp = icmp eq i32 %val, 56124 %tmp.0 = call i32 @llvm.amdgcn.set.inactive.i32(i32 %in, i32 42) #0125 %tmp = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %tmp.0)126 br i1 %cmp, label %.zero, label %.one127 128.zero:129 store i32 %tmp, ptr addrspace(1) %out130 br label %.exit131 132.one:133 %tmp.1 = add i32 %tmp, 1134 store i32 %tmp.1, ptr addrspace(1) %out135 br label %.exit136 137.exit:138 ret void139}140 141define amdgpu_kernel void @set_inactive_f32(ptr addrspace(1) %out, float %in) {142; GCN-LABEL: set_inactive_f32:143; GCN: ; %bb.0:144; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c145; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24146; GCN-NEXT: s_mov_b32 s3, 0xf000147; GCN-NEXT: s_mov_b32 s2, -1148; GCN-NEXT: s_waitcnt lgkmcnt(0)149; GCN-NEXT: v_mov_b32_e32 v1, s6150; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1151; GCN-NEXT: v_mov_b32_e32 v0, 0x40400000152; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]153; GCN-NEXT: s_mov_b64 exec, s[4:5]154; GCN-NEXT: v_mov_b32_e32 v1, v0155; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0156; GCN-NEXT: s_endpgm157 %tmp.0 = call float @llvm.amdgcn.set.inactive.f32(float %in, float 3.0) #0158 %tmp = call float @llvm.amdgcn.strict.wwm.f32(float %tmp.0)159 store float %tmp, ptr addrspace(1) %out160 ret void161}162 163define amdgpu_kernel void @set_inactive_f64(ptr addrspace(1) %out, double %in) {164; GCN-LABEL: set_inactive_f64:165; GCN: ; %bb.0:166; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24167; GCN-NEXT: s_mov_b32 s7, 0xf000168; GCN-NEXT: s_mov_b32 s6, -1169; GCN-NEXT: s_waitcnt lgkmcnt(0)170; GCN-NEXT: s_mov_b32 s4, s0171; GCN-NEXT: s_mov_b32 s5, s1172; GCN-NEXT: v_mov_b32_e32 v2, s3173; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1174; GCN-NEXT: v_mov_b32_e32 v0, 0x4010cccc175; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v2, s[0:1]176; GCN-NEXT: s_mov_b64 exec, s[0:1]177; GCN-NEXT: v_mov_b32_e32 v2, s2178; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1179; GCN-NEXT: v_mov_b32_e32 v0, 0xcccccccd180; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]181; GCN-NEXT: s_mov_b64 exec, s[0:1]182; GCN-NEXT: v_mov_b32_e32 v2, v0183; GCN-NEXT: v_mov_b32_e32 v3, v1184; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0185; GCN-NEXT: s_endpgm186 %tmp.0 = call double @llvm.amdgcn.set.inactive.f64(double %in, double 4.2) #0187 %tmp = call double @llvm.amdgcn.strict.wwm.f64(double %tmp.0)188 store double %tmp, ptr addrspace(1) %out189 ret void190}191 192define amdgpu_kernel void @set_inactive_v2i16(ptr addrspace(1) %out, <2 x i16> %in) {193; GCN-LABEL: set_inactive_v2i16:194; GCN: ; %bb.0:195; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c196; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24197; GCN-NEXT: s_mov_b32 s3, 0xf000198; GCN-NEXT: s_mov_b32 s2, -1199; GCN-NEXT: s_waitcnt lgkmcnt(0)200; GCN-NEXT: v_mov_b32_e32 v1, s6201; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1202; GCN-NEXT: v_mov_b32_e32 v0, 0x10001203; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]204; GCN-NEXT: s_mov_b64 exec, s[4:5]205; GCN-NEXT: v_mov_b32_e32 v1, v0206; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0207; GCN-NEXT: s_endpgm208 %tmp.0 = call <2 x i16> @llvm.amdgcn.set.inactive.v2i16(<2 x i16> %in, <2 x i16> <i16 1, i16 1>) #0209 %tmp = call <2 x i16> @llvm.amdgcn.strict.wwm.v2i16(<2 x i16> %tmp.0)210 store <2 x i16> %tmp, ptr addrspace(1) %out211 ret void212}213 214define amdgpu_kernel void @set_inactive_v2f16(ptr addrspace(1) %out, <2 x half> %in) {215; GCN-LABEL: set_inactive_v2f16:216; GCN: ; %bb.0:217; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c218; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24219; GCN-NEXT: s_mov_b32 s3, 0xf000220; GCN-NEXT: s_mov_b32 s2, -1221; GCN-NEXT: s_waitcnt lgkmcnt(0)222; GCN-NEXT: v_mov_b32_e32 v1, s6223; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1224; GCN-NEXT: v_mov_b32_e32 v0, 0x3c003c00225; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]226; GCN-NEXT: s_mov_b64 exec, s[4:5]227; GCN-NEXT: v_mov_b32_e32 v1, v0228; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0229; GCN-NEXT: s_endpgm230 %tmp.0 = call <2 x half> @llvm.amdgcn.set.inactive.v2f16(<2 x half> %in, <2 x half> <half 1.0, half 1.0>) #0231 %tmp = call <2 x half> @llvm.amdgcn.strict.wwm.v2i16(<2 x half> %tmp.0)232 store <2 x half> %tmp, ptr addrspace(1) %out233 ret void234}235 236define amdgpu_kernel void @set_inactive_v2i32(ptr addrspace(1) %out, <2 x i32> %in) {237; GCN-LABEL: set_inactive_v2i32:238; GCN: ; %bb.0:239; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24240; GCN-NEXT: s_mov_b32 s7, 0xf000241; GCN-NEXT: s_mov_b32 s6, -1242; GCN-NEXT: s_waitcnt lgkmcnt(0)243; GCN-NEXT: s_mov_b32 s4, s0244; GCN-NEXT: s_mov_b32 s5, s1245; GCN-NEXT: v_mov_b32_e32 v2, s3246; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1247; GCN-NEXT: v_cndmask_b32_e64 v1, 1, v2, s[0:1]248; GCN-NEXT: s_mov_b64 exec, s[0:1]249; GCN-NEXT: v_mov_b32_e32 v2, s2250; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1251; GCN-NEXT: v_cndmask_b32_e64 v0, 1, v2, s[0:1]252; GCN-NEXT: s_mov_b64 exec, s[0:1]253; GCN-NEXT: v_mov_b32_e32 v2, v0254; GCN-NEXT: v_mov_b32_e32 v3, v1255; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0256; GCN-NEXT: s_endpgm257 %tmp.0 = call <2 x i32> @llvm.amdgcn.set.inactive.v2i32(<2 x i32> %in, <2 x i32> <i32 1, i32 1>) #0258 %tmp = call <2 x i32> @llvm.amdgcn.strict.wwm.v2i32(<2 x i32> %tmp.0)259 store <2 x i32> %tmp, ptr addrspace(1) %out260 ret void261}262 263define amdgpu_kernel void @set_inactive_v2f32(ptr addrspace(1) %out, <2 x float> %in) {264; GCN-LABEL: set_inactive_v2f32:265; GCN: ; %bb.0:266; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24267; GCN-NEXT: s_mov_b32 s7, 0xf000268; GCN-NEXT: s_mov_b32 s6, -1269; GCN-NEXT: s_waitcnt lgkmcnt(0)270; GCN-NEXT: s_mov_b32 s4, s0271; GCN-NEXT: s_mov_b32 s5, s1272; GCN-NEXT: v_mov_b32_e32 v2, s3273; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1274; GCN-NEXT: v_cndmask_b32_e64 v1, 1.0, v2, s[0:1]275; GCN-NEXT: s_mov_b64 exec, s[0:1]276; GCN-NEXT: v_mov_b32_e32 v2, s2277; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1278; GCN-NEXT: v_cndmask_b32_e64 v0, 1.0, v2, s[0:1]279; GCN-NEXT: s_mov_b64 exec, s[0:1]280; GCN-NEXT: v_mov_b32_e32 v2, v0281; GCN-NEXT: v_mov_b32_e32 v3, v1282; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0283; GCN-NEXT: s_endpgm284 %tmp.0 = call <2 x float> @llvm.amdgcn.set.inactive.v2f32(<2 x float> %in, <2 x float> <float 1.0, float 1.0>) #0285 %tmp = call <2 x float> @llvm.amdgcn.strict.wwm.v2f32(<2 x float> %tmp.0)286 store <2 x float> %tmp, ptr addrspace(1) %out287 ret void288}289 290define amdgpu_kernel void @set_inactive_v2bf16(ptr addrspace(1) %out, <2 x bfloat> %in) {291; GCN-LABEL: set_inactive_v2bf16:292; GCN: ; %bb.0:293; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c294; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24295; GCN-NEXT: s_mov_b32 s3, 0xf000296; GCN-NEXT: s_mov_b32 s2, -1297; GCN-NEXT: s_waitcnt lgkmcnt(0)298; GCN-NEXT: v_mov_b32_e32 v1, s6299; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1300; GCN-NEXT: v_mov_b32_e32 v0, 0x3f803f80301; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]302; GCN-NEXT: s_mov_b64 exec, s[4:5]303; GCN-NEXT: v_mov_b32_e32 v1, v0304; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0305; GCN-NEXT: s_endpgm306 %tmp.0 = call <2 x bfloat> @llvm.amdgcn.set.inactive.v2bf16(<2 x bfloat> %in, <2 x bfloat> <bfloat 1.0, bfloat 1.0>) #0307 %tmp = call <2 x bfloat> @llvm.amdgcn.strict.wwm.v2bf16(<2 x bfloat> %tmp.0)308 store <2 x bfloat> %tmp, ptr addrspace(1) %out309 ret void310}311 312define amdgpu_kernel void @set_inactive_v4i16(ptr addrspace(1) %out, <4 x i16> %in) {313; GCN-LABEL: set_inactive_v4i16:314; GCN: ; %bb.0:315; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24316; GCN-NEXT: s_mov_b32 s7, 0xf000317; GCN-NEXT: s_mov_b32 s6, -1318; GCN-NEXT: s_waitcnt lgkmcnt(0)319; GCN-NEXT: s_mov_b32 s4, s0320; GCN-NEXT: s_mov_b32 s5, s1321; GCN-NEXT: v_mov_b32_e32 v2, s3322; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1323; GCN-NEXT: v_mov_b32_e32 v0, 0x10001324; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v2, s[0:1]325; GCN-NEXT: s_mov_b64 exec, s[0:1]326; GCN-NEXT: v_mov_b32_e32 v2, s2327; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1328; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]329; GCN-NEXT: s_mov_b64 exec, s[0:1]330; GCN-NEXT: v_mov_b32_e32 v2, v0331; GCN-NEXT: v_mov_b32_e32 v3, v1332; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0333; GCN-NEXT: s_endpgm334 %tmp.0 = call <4 x i16> @llvm.amdgcn.set.inactive.v4i16(<4 x i16> %in, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) #0335 %tmp = call <4 x i16> @llvm.amdgcn.strict.wwm.v4i16(<4 x i16> %tmp.0)336 store <4 x i16> %tmp, ptr addrspace(1) %out337 ret void338}339 340define amdgpu_kernel void @set_inactive_v4f16(ptr addrspace(1) %out, <4 x half> %in) {341; GCN-LABEL: set_inactive_v4f16:342; GCN: ; %bb.0:343; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24344; GCN-NEXT: s_mov_b32 s7, 0xf000345; GCN-NEXT: s_mov_b32 s6, -1346; GCN-NEXT: s_waitcnt lgkmcnt(0)347; GCN-NEXT: s_mov_b32 s4, s0348; GCN-NEXT: s_mov_b32 s5, s1349; GCN-NEXT: v_mov_b32_e32 v2, s3350; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1351; GCN-NEXT: v_mov_b32_e32 v0, 0x3c003c00352; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v2, s[0:1]353; GCN-NEXT: s_mov_b64 exec, s[0:1]354; GCN-NEXT: v_mov_b32_e32 v2, s2355; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1356; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]357; GCN-NEXT: s_mov_b64 exec, s[0:1]358; GCN-NEXT: v_mov_b32_e32 v2, v0359; GCN-NEXT: v_mov_b32_e32 v3, v1360; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0361; GCN-NEXT: s_endpgm362 %tmp.0 = call <4 x half> @llvm.amdgcn.set.inactive.v4f16(<4 x half> %in, <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>) #0363 %tmp = call <4 x half> @llvm.amdgcn.strict.wwm.v4f16(<4 x half> %tmp.0)364 store <4 x half> %tmp, ptr addrspace(1) %out365 ret void366}367 368define amdgpu_kernel void @set_inactive_v4bf16(ptr addrspace(1) %out, <4 x bfloat> %in) {369; GCN-LABEL: set_inactive_v4bf16:370; GCN: ; %bb.0:371; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24372; GCN-NEXT: s_mov_b32 s7, 0xf000373; GCN-NEXT: s_mov_b32 s6, -1374; GCN-NEXT: s_waitcnt lgkmcnt(0)375; GCN-NEXT: s_mov_b32 s4, s0376; GCN-NEXT: s_mov_b32 s5, s1377; GCN-NEXT: v_mov_b32_e32 v2, s3378; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1379; GCN-NEXT: v_mov_b32_e32 v0, 0x3f803f80380; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v2, s[0:1]381; GCN-NEXT: s_mov_b64 exec, s[0:1]382; GCN-NEXT: v_mov_b32_e32 v2, s2383; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1384; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]385; GCN-NEXT: s_mov_b64 exec, s[0:1]386; GCN-NEXT: v_mov_b32_e32 v2, v0387; GCN-NEXT: v_mov_b32_e32 v3, v1388; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0389; GCN-NEXT: s_endpgm390 %tmp.0 = call <4 x bfloat> @llvm.amdgcn.set.inactive.v4bf16(<4 x bfloat> %in, <4 x bfloat> <bfloat 1.0, bfloat 1.0, bfloat 1.0, bfloat 1.0>) #0391 %tmp = call <4 x bfloat> @llvm.amdgcn.strict.wwm.v4bf16(<4 x bfloat> %tmp.0)392 store <4 x bfloat> %tmp, ptr addrspace(1) %out393 ret void394}395 396define amdgpu_kernel void @set_inactive_p0(ptr addrspace(1) %out, ptr %in) {397; GCN-LABEL: set_inactive_p0:398; GCN: ; %bb.0:399; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24400; GCN-NEXT: s_mov_b32 s7, 0xf000401; GCN-NEXT: s_mov_b32 s6, -1402; GCN-NEXT: s_waitcnt lgkmcnt(0)403; GCN-NEXT: s_mov_b32 s4, s0404; GCN-NEXT: s_mov_b32 s5, s1405; GCN-NEXT: v_mov_b32_e32 v2, s3406; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1407; GCN-NEXT: v_cndmask_b32_e64 v1, 0, v2, s[0:1]408; GCN-NEXT: s_mov_b64 exec, s[0:1]409; GCN-NEXT: v_mov_b32_e32 v2, s2410; GCN-NEXT: s_or_saveexec_b64 s[0:1], -1411; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v2, s[0:1]412; GCN-NEXT: s_mov_b64 exec, s[0:1]413; GCN-NEXT: v_mov_b32_e32 v2, v0414; GCN-NEXT: v_mov_b32_e32 v3, v1415; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0416; GCN-NEXT: s_endpgm417 %tmp.0 = call ptr @llvm.amdgcn.set.inactive.p0(ptr %in, ptr null) #0418 %tmp = call ptr @llvm.amdgcn.strict.wwm.p0(ptr %tmp.0)419 store ptr %tmp, ptr addrspace(1) %out420 ret void421}422 423define amdgpu_kernel void @set_inactive_p2(ptr addrspace(1) %out, ptr addrspace(2) %in) {424; GCN-LABEL: set_inactive_p2:425; GCN: ; %bb.0:426; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c427; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24428; GCN-NEXT: s_mov_b32 s3, 0xf000429; GCN-NEXT: s_mov_b32 s2, -1430; GCN-NEXT: s_waitcnt lgkmcnt(0)431; GCN-NEXT: v_mov_b32_e32 v1, s6432; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1433; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[4:5]434; GCN-NEXT: s_mov_b64 exec, s[4:5]435; GCN-NEXT: v_mov_b32_e32 v1, v0436; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0437; GCN-NEXT: s_endpgm438 %tmp.0 = call ptr addrspace(2) @llvm.amdgcn.set.inactive.p2(ptr addrspace(2) %in, ptr addrspace(2) null) #0439 %tmp = call ptr addrspace(2) @llvm.amdgcn.strict.wwm.p2(ptr addrspace(2) %tmp.0)440 store ptr addrspace(2) %tmp, ptr addrspace(1) %out441 ret void442}443 444define amdgpu_kernel void @set_inactive_p3(ptr addrspace(1) %out, ptr addrspace(3) %in) {445; GCN-LABEL: set_inactive_p3:446; GCN: ; %bb.0:447; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c448; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24449; GCN-NEXT: s_mov_b32 s3, 0xf000450; GCN-NEXT: s_mov_b32 s2, -1451; GCN-NEXT: s_waitcnt lgkmcnt(0)452; GCN-NEXT: v_mov_b32_e32 v1, s6453; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1454; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[4:5]455; GCN-NEXT: s_mov_b64 exec, s[4:5]456; GCN-NEXT: v_mov_b32_e32 v1, v0457; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0458; GCN-NEXT: s_endpgm459 %tmp.0 = call ptr addrspace(3) @llvm.amdgcn.set.inactive.p3(ptr addrspace(3) %in, ptr addrspace(3) null) #0460 %tmp = call ptr addrspace(3) @llvm.amdgcn.strict.wwm.p3(ptr addrspace(3) %tmp.0)461 store ptr addrspace(3) %tmp, ptr addrspace(1) %out462 ret void463}464 465define amdgpu_kernel void @set_inactive_p5(ptr addrspace(1) %out, ptr addrspace(5) %in) {466; GCN-LABEL: set_inactive_p5:467; GCN: ; %bb.0:468; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c469; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24470; GCN-NEXT: s_mov_b32 s3, 0xf000471; GCN-NEXT: s_mov_b32 s2, -1472; GCN-NEXT: s_waitcnt lgkmcnt(0)473; GCN-NEXT: v_mov_b32_e32 v1, s6474; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1475; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[4:5]476; GCN-NEXT: s_mov_b64 exec, s[4:5]477; GCN-NEXT: v_mov_b32_e32 v1, v0478; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0479; GCN-NEXT: s_endpgm480 %tmp.0 = call ptr addrspace(5) @llvm.amdgcn.set.inactive.p5(ptr addrspace(5) %in, ptr addrspace(5) null) #0481 %tmp = call ptr addrspace(5) @llvm.amdgcn.strict.wwm.p5(ptr addrspace(5) %tmp.0)482 store ptr addrspace(5) %tmp, ptr addrspace(1) %out483 ret void484}485 486define amdgpu_kernel void @set_inactive_p6(ptr addrspace(1) %out, ptr addrspace(6) %in) {487; GCN-LABEL: set_inactive_p6:488; GCN: ; %bb.0:489; GCN-NEXT: s_load_dword s6, s[4:5], 0x2c490; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24491; GCN-NEXT: s_mov_b32 s3, 0xf000492; GCN-NEXT: s_mov_b32 s2, -1493; GCN-NEXT: s_waitcnt lgkmcnt(0)494; GCN-NEXT: v_mov_b32_e32 v1, s6495; GCN-NEXT: s_or_saveexec_b64 s[4:5], -1496; GCN-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[4:5]497; GCN-NEXT: s_mov_b64 exec, s[4:5]498; GCN-NEXT: v_mov_b32_e32 v1, v0499; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0500; GCN-NEXT: s_endpgm501 %tmp.0 = call ptr addrspace(6) @llvm.amdgcn.set.inactive.p6(ptr addrspace(6) %in, ptr addrspace(6) null) #0502 %tmp = call ptr addrspace(6) @llvm.amdgcn.strict.wwm.p6(ptr addrspace(6) %tmp.0)503 store ptr addrspace(6) %tmp, ptr addrspace(1) %out504 ret void505}506 507declare i32 @llvm.amdgcn.set.inactive.i32(i32, i32) #0508declare i64 @llvm.amdgcn.set.inactive.i64(i64, i64) #0509declare i32 @llvm.amdgcn.strict.wwm.i32(i32) #1510declare i64 @llvm.amdgcn.strict.wwm.i64(i64) #1511declare i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32>, i32, i32)512 513attributes #0 = { convergent readnone }514attributes #1 = { convergent nounwind readnone speculatable willreturn }515