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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=gfx1010 -mtriple=amdgcn-- < %s | FileCheck -check-prefix=GFX10 %s3; RUN: llc -mcpu=gfx900 -mtriple=amdgcn-- < %s | FileCheck -check-prefix=GFX9 %s4; RUN: llc -mcpu=gfx810 -mtriple=amdgcn-- < %s | FileCheck -check-prefix=GFX8 %s5; RUN: llc -mcpu=gfx1100 -mattr=+real-true16 -mtriple=amdgcn-- < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mcpu=gfx1100 -mattr=-real-true16 -mtriple=amdgcn-- < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s7; RUN: llc -mcpu=gfx1200 -mattr=+real-true16 -mtriple=amdgcn-- < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s8; RUN: llc -mcpu=gfx1200 -mattr=-real-true16 -mtriple=amdgcn-- < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s9 10@esgs_ring = external addrspace(3) global [0 x i32], align 6553611 12define amdgpu_gs void @main(<4 x i32> %arg, i32 %arg1) {13; GFX10-LABEL: main:14; GFX10: ; %bb.0: ; %bb15; GFX10-NEXT: s_mov_b32 s1, exec_lo16; GFX10-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=117; GFX10-NEXT: v_readfirstlane_b32 s4, v018; GFX10-NEXT: v_readfirstlane_b32 s5, v119; GFX10-NEXT: v_readfirstlane_b32 s6, v220; GFX10-NEXT: v_readfirstlane_b32 s7, v321; GFX10-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]22; GFX10-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]23; GFX10-NEXT: s_and_b32 s0, vcc_lo, s024; GFX10-NEXT: s_and_saveexec_b32 s0, s025; GFX10-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen26; GFX10-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr327; GFX10-NEXT: ; implicit-def: $vgpr428; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)29; GFX10-NEXT: s_xor_b32 exec_lo, exec_lo, s030; GFX10-NEXT: s_cbranch_execnz .LBB0_131; GFX10-NEXT: ; %bb.2:32; GFX10-NEXT: s_mov_b32 exec_lo, s133; GFX10-NEXT: s_waitcnt vmcnt(0)34; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v535; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v636; GFX10-NEXT: v_mov_b32_e32 v2, 037; GFX10-NEXT: s_waitcnt_vscnt null, 0x038; GFX10-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:839;40; GFX9-LABEL: main:41; GFX9: ; %bb.0: ; %bb42; GFX9-NEXT: s_mov_b64 s[2:3], exec43; GFX9-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=144; GFX9-NEXT: v_readfirstlane_b32 s4, v045; GFX9-NEXT: v_readfirstlane_b32 s5, v146; GFX9-NEXT: v_readfirstlane_b32 s6, v247; GFX9-NEXT: v_readfirstlane_b32 s7, v348; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1]49; GFX9-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3]50; GFX9-NEXT: s_and_b64 s[0:1], vcc, s[0:1]51; GFX9-NEXT: s_and_saveexec_b64 s[0:1], s[0:1]52; GFX9-NEXT: s_nop 053; GFX9-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen54; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr355; GFX9-NEXT: ; implicit-def: $vgpr456; GFX9-NEXT: s_xor_b64 exec, exec, s[0:1]57; GFX9-NEXT: s_cbranch_execnz .LBB0_158; GFX9-NEXT: ; %bb.2:59; GFX9-NEXT: s_mov_b64 exec, s[2:3]60; GFX9-NEXT: s_waitcnt vmcnt(0)61; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v562; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v663; GFX9-NEXT: v_mov_b32_e32 v2, 064; GFX9-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:865;66; GFX8-LABEL: main:67; GFX8: ; %bb.0: ; %bb68; GFX8-NEXT: s_mov_b64 s[2:3], exec69; GFX8-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=170; GFX8-NEXT: v_readfirstlane_b32 s4, v071; GFX8-NEXT: v_readfirstlane_b32 s5, v172; GFX8-NEXT: v_readfirstlane_b32 s6, v273; GFX8-NEXT: v_readfirstlane_b32 s7, v374; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1]75; GFX8-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3]76; GFX8-NEXT: s_and_b64 s[0:1], vcc, s[0:1]77; GFX8-NEXT: s_and_saveexec_b64 s[0:1], s[0:1]78; GFX8-NEXT: s_nop 079; GFX8-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen80; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr381; GFX8-NEXT: ; implicit-def: $vgpr482; GFX8-NEXT: s_xor_b64 exec, exec, s[0:1]83; GFX8-NEXT: s_cbranch_execnz .LBB0_184; GFX8-NEXT: ; %bb.2:85; GFX8-NEXT: s_mov_b64 exec, s[2:3]86; GFX8-NEXT: s_waitcnt vmcnt(0)87; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v588; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v689; GFX8-NEXT: v_mov_b32_e32 v2, 090; GFX8-NEXT: s_mov_b32 m0, -191; GFX8-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:892;93; GFX11-TRUE16-LABEL: main:94; GFX11-TRUE16: ; %bb.0: ; %bb95; GFX11-TRUE16-NEXT: s_mov_b32 s1, exec_lo96; GFX11-TRUE16-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=197; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v098; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v199; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2100; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3101; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)102; GFX11-TRUE16-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]103; GFX11-TRUE16-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]104; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0105; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)106; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, s0107; GFX11-TRUE16-NEXT: buffer_load_d16_format_xyz v[5:6], v4, s[4:7], 0 idxen108; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3109; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4110; GFX11-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0111; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB0_1112; GFX11-TRUE16-NEXT: ; %bb.2:113; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1114; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0115; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)116; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h117; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0xffff, v6118; GFX11-TRUE16-NEXT: ds_store_2addr_b32 v2, v0, v1 offset0:7 offset1:8119;120; GFX11-FAKE16-LABEL: main:121; GFX11-FAKE16: ; %bb.0: ; %bb122; GFX11-FAKE16-NEXT: s_mov_b32 s1, exec_lo123; GFX11-FAKE16-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1124; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v0125; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v1126; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v2127; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v3128; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)129; GFX11-FAKE16-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]130; GFX11-FAKE16-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]131; GFX11-FAKE16-NEXT: s_and_b32 s0, vcc_lo, s0132; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)133; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, s0134; GFX11-FAKE16-NEXT: buffer_load_d16_format_xyz v[5:6], v4, s[4:7], 0 idxen135; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3136; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr4137; GFX11-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0138; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB0_1139; GFX11-FAKE16-NEXT: ; %bb.2:140; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1141; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)142; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v5143; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0xffff, v6144; GFX11-FAKE16-NEXT: ds_store_2addr_b32 v2, v0, v1 offset0:7 offset1:8145;146; GFX12-TRUE16-LABEL: main:147; GFX12-TRUE16: ; %bb.0: ; %bb148; GFX12-TRUE16-NEXT: s_mov_b32 s1, exec_lo149; GFX12-TRUE16-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1150; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s4, v0151; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s5, v1152; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s6, v2153; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s7, v3154; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)155; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)156; GFX12-TRUE16-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]157; GFX12-TRUE16-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]158; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0159; GFX12-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)160; GFX12-TRUE16-NEXT: s_and_saveexec_b32 s0, s0161; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0162; GFX12-TRUE16-NEXT: buffer_load_d16_format_xyz v[5:6], v4, s[4:7], null idxen163; GFX12-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3164; GFX12-TRUE16-NEXT: ; implicit-def: $vgpr4165; GFX12-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0166; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB0_1167; GFX12-TRUE16-NEXT: ; %bb.2:168; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s1169; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0170; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0171; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h172; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0xffff, v6173; GFX12-TRUE16-NEXT: ds_store_2addr_b32 v2, v0, v1 offset0:7 offset1:8174;175; GFX12-FAKE16-LABEL: main:176; GFX12-FAKE16: ; %bb.0: ; %bb177; GFX12-FAKE16-NEXT: s_mov_b32 s1, exec_lo178; GFX12-FAKE16-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1179; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s4, v0180; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s5, v1181; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s6, v2182; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s7, v3183; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)184; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)185; GFX12-FAKE16-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]186; GFX12-FAKE16-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]187; GFX12-FAKE16-NEXT: s_and_b32 s0, vcc_lo, s0188; GFX12-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)189; GFX12-FAKE16-NEXT: s_and_saveexec_b32 s0, s0190; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0191; GFX12-FAKE16-NEXT: buffer_load_d16_format_xyz v[5:6], v4, s[4:7], null idxen192; GFX12-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3193; GFX12-FAKE16-NEXT: ; implicit-def: $vgpr4194; GFX12-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0195; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB0_1196; GFX12-FAKE16-NEXT: ; %bb.2:197; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s1198; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0199; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v5200; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0xffff, v6201; GFX12-FAKE16-NEXT: ds_store_2addr_b32 v2, v0, v1 offset0:7 offset1:8202bb:203 %i = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 poison)204 %i2 = call nsz arcp <3 x half> @llvm.amdgcn.struct.buffer.load.format.v3f16(<4 x i32> %arg, i32 %arg1, i32 0, i32 0, i32 0)205 %i3 = bitcast <3 x half> %i2 to <3 x i16>206 %i4 = extractelement <3 x i16> %i3, i32 1207 %i5 = bitcast <3 x half> %i2 to <3 x i16>208 %i6 = extractelement <3 x i16> %i5, i32 2209 %i7 = zext i16 %i4 to i32210 %i8 = zext i16 %i6 to i32211 %i9 = add nuw nsw i32 0, 7212 %i10 = getelementptr [0 x i32], ptr addrspace(3) @esgs_ring, i32 0, i32 %i9213 store i32 %i7, ptr addrspace(3) %i10, align 4214 %i11 = add nuw nsw i32 0, 8215 %i12 = getelementptr [0 x i32], ptr addrspace(3) @esgs_ring, i32 0, i32 %i11216 store i32 %i8, ptr addrspace(3) %i12, align 4217 unreachable218}219; Function Attrs: nounwind readnone willreturn220declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0221; Function Attrs: nounwind readonly willreturn222declare <3 x half> @llvm.amdgcn.struct.buffer.load.format.v3f16(<4 x i32>, i32, i32, i32, i32 immarg) #1223attributes #0 = { nounwind readnone willreturn }224attributes #1 = { nounwind readonly willreturn }225;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:226; GFX11: {{.*}}227; GFX12: {{.*}}228