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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-TRUE163; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE164; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-TRUE165; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE166; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL7; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL8; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX12,GFX12-SDAG-TRUE169; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX12,GFX12-FAKE1610; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX12,GFX12-GISEL-TRUE1611; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX12,GFX12-FAKE1612 13define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i32(ptr addrspace(8) %ptr, i32 %index) {14; GFX11-LABEL: struct_ptr_atomic_buffer_load_i32:15; GFX11: ; %bb.0: ; %bb16; GFX11-NEXT: s_clause 0x117; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x3418; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2419; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v020; GFX11-NEXT: s_mov_b32 s4, 021; GFX11-NEXT: s_waitcnt lgkmcnt(0)22; GFX11-NEXT: v_mov_b32_e32 v1, s623; GFX11-NEXT: .LBB0_1: ; %bb124; GFX11-NEXT: ; =>This Inner Loop Header: Depth=125; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 0 idxen glc26; GFX11-NEXT: s_waitcnt vmcnt(0)27; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v028; GFX11-NEXT: s_or_b32 s4, vcc_lo, s429; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)30; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s431; GFX11-NEXT: s_cbranch_execnz .LBB0_132; GFX11-NEXT: ; %bb.2: ; %bb233; GFX11-NEXT: s_endpgm34;35; GFX12-LABEL: struct_ptr_atomic_buffer_load_i32:36; GFX12: ; %bb.0: ; %bb37; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 138; GFX12-NEXT: s_clause 0x139; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x3440; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2441; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v042; GFX12-NEXT: s_wait_xcnt 0x043; GFX12-NEXT: s_mov_b32 s4, 044; GFX12-NEXT: s_wait_kmcnt 0x045; GFX12-NEXT: v_mov_b32_e32 v1, s646; GFX12-NEXT: .LBB0_1: ; %bb147; GFX12-NEXT: ; =>This Inner Loop Header: Depth=148; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null idxen th:TH_LOAD_NT49; GFX12-NEXT: s_wait_loadcnt 0x050; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v051; GFX12-NEXT: s_or_b32 s4, vcc_lo, s452; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)53; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s454; GFX12-NEXT: s_cbranch_execnz .LBB0_155; GFX12-NEXT: ; %bb.2: ; %bb256; GFX12-NEXT: s_endpgm57bb:58 %id = tail call i32 @llvm.amdgcn.workitem.id.x()59 br label %bb160bb1:61 %load = call i32 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 %index, i32 0, i32 0, i32 1)62 %cmp = icmp eq i32 %load, %id63 br i1 %cmp, label %bb1, label %bb264bb2:65 ret void66}67 68define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i32_const_idx(ptr addrspace(8) %ptr) {69; GFX11-LABEL: struct_ptr_atomic_buffer_load_i32_const_idx:70; GFX11: ; %bb.0: ; %bb71; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2472; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_and_b32 v0, 0x3ff, v073; GFX11-NEXT: s_mov_b32 s4, 074; GFX11-NEXT: .LBB1_1: ; %bb175; GFX11-NEXT: ; =>This Inner Loop Header: Depth=176; GFX11-NEXT: s_waitcnt lgkmcnt(0)77; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 0 idxen glc78; GFX11-NEXT: s_waitcnt vmcnt(0)79; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v080; GFX11-NEXT: s_or_b32 s4, vcc_lo, s481; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)82; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s483; GFX11-NEXT: s_cbranch_execnz .LBB1_184; GFX11-NEXT: ; %bb.2: ; %bb285; GFX11-NEXT: s_endpgm86;87; GFX12-LABEL: struct_ptr_atomic_buffer_load_i32_const_idx:88; GFX12: ; %bb.0: ; %bb89; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 190; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2491; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v092; GFX12-NEXT: v_mov_b32_e32 v1, 1593; GFX12-NEXT: s_wait_xcnt 0x094; GFX12-NEXT: s_mov_b32 s4, 095; GFX12-NEXT: .LBB1_1: ; %bb196; GFX12-NEXT: ; =>This Inner Loop Header: Depth=197; GFX12-NEXT: s_wait_kmcnt 0x098; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null idxen th:TH_LOAD_NT99; GFX12-NEXT: s_wait_loadcnt 0x0100; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0101; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4102; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)103; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4104; GFX12-NEXT: s_cbranch_execnz .LBB1_1105; GFX12-NEXT: ; %bb.2: ; %bb2106; GFX12-NEXT: s_endpgm107bb:108 %id = tail call i32 @llvm.amdgcn.workitem.id.x()109 br label %bb1110bb1:111 %load = call i32 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 15, i32 0, i32 0, i32 1)112 %cmp = icmp eq i32 %load, %id113 br i1 %cmp, label %bb1, label %bb2114bb2:115 ret void116}117 118define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i32_off(ptr addrspace(8) %ptr, i32 %index) {119; GFX11-LABEL: struct_ptr_atomic_buffer_load_i32_off:120; GFX11: ; %bb.0: ; %bb121; GFX11-NEXT: s_clause 0x1122; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34123; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24124; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0125; GFX11-NEXT: s_mov_b32 s4, 0126; GFX11-NEXT: s_waitcnt lgkmcnt(0)127; GFX11-NEXT: v_mov_b32_e32 v1, s6128; GFX11-NEXT: .LBB2_1: ; %bb1129; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1130; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 0 idxen glc131; GFX11-NEXT: s_waitcnt vmcnt(0)132; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0133; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4134; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)135; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4136; GFX11-NEXT: s_cbranch_execnz .LBB2_1137; GFX11-NEXT: ; %bb.2: ; %bb2138; GFX11-NEXT: s_endpgm139;140; GFX12-LABEL: struct_ptr_atomic_buffer_load_i32_off:141; GFX12: ; %bb.0: ; %bb142; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1143; GFX12-NEXT: s_clause 0x1144; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34145; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24146; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0147; GFX12-NEXT: s_wait_xcnt 0x0148; GFX12-NEXT: s_mov_b32 s4, 0149; GFX12-NEXT: s_wait_kmcnt 0x0150; GFX12-NEXT: v_mov_b32_e32 v1, s6151; GFX12-NEXT: .LBB2_1: ; %bb1152; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1153; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null idxen th:TH_LOAD_NT154; GFX12-NEXT: s_wait_loadcnt 0x0155; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0156; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4157; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)158; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4159; GFX12-NEXT: s_cbranch_execnz .LBB2_1160; GFX12-NEXT: ; %bb.2: ; %bb2161; GFX12-NEXT: s_endpgm162bb:163 %id = tail call i32 @llvm.amdgcn.workitem.id.x()164 br label %bb1165bb1:166 %load = call i32 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 %index, i32 0, i32 0, i32 1)167 %cmp = icmp eq i32 %load, %id168 br i1 %cmp, label %bb1, label %bb2169bb2:170 ret void171}172 173define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i32_soff(ptr addrspace(8) %ptr, i32 %index) {174; GFX11-LABEL: struct_ptr_atomic_buffer_load_i32_soff:175; GFX11: ; %bb.0: ; %bb176; GFX11-NEXT: s_clause 0x1177; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34178; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24179; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0180; GFX11-NEXT: s_mov_b32 s4, 0181; GFX11-NEXT: s_waitcnt lgkmcnt(0)182; GFX11-NEXT: v_mov_b32_e32 v1, s6183; GFX11-NEXT: .LBB3_1: ; %bb1184; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1185; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 4 idxen offset:4 glc186; GFX11-NEXT: s_waitcnt vmcnt(0)187; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0188; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4189; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)190; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4191; GFX11-NEXT: s_cbranch_execnz .LBB3_1192; GFX11-NEXT: ; %bb.2: ; %bb2193; GFX11-NEXT: s_endpgm194;195; GFX12-LABEL: struct_ptr_atomic_buffer_load_i32_soff:196; GFX12: ; %bb.0: ; %bb197; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1198; GFX12-NEXT: s_clause 0x1199; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34200; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24201; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0202; GFX12-NEXT: s_wait_xcnt 0x0203; GFX12-NEXT: s_mov_b32 s4, 0204; GFX12-NEXT: s_mov_b32 s5, 4205; GFX12-NEXT: s_wait_kmcnt 0x0206; GFX12-NEXT: v_mov_b32_e32 v1, s6207; GFX12-NEXT: .LBB3_1: ; %bb1208; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1209; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], s5 idxen offset:4 th:TH_LOAD_NT210; GFX12-NEXT: s_wait_loadcnt 0x0211; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0212; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4213; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)214; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4215; GFX12-NEXT: s_cbranch_execnz .LBB3_1216; GFX12-NEXT: ; %bb.2: ; %bb2217; GFX12-NEXT: s_endpgm218bb:219 %id = tail call i32 @llvm.amdgcn.workitem.id.x()220 br label %bb1221bb1:222 %load = call i32 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 4, i32 1)223 %cmp = icmp eq i32 %load, %id224 br i1 %cmp, label %bb1, label %bb2225bb2:226 ret void227}228define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i32_dlc(ptr addrspace(8) %ptr, i32 %index) {229; GFX11-LABEL: struct_ptr_atomic_buffer_load_i32_dlc:230; GFX11: ; %bb.0: ; %bb231; GFX11-NEXT: s_clause 0x1232; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34233; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24234; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0235; GFX11-NEXT: s_mov_b32 s4, 0236; GFX11-NEXT: s_waitcnt lgkmcnt(0)237; GFX11-NEXT: v_mov_b32_e32 v1, s6238; GFX11-NEXT: .LBB4_1: ; %bb1239; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1240; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 0 idxen offset:4 dlc241; GFX11-NEXT: s_waitcnt vmcnt(0)242; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0243; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4244; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)245; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4246; GFX11-NEXT: s_cbranch_execnz .LBB4_1247; GFX11-NEXT: ; %bb.2: ; %bb2248; GFX11-NEXT: s_endpgm249;250; GFX12-LABEL: struct_ptr_atomic_buffer_load_i32_dlc:251; GFX12: ; %bb.0: ; %bb252; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1253; GFX12-NEXT: s_clause 0x1254; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34255; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24256; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0257; GFX12-NEXT: s_wait_xcnt 0x0258; GFX12-NEXT: s_mov_b32 s4, 0259; GFX12-NEXT: s_wait_kmcnt 0x0260; GFX12-NEXT: v_mov_b32_e32 v1, s6261; GFX12-NEXT: .LBB4_1: ; %bb1262; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1263; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT_RT264; GFX12-NEXT: s_wait_loadcnt 0x0265; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0266; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4267; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)268; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4269; GFX12-NEXT: s_cbranch_execnz .LBB4_1270; GFX12-NEXT: ; %bb.2: ; %bb2271; GFX12-NEXT: s_endpgm272bb:273 %id = tail call i32 @llvm.amdgcn.workitem.id.x()274 br label %bb1275bb1:276 %load = call i32 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 4)277 %cmp = icmp eq i32 %load, %id278 br i1 %cmp, label %bb1, label %bb2279bb2:280 ret void281}282 283define amdgpu_kernel void @struct_ptr_nonatomic_buffer_load_i32(ptr addrspace(8) %ptr, i32 %index) {284; GFX11-LABEL: struct_ptr_nonatomic_buffer_load_i32:285; GFX11: ; %bb.0: ; %bb286; GFX11-NEXT: s_clause 0x1287; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34288; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24289; GFX11-NEXT: s_waitcnt lgkmcnt(0)290; GFX11-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_and_b32 v0, 0x3ff, v0291; GFX11-NEXT: buffer_load_b32 v1, v1, s[0:3], 0 idxen offset:4 glc292; GFX11-NEXT: s_mov_b32 s0, 0293; GFX11-NEXT: s_waitcnt vmcnt(0)294; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0295; GFX11-NEXT: .LBB5_1: ; %bb1296; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1297; GFX11-NEXT: s_and_b32 s1, exec_lo, vcc_lo298; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)299; GFX11-NEXT: s_or_b32 s0, s1, s0300; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0301; GFX11-NEXT: s_cbranch_execnz .LBB5_1302; GFX11-NEXT: ; %bb.2: ; %bb2303; GFX11-NEXT: s_endpgm304;305; GFX12-LABEL: struct_ptr_nonatomic_buffer_load_i32:306; GFX12: ; %bb.0: ; %bb307; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1308; GFX12-NEXT: s_clause 0x1309; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34310; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24311; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0312; GFX12-NEXT: s_wait_kmcnt 0x0313; GFX12-NEXT: v_mov_b32_e32 v1, s6314; GFX12-NEXT: buffer_load_b32 v1, v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT315; GFX12-NEXT: s_wait_xcnt 0x0316; GFX12-NEXT: s_mov_b32 s0, 0317; GFX12-NEXT: s_wait_loadcnt 0x0318; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0319; GFX12-NEXT: .LBB5_1: ; %bb1320; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1321; GFX12-NEXT: s_and_b32 s1, exec_lo, vcc_lo322; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)323; GFX12-NEXT: s_or_b32 s0, s1, s0324; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0325; GFX12-NEXT: s_cbranch_execnz .LBB5_1326; GFX12-NEXT: ; %bb.2: ; %bb2327; GFX12-NEXT: s_endpgm328bb:329 %id = tail call i32 @llvm.amdgcn.workitem.id.x()330 br label %bb1331bb1:332 %load = call i32 @llvm.amdgcn.struct.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 1)333 %cmp = icmp eq i32 %load, %id334 br i1 %cmp, label %bb1, label %bb2335bb2:336 ret void337}338 339define amdgpu_kernel void @struct_ptr_atomic_buffer_load_i64(ptr addrspace(8) %ptr, i32 %index) {340; GFX11-LABEL: struct_ptr_atomic_buffer_load_i64:341; GFX11: ; %bb.0: ; %bb342; GFX11-NEXT: s_clause 0x1343; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34344; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24345; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0346; GFX11-NEXT: s_mov_b32 s4, 0347; GFX11-NEXT: s_waitcnt lgkmcnt(0)348; GFX11-NEXT: v_mov_b32_e32 v2, s6349; GFX11-NEXT: .LBB6_1: ; %bb1350; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1351; GFX11-NEXT: buffer_load_b64 v[3:4], v2, s[0:3], 0 idxen offset:4 glc352; GFX11-NEXT: s_waitcnt vmcnt(0)353; GFX11-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[0:1]354; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4355; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)356; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4357; GFX11-NEXT: s_cbranch_execnz .LBB6_1358; GFX11-NEXT: ; %bb.2: ; %bb2359; GFX11-NEXT: s_endpgm360;361; GFX12-SDAG-TRUE16-LABEL: struct_ptr_atomic_buffer_load_i64:362; GFX12-SDAG-TRUE16: ; %bb.0: ; %bb363; GFX12-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1364; GFX12-SDAG-TRUE16-NEXT: s_clause 0x1365; GFX12-SDAG-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34366; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24367; GFX12-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 0368; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0369; GFX12-SDAG-TRUE16-NEXT: s_wait_xcnt 0x0370; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0371; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0372; GFX12-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, s6373; GFX12-SDAG-TRUE16-NEXT: .LBB6_1: ; %bb1374; GFX12-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1375; GFX12-SDAG-TRUE16-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null idxen offset:4 th:TH_LOAD_NT376; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0377; GFX12-SDAG-TRUE16-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[0:1]378; GFX12-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4379; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)380; GFX12-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4381; GFX12-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB6_1382; GFX12-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2383; GFX12-SDAG-TRUE16-NEXT: s_endpgm384;385; GFX12-GISEL-TRUE16-LABEL: struct_ptr_atomic_buffer_load_i64:386; GFX12-GISEL-TRUE16: ; %bb.0: ; %bb387; GFX12-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1388; GFX12-GISEL-TRUE16-NEXT: s_clause 0x1389; GFX12-GISEL-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34390; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24391; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0392; GFX12-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0393; GFX12-GISEL-TRUE16-NEXT: s_wait_xcnt 0x0394; GFX12-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0395; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0396; GFX12-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, s6397; GFX12-GISEL-TRUE16-NEXT: .LBB6_1: ; %bb1398; GFX12-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1399; GFX12-GISEL-TRUE16-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null idxen offset:4 th:TH_LOAD_NT400; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0401; GFX12-GISEL-TRUE16-NEXT: v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[0:1]402; GFX12-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4403; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)404; GFX12-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4405; GFX12-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB6_1406; GFX12-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2407; GFX12-GISEL-TRUE16-NEXT: s_endpgm408bb:409 %id = tail call i32 @llvm.amdgcn.workitem.id.x()410 %id.zext = zext i32 %id to i64411 br label %bb1412bb1:413 %load = call i64 @llvm.amdgcn.struct.ptr.atomic.buffer.load.i64(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 1)414 %cmp = icmp eq i64 %load, %id.zext415 br i1 %cmp, label %bb1, label %bb2416bb2:417 ret void418}419 420define amdgpu_kernel void @struct_ptr_atomic_buffer_load_v2i16(ptr addrspace(8) %ptr, i32 %index) {421; GFX11-LABEL: struct_ptr_atomic_buffer_load_v2i16:422; GFX11: ; %bb.0: ; %bb423; GFX11-NEXT: s_clause 0x1424; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34425; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24426; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0427; GFX11-NEXT: s_mov_b32 s4, 0428; GFX11-NEXT: s_waitcnt lgkmcnt(0)429; GFX11-NEXT: v_mov_b32_e32 v1, s6430; GFX11-NEXT: .LBB7_1: ; %bb1431; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1432; GFX11-NEXT: buffer_load_b32 v2, v1, s[0:3], 0 idxen glc433; GFX11-NEXT: s_waitcnt vmcnt(0)434; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0435; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4436; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)437; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4438; GFX11-NEXT: s_cbranch_execnz .LBB7_1439; GFX11-NEXT: ; %bb.2: ; %bb2440; GFX11-NEXT: s_endpgm441;442; GFX12-LABEL: struct_ptr_atomic_buffer_load_v2i16:443; GFX12: ; %bb.0: ; %bb444; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1445; GFX12-NEXT: s_clause 0x1446; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34447; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24448; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0449; GFX12-NEXT: s_wait_xcnt 0x0450; GFX12-NEXT: s_mov_b32 s4, 0451; GFX12-NEXT: s_wait_kmcnt 0x0452; GFX12-NEXT: v_mov_b32_e32 v1, s6453; GFX12-NEXT: .LBB7_1: ; %bb1454; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1455; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null idxen th:TH_LOAD_NT456; GFX12-NEXT: s_wait_loadcnt 0x0457; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0458; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4459; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)460; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4461; GFX12-NEXT: s_cbranch_execnz .LBB7_1462; GFX12-NEXT: ; %bb.2: ; %bb2463; GFX12-NEXT: s_endpgm464bb:465 %id = tail call i32 @llvm.amdgcn.workitem.id.x()466 br label %bb1467bb1:468 %load = call <2 x i16> @llvm.amdgcn.struct.ptr.atomic.buffer.load.v2i16(ptr addrspace(8) %ptr, i32 %index, i32 0, i32 0, i32 1)469 %bitcast = bitcast <2 x i16> %load to i32470 %cmp = icmp eq i32 %bitcast, %id471 br i1 %cmp, label %bb1, label %bb2472bb2:473 ret void474}475 476define amdgpu_kernel void @struct_ptr_atomic_buffer_load_v4i16(ptr addrspace(8) %ptr, i32 %index) {477; GFX11-SDAG-TRUE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:478; GFX11-SDAG-TRUE16: ; %bb.0: ; %bb479; GFX11-SDAG-TRUE16-NEXT: s_clause 0x1480; GFX11-SDAG-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34481; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24482; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0483; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0484; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0)485; GFX11-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, s6486; GFX11-SDAG-TRUE16-NEXT: .LBB8_1: ; %bb1487; GFX11-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1488; GFX11-SDAG-TRUE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], 0 idxen offset:4 glc489; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0)490; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l491; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)492; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0493; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4494; GFX11-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4495; GFX11-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB8_1496; GFX11-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2497; GFX11-SDAG-TRUE16-NEXT: s_endpgm498;499; GFX11-FAKE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:500; GFX11-FAKE16: ; %bb.0: ; %bb501; GFX11-FAKE16-NEXT: s_clause 0x1502; GFX11-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34503; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24504; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0505; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0506; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)507; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, s6508; GFX11-FAKE16-NEXT: .LBB8_1: ; %bb1509; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1510; GFX11-FAKE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], 0 idxen offset:4 glc511; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)512; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2513; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)514; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v3, 16, v2515; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0516; GFX11-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4517; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)518; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4519; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB8_1520; GFX11-FAKE16-NEXT: ; %bb.2: ; %bb2521; GFX11-FAKE16-NEXT: s_endpgm522;523; GFX11-GISEL-TRUE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:524; GFX11-GISEL-TRUE16: ; %bb.0: ; %bb525; GFX11-GISEL-TRUE16-NEXT: s_clause 0x1526; GFX11-GISEL-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34527; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24528; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0529; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0530; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)531; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, s6532; GFX11-GISEL-TRUE16-NEXT: .LBB8_1: ; %bb1533; GFX11-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1534; GFX11-GISEL-TRUE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], 0 idxen offset:4 glc535; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)536; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l537; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)538; GFX11-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0539; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4540; GFX11-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4541; GFX11-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB8_1542; GFX11-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2543; GFX11-GISEL-TRUE16-NEXT: s_endpgm544;545; GFX11-GISEL-LABEL: struct_ptr_atomic_buffer_load_v4i16:546; GFX11-GISEL: ; %bb.0: ; %bb547; GFX11-GISEL-NEXT: s_clause 0x1548; GFX11-GISEL-NEXT: s_load_b32 s6, s[4:5], 0x34549; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24550; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0551; GFX11-GISEL-NEXT: s_mov_b32 s4, 0552; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)553; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, s6554; GFX11-GISEL-NEXT: .LBB8_1: ; %bb1555; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1556; GFX11-GISEL-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], 0 idxen offset:4 glc557; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)558; GFX11-GISEL-NEXT: v_readfirstlane_b32 s5, v2559; GFX11-GISEL-NEXT: v_readfirstlane_b32 s6, v3560; GFX11-GISEL-NEXT: s_pack_ll_b32_b16 s5, s5, s6561; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)562; GFX11-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0563; GFX11-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4564; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4565; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB8_1566; GFX11-GISEL-NEXT: ; %bb.2: ; %bb2567; GFX11-GISEL-NEXT: s_endpgm568;569; GFX12-SDAG-TRUE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:570; GFX12-SDAG-TRUE16: ; %bb.0: ; %bb571; GFX12-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1572; GFX12-SDAG-TRUE16-NEXT: s_clause 0x1573; GFX12-SDAG-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34574; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24575; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0576; GFX12-SDAG-TRUE16-NEXT: s_wait_xcnt 0x0577; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s4, 0578; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0579; GFX12-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, s6580; GFX12-SDAG-TRUE16-NEXT: .LBB8_1: ; %bb1581; GFX12-SDAG-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1582; GFX12-SDAG-TRUE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT583; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0584; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l585; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)586; GFX12-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0587; GFX12-SDAG-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4588; GFX12-SDAG-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4589; GFX12-SDAG-TRUE16-NEXT: s_cbranch_execnz .LBB8_1590; GFX12-SDAG-TRUE16-NEXT: ; %bb.2: ; %bb2591; GFX12-SDAG-TRUE16-NEXT: s_endpgm592;593; GFX12-FAKE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:594; GFX12-FAKE16: ; %bb.0: ; %bb595; GFX12-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1596; GFX12-FAKE16-NEXT: s_clause 0x1597; GFX12-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34598; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24599; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0600; GFX12-FAKE16-NEXT: s_wait_xcnt 0x0601; GFX12-FAKE16-NEXT: s_mov_b32 s4, 0602; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0603; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, s6604; GFX12-FAKE16-NEXT: .LBB8_1: ; %bb1605; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1606; GFX12-FAKE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT607; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0608; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2609; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)610; GFX12-FAKE16-NEXT: v_lshl_or_b32 v2, v3, 16, v2611; GFX12-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0612; GFX12-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4613; GFX12-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)614; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4615; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB8_1616; GFX12-FAKE16-NEXT: ; %bb.2: ; %bb2617; GFX12-FAKE16-NEXT: s_endpgm618;619; GFX12-GISEL-TRUE16-LABEL: struct_ptr_atomic_buffer_load_v4i16:620; GFX12-GISEL-TRUE16: ; %bb.0: ; %bb621; GFX12-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1622; GFX12-GISEL-TRUE16-NEXT: s_clause 0x1623; GFX12-GISEL-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34624; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24625; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0626; GFX12-GISEL-TRUE16-NEXT: s_wait_xcnt 0x0627; GFX12-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0628; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0629; GFX12-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, s6630; GFX12-GISEL-TRUE16-NEXT: .LBB8_1: ; %bb1631; GFX12-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1632; GFX12-GISEL-TRUE16-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT633; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0634; GFX12-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l635; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)636; GFX12-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0637; GFX12-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4638; GFX12-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4639; GFX12-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB8_1640; GFX12-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2641; GFX12-GISEL-TRUE16-NEXT: s_endpgm642bb:643 %id = tail call i32 @llvm.amdgcn.workitem.id.x()644 br label %bb1645bb1:646 %load = call <4 x i16> @llvm.amdgcn.struct.ptr.atomic.buffer.load.v4i16(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 1)647 %shortened = shufflevector <4 x i16> %load, <4 x i16> poison, <2 x i32> <i32 0, i32 2>648 %bitcast = bitcast <2 x i16> %shortened to i32649 %cmp = icmp eq i32 %bitcast, %id650 br i1 %cmp, label %bb1, label %bb2651bb2:652 ret void653}654 655define amdgpu_kernel void @struct_ptr_atomic_buffer_load_v4i32(ptr addrspace(8) %ptr, i32 %index) {656; GFX11-LABEL: struct_ptr_atomic_buffer_load_v4i32:657; GFX11: ; %bb.0: ; %bb658; GFX11-NEXT: s_clause 0x1659; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34660; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24661; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0662; GFX11-NEXT: s_mov_b32 s4, 0663; GFX11-NEXT: s_waitcnt lgkmcnt(0)664; GFX11-NEXT: v_mov_b32_e32 v1, s6665; GFX11-NEXT: .LBB9_1: ; %bb1666; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1667; GFX11-NEXT: buffer_load_b128 v[2:5], v1, s[0:3], 0 idxen offset:4 glc668; GFX11-NEXT: s_waitcnt vmcnt(0)669; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v5, v0670; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4671; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)672; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4673; GFX11-NEXT: s_cbranch_execnz .LBB9_1674; GFX11-NEXT: ; %bb.2: ; %bb2675; GFX11-NEXT: s_endpgm676;677; GFX12-LABEL: struct_ptr_atomic_buffer_load_v4i32:678; GFX12: ; %bb.0: ; %bb679; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1680; GFX12-NEXT: s_clause 0x1681; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34682; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24683; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0684; GFX12-NEXT: s_wait_xcnt 0x0685; GFX12-NEXT: s_mov_b32 s4, 0686; GFX12-NEXT: s_wait_kmcnt 0x0687; GFX12-NEXT: v_mov_b32_e32 v1, s6688; GFX12-NEXT: .LBB9_1: ; %bb1689; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1690; GFX12-NEXT: buffer_load_b128 v[2:5], v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT691; GFX12-NEXT: s_wait_loadcnt 0x0692; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v5, v0693; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4694; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)695; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4696; GFX12-NEXT: s_cbranch_execnz .LBB9_1697; GFX12-NEXT: ; %bb.2: ; %bb2698; GFX12-NEXT: s_endpgm699bb:700 %id = tail call i32 @llvm.amdgcn.workitem.id.x()701 br label %bb1702bb1:703 %load = call <4 x i32> @llvm.amdgcn.struct.ptr.atomic.buffer.load.v4i32(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 1)704 %extracted = extractelement <4 x i32> %load, i32 3705 %cmp = icmp eq i32 %extracted, %id706 br i1 %cmp, label %bb1, label %bb2707bb2:708 ret void709}710 711define amdgpu_kernel void @struct_ptr_atomic_buffer_load_ptr(ptr addrspace(8) %ptr, i32 %index) {712; GFX11-LABEL: struct_ptr_atomic_buffer_load_ptr:713; GFX11: ; %bb.0: ; %bb714; GFX11-NEXT: s_clause 0x1715; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34716; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24717; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0718; GFX11-NEXT: s_mov_b32 s4, 0719; GFX11-NEXT: s_waitcnt lgkmcnt(0)720; GFX11-NEXT: v_mov_b32_e32 v1, s6721; GFX11-NEXT: .LBB10_1: ; %bb1722; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1723; GFX11-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], 0 idxen offset:4 glc724; GFX11-NEXT: s_waitcnt vmcnt(0)725; GFX11-NEXT: flat_load_b32 v2, v[2:3]726; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)727; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0728; GFX11-NEXT: s_or_b32 s4, vcc_lo, s4729; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)730; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4731; GFX11-NEXT: s_cbranch_execnz .LBB10_1732; GFX11-NEXT: ; %bb.2: ; %bb2733; GFX11-NEXT: s_endpgm734;735; GFX12-LABEL: struct_ptr_atomic_buffer_load_ptr:736; GFX12: ; %bb.0: ; %bb737; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1738; GFX12-NEXT: s_clause 0x1739; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34740; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24741; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0742; GFX12-NEXT: s_wait_xcnt 0x0743; GFX12-NEXT: s_mov_b32 s4, 0744; GFX12-NEXT: s_wait_kmcnt 0x0745; GFX12-NEXT: v_mov_b32_e32 v1, s6746; GFX12-NEXT: .LBB10_1: ; %bb1747; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1748; GFX12-NEXT: buffer_load_b64 v[2:3], v1, s[0:3], null idxen offset:4 th:TH_LOAD_NT749; GFX12-NEXT: s_wait_loadcnt 0x0750; GFX12-NEXT: flat_load_b32 v2, v[2:3]751; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0752; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v0753; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4754; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)755; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4756; GFX12-NEXT: s_cbranch_execnz .LBB10_1757; GFX12-NEXT: ; %bb.2: ; %bb2758; GFX12-NEXT: s_endpgm759bb:760 %id = tail call i32 @llvm.amdgcn.workitem.id.x()761 br label %bb1762bb1:763 %load = call ptr @llvm.amdgcn.struct.ptr.atomic.buffer.load.ptr(ptr addrspace(8) %ptr, i32 %index, i32 4, i32 0, i32 1)764 %elem = load i32, ptr %load765 %cmp = icmp eq i32 %elem, %id766 br i1 %cmp, label %bb1, label %bb2767bb2:768 ret void769}770 771declare i32 @llvm.amdgcn.struct.ptr.atom.buffer.load.i32(ptr addrspace(8), i32, i32, i32, i32 immarg)772declare i64 @llvm.amdgcn.struct.ptr.atom.buffer.load.i64(ptr addrspace(8), i32, i32, i32, i32 immarg)773declare <2 x i16> @llvm.amdgcn.struct.ptr.atom.buffer.load.v2i16(ptr addrspace(8), i32, i32, i32, i32 immarg)774declare <4 x i16> @llvm.amdgcn.struct.ptr.atom.buffer.load.v4i16(ptr addrspace(8), i32, i32, i32, i32 immarg)775declare <4 x i32> @llvm.amdgcn.struct.ptr.atom.buffer.load.v4i32(ptr addrspace(8), i32, i32, i32, i32 immarg)776declare ptr @llvm.amdgcn.struct.ptr.atom.buffer.load.ptr(ptr addrspace(8), i32, i32, i32, i32 immarg)777declare i32 @llvm.amdgcn.struct.ptr.buffer.load.i32(ptr addrspace(8), i32, i32, i32, i32 immarg)778declare i32 @llvm.amdgcn.workitem.id.x()779